From patchwork Sat Nov 8 04:26:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ouyang Changchun X-Patchwork-Id: 1221 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id F1B7C7F3D; Sat, 8 Nov 2014 05:17:07 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 10DFD7F3D for ; Sat, 8 Nov 2014 05:16:56 +0100 (CET) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP; 07 Nov 2014 20:26:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,862,1389772800"; d="scan'208";a="413379727" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by FMSMGA003.fm.intel.com with ESMTP; 07 Nov 2014 20:17:49 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id sA84QSx7020937; Sat, 8 Nov 2014 12:26:28 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id sA84QPX5004875; Sat, 8 Nov 2014 12:26:27 +0800 Received: (from couyang@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id sA84QPjY004871; Sat, 8 Nov 2014 12:26:25 +0800 From: Ouyang Changchun To: dev@dpdk.org Date: Sat, 8 Nov 2014 12:26:14 +0800 Message-Id: <1415420776-4821-4-git-send-email-changchun.ouyang@intel.com> X-Mailer: git-send-email 1.7.12.2 In-Reply-To: <1415420776-4821-1-git-send-email-changchun.ouyang@intel.com> References: <1414732757-7241-1-git-send-email-changchun.ouyang@intel.com> <1415420776-4821-1-git-send-email-changchun.ouyang@intel.com> Subject: [dpdk-dev] [PATCH v4 3/5] ixgbe: Configure Rx mode for VMDQ X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Config PFVML2FLT register in ixgbe PMD to enable it receive broadcast and multicast packets; also factorize the common logic with ixgbe_set_pool_rx_mode. Signed-off-by: Changchun Ouyang --- lib/librte_pmd_ixgbe/ixgbe_ethdev.c | 31 +++++++++++++++++++++---------- lib/librte_pmd_ixgbe/ixgbe_ethdev.h | 1 + lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 6 ++++++ 3 files changed, 28 insertions(+), 10 deletions(-) diff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c index 9c73a30..fb7ed3d 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c +++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c @@ -3123,6 +3123,26 @@ ixgbe_uc_all_hash_table_set(struct rte_eth_dev *dev, uint8_t on) return 0; } + +uint32_t +ixgbe_convert_vm_rx_mask_to_val(uint16_t rx_mask, uint32_t orig_val) +{ + uint32_t new_val = orig_val; + + if (rx_mask & ETH_VMDQ_ACCEPT_UNTAG) + new_val |= IXGBE_VMOLR_AUPE; + if (rx_mask & ETH_VMDQ_ACCEPT_HASH_MC) + new_val |= IXGBE_VMOLR_ROMPE; + if (rx_mask & ETH_VMDQ_ACCEPT_HASH_UC) + new_val |= IXGBE_VMOLR_ROPE; + if (rx_mask & ETH_VMDQ_ACCEPT_BROADCAST) + new_val |= IXGBE_VMOLR_BAM; + if (rx_mask & ETH_VMDQ_ACCEPT_MULTICAST) + new_val |= IXGBE_VMOLR_MPE; + + return new_val; +} + static int ixgbe_set_pool_rx_mode(struct rte_eth_dev *dev, uint16_t pool, uint16_t rx_mask, uint8_t on) @@ -3141,16 +3161,7 @@ ixgbe_set_pool_rx_mode(struct rte_eth_dev *dev, uint16_t pool, if (ixgbe_vmdq_mode_check(hw) < 0) return (-ENOTSUP); - if (rx_mask & ETH_VMDQ_ACCEPT_UNTAG ) - val |= IXGBE_VMOLR_AUPE; - if (rx_mask & ETH_VMDQ_ACCEPT_HASH_MC ) - val |= IXGBE_VMOLR_ROMPE; - if (rx_mask & ETH_VMDQ_ACCEPT_HASH_UC) - val |= IXGBE_VMOLR_ROPE; - if (rx_mask & ETH_VMDQ_ACCEPT_BROADCAST) - val |= IXGBE_VMOLR_BAM; - if (rx_mask & ETH_VMDQ_ACCEPT_MULTICAST) - val |= IXGBE_VMOLR_MPE; + val = ixgbe_convert_vm_rx_mask_to_val(rx_mask, val); if (on) vmolr |= val; diff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h index a5159e5..ca99170 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h +++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h @@ -340,4 +340,5 @@ void ixgbe_pf_mbx_process(struct rte_eth_dev *eth_dev); int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev); +uint32_t ixgbe_convert_vm_rx_mask_to_val(uint16_t rx_mask, uint32_t orig_val); #endif /* _IXGBE_ETHDEV_H_ */ diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c index 3a5a8ff..f9b3fe3 100644 --- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c +++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c @@ -3123,6 +3123,7 @@ ixgbe_vmdq_rx_hw_configure(struct rte_eth_dev *dev) struct ixgbe_hw *hw; enum rte_eth_nb_pools num_pools; uint32_t mrqc, vt_ctl, vlanctrl; + uint32_t vmolr = 0; int i; PMD_INIT_FUNC_TRACE(); @@ -3145,6 +3146,11 @@ ixgbe_vmdq_rx_hw_configure(struct rte_eth_dev *dev) IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl); + for (i = 0; i < (int)num_pools; i++) { + vmolr = ixgbe_convert_vm_rx_mask_to_val(cfg->rx_mode, vmolr); + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(i), vmolr); + } + /* VLNCTRL: enable vlan filtering and allow all vlan tags through */ vlanctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); vlanctrl |= IXGBE_VLNCTRL_VFE ; /* enable vlan filters */