[dpdk-dev,v2] ixgbe: fix occasional timeouts when starting VF
Commit Message
Increase the polling wait time from 10 milleseconds to 15.
Fixes: af75078fece3 ("first public release")
Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
---
Change in v2:
added fixes line
---
drivers/net/ixgbe/ixgbe_rxtx.c | 6 +++---
drivers/net/ixgbe/ixgbe_rxtx.h | 3 ++-
2 files changed, 5 insertions(+), 4 deletions(-)
Comments
2016-04-05 15:55, Bernard Iremonger:
> - poll_ms = 10;
> + poll_ms = RTE_IXGBE_REGISTER_POLL_WAIT_15_MS;
[...]
> #define RTE_IXGBE_REGISTER_POLL_WAIT_10_MS 10
> +#define RTE_IXGBE_REGISTER_POLL_WAIT_15_MS 15
> #define RTE_IXGBE_WAIT_100_US 100
I don't understand why these constants are needed.
There is no semantic, just an arbitrary number.
Hi Thomas,
> -----Original Message-----
> From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com]
> Sent: Tuesday, April 5, 2016 4:48 PM
> To: Iremonger, Bernard <bernard.iremonger@intel.com>
> Cc: dev@dpdk.org; Lu, Wenzhuo <wenzhuo.lu@intel.com>
> Subject: Re: [dpdk-dev] [PATCH v2] ixgbe: fix occasional timeouts when
> starting VF
>
> 2016-04-05 15:55, Bernard Iremonger:
> > - poll_ms = 10;
> > + poll_ms = RTE_IXGBE_REGISTER_POLL_WAIT_15_MS;
> [...]
> > #define RTE_IXGBE_REGISTER_POLL_WAIT_10_MS 10
> > +#define RTE_IXGBE_REGISTER_POLL_WAIT_15_MS 15
> > #define RTE_IXGBE_WAIT_100_US 100
>
> I don't understand why these constants are needed.
> There is no semantic, just an arbitrary number.
I am seeing intermittent failures in the following test at line 4969 in ixgbe_rxtx.c:
while (--poll_ms && !(txdctl & IXGBE_TXDCTL_ENABLE))
Increasing the value of poll_ms does not address the root cause of this failure.
This needs more investigation.
Self NAK.
@@ -1,7 +1,7 @@
/*-
* BSD LICENSE
*
- * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
+ * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
* Copyright 2014 6WIND S.A.
* All rights reserved.
*
@@ -4961,7 +4961,7 @@ ixgbevf_dev_rxtx_start(struct rte_eth_dev *dev)
txdctl |= IXGBE_TXDCTL_ENABLE;
IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), txdctl);
- poll_ms = 10;
+ poll_ms = RTE_IXGBE_REGISTER_POLL_WAIT_15_MS;
/* Wait until TX Enable ready */
do {
rte_delay_ms(1);
@@ -4979,7 +4979,7 @@ ixgbevf_dev_rxtx_start(struct rte_eth_dev *dev)
IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), rxdctl);
/* Wait until RX Enable ready */
- poll_ms = 10;
+ poll_ms = RTE_IXGBE_REGISTER_POLL_WAIT_15_MS;
do {
rte_delay_ms(1);
rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
@@ -1,7 +1,7 @@
/*-
* BSD LICENSE
*
- * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -77,6 +77,7 @@
#endif
#define RTE_IXGBE_REGISTER_POLL_WAIT_10_MS 10
+#define RTE_IXGBE_REGISTER_POLL_WAIT_15_MS 15
#define RTE_IXGBE_WAIT_100_US 100
#define RTE_IXGBE_VMTXSW_REGISTER_COUNT 2