From patchwork Fri Mar 1 17:23:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Smith, Eleanor" X-Patchwork-Id: 50728 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 409432C38; Fri, 1 Mar 2019 18:23:43 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 1997B2C0C for ; Fri, 1 Mar 2019 18:23:40 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2019 09:23:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,428,1544515200"; d="scan'208";a="324556066" Received: from eleanorr-mobl1.ger.corp.intel.com (HELO localhost.localdomain) ([10.252.42.246]) by fmsmga005.fm.intel.com with ESMTP; 01 Mar 2019 09:23:36 -0800 From: "Smith, Eleanor" To: dev@dpdk.org Cc: ferruh.yigit@intel.com, pablo.de.lara.guarch@intel.com, akhil.goyal@nxp.com Date: Fri, 1 Mar 2019 17:23:26 +0000 Message-Id: <1551461010-881-1-git-send-email-eleanor.smith@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [dpdk-dev] [PATCH v1 0/4] baseband/fpga_lte_fec: BBDEV FPGA driver for 4G turbo FEC X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This series of patches adds a new baseband device driver for Intel(R) FPGA LTE FEC which enable the acceleration of 4G FEC turbo encoding and decoding on FPGA through the DPDK librte_bbdev API. The FEC offloaded UL functionality includes sub block deinterleave, turbo decoding and CRC checking. The FEC offloaded DL functionality includes turbo encoding, turbo rate matching and CRC generation. The turbo encode and decoder can be performed in codeblock or transport block mode, where transport block mode includes codeblock segmentation and concatenation stages performed in software. The Intel(R) FPGA LTE FEC is implemented on Intel(R) PAC N3000 FPGA card which is available from Intel in Q2 2019. Smith, Eleanor (4): Addition of driver for 4G turbo FEC with PAC N300 FPGA card Update to usertool to allow binding of baseband device Update bbdev test-app for FPGA driver testing Update device info structure to use rte_device app/test-bbdev/main.c | 15 +- app/test-bbdev/main.h | 2 + app/test-bbdev/test-bbdev.py | 7 + app/test-bbdev/test_bbdev_perf.c | 64 + config/common_base | 6 + doc/guides/bbdevs/fpga_lte_fec.rst | 316 +++ doc/guides/bbdevs/index.rst | 1 + doc/guides/prog_guide/bbdev.rst | 4 +- drivers/baseband/Makefile | 2 + drivers/baseband/fpga_lte_fec/Makefile | 29 + drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 2639 ++++++++++++++++++++ drivers/baseband/fpga_lte_fec/fpga_lte_fec.h | 73 + .../fpga_lte_fec/rte_pmd_fpga_lte_fec_version.map | 3 + lib/librte_bbdev/rte_bbdev.c | 6 +- lib/librte_bbdev/rte_bbdev.h | 2 +- mk/rte.app.mk | 3 +- usertools/dpdk-devbind.py | 10 +- usertools/dpdk-setup.sh | 6 +- 18 files changed, 3176 insertions(+), 12 deletions(-) create mode 100644 doc/guides/bbdevs/fpga_lte_fec.rst create mode 100644 drivers/baseband/fpga_lte_fec/Makefile create mode 100644 drivers/baseband/fpga_lte_fec/fpga_lte_fec.c create mode 100644 drivers/baseband/fpga_lte_fec/fpga_lte_fec.h create mode 100644 drivers/baseband/fpga_lte_fec/rte_pmd_fpga_lte_fec_version.map