diff mbox series

[v7,4/4] config: add octeontx2 machine config

Message ID 20190406142737.20091-4-jerinj@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series [v7,1/4] mk: introduce helper to check valid compiler argument |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Jerin Jacob April 6, 2019, 2:27 p.m. UTC 
  From: Jerin Jacob <jerinj@marvell.com>

Optimized configuration for Marvell octeontx2 SoC.
Updated meson build to support Marvell octeontx2 SoC.
Added meson cross build target for octeontx2.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
---
 config/arm/arm64_octeontx2_linux_gcc          | 16 +++++++++
 config/arm/meson.build                        |  9 ++++-
 config/defconfig_arm64-octeontx2-linux-gcc    |  1 +
 config/defconfig_arm64-octeontx2-linuxapp-gcc | 18 ++++++++++
 mk/machine/octeontx2/rte.vars.mk              | 34 +++++++++++++++++++
 5 files changed, 77 insertions(+), 1 deletion(-)
 create mode 100644 config/arm/arm64_octeontx2_linux_gcc
 create mode 120000 config/defconfig_arm64-octeontx2-linux-gcc
 create mode 100644 config/defconfig_arm64-octeontx2-linuxapp-gcc
 create mode 100644 mk/machine/octeontx2/rte.vars.mk

Comments

Thomas Monjalon April 10, 2019, 12:48 p.m. UTC | #1 
06/04/2019 16:27, jerinjacobk@gmail.com:
> From: Jerin Jacob <jerinj@marvell.com>
> 
> Optimized configuration for Marvell octeontx2 SoC.
> Updated meson build to support Marvell octeontx2 SoC.
> Added meson cross build target for octeontx2.

I see this error with meson when compiling softnic for octeontx2:

-c ../drivers/net/softnic/rte_eth_softnic_action.c
{standard input}: Assembler messages:
{standard input}:16: Error: selected processor does not support `crc32cx w3,w3,x0'
{standard input}:38: Error: selected processor does not support `crc32cx w1,w1,x3'
{standard input}:44: Error: selected processor does not support `crc32cx w0,w0,x4'
{standard input}:69: Error: selected processor does not support `crc32cx w2,w2,x3'
...
Jerin Jacob Kollanukkaran April 10, 2019, 12:59 p.m. UTC | #2 
On Wed, 2019-04-10 at 14:48 +0200, Thomas Monjalon wrote:
> 06/04/2019 16:27, jerinjacobk@gmail.com:
> > From: Jerin Jacob <jerinj@marvell.com>
> > 
> > Optimized configuration for Marvell octeontx2 SoC.
> > Updated meson build to support Marvell octeontx2 SoC.
> > Added meson cross build target for octeontx2.
> 
> I see this error with meson when compiling softnic for octeontx2:
> 
> -c ../drivers/net/softnic/rte_eth_softnic_action.c
> {standard input}: Assembler messages:
> {standard input}:16: Error: selected processor does not support
> `crc32cx w3,w3,x0'
> {standard input}:38: Error: selected processor does not support
> `crc32cx w1,w1,x3'
> {standard input}:44: Error: selected processor does not support
> `crc32cx w0,w0,x4'
> {standard input}:69: Error: selected processor does not support
> `crc32cx w2,w2,x3'
> ...

I have seen it too. Fix is here

Snippet from cover letter:

v7 Changes:

- Some compiler needs the following depended patch to compile with
meson 
http://patches.dpdk.org/patch/52367/


>
diff mbox series

Patch

diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc
new file mode 100644
index 000000000..e2c0b8f72
--- /dev/null
+++ b/config/arm/arm64_octeontx2_linux_gcc
@@ -0,0 +1,16 @@ 
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x43'
+implementor_pn = '0xb2'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 9282bbf33..0d76b2554 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -79,6 +79,12 @@  flags_thunderx2_extra = [
 	['RTE_MAX_NUMA_NODES', 2],
 	['RTE_MAX_LCORE', 256],
 	['RTE_USE_C11_MEM_MODEL', true]]
+flags_octeontx2_extra = [
+	['RTE_MACHINE', '"octeontx2"'],
+	['RTE_MAX_NUMA_NODES', 1],
+	['RTE_MAX_LCORE', 24],
+	['RTE_EAL_IGB_UIO', false],
+	['RTE_USE_C11_MEM_MODEL', true]]
 
 machine_args_generic = [
 	['default', ['-march=armv8-a+crc+crypto']],
@@ -96,7 +102,8 @@  machine_args_cavium = [
 	['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra],
 	['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra],
 	['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra],
-	['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra]]
+	['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra],
+	['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]]
 
 ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321)
 impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
diff --git a/config/defconfig_arm64-octeontx2-linux-gcc b/config/defconfig_arm64-octeontx2-linux-gcc
new file mode 120000
index 000000000..e25150531
--- /dev/null
+++ b/config/defconfig_arm64-octeontx2-linux-gcc
@@ -0,0 +1 @@ 
+defconfig_arm64-octeontx2-linuxapp-gcc
\ No newline at end of file
diff --git a/config/defconfig_arm64-octeontx2-linuxapp-gcc b/config/defconfig_arm64-octeontx2-linuxapp-gcc
new file mode 100644
index 000000000..9eae84538
--- /dev/null
+++ b/config/defconfig_arm64-octeontx2-linuxapp-gcc
@@ -0,0 +1,18 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Marvell International Ltd
+#
+
+#include "defconfig_arm64-armv8a-linux-gcc"
+
+CONFIG_RTE_MACHINE="octeontx2"
+
+CONFIG_RTE_CACHE_LINE_SIZE=128
+CONFIG_RTE_MAX_NUMA_NODES=1
+CONFIG_RTE_MAX_LCORE=24
+
+# Doesn't support NUMA
+CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
+CONFIG_RTE_LIBRTE_VHOST_NUMA=n
+
+# Recommend to use VFIO as co-processors needs SMMU/IOMMU
+CONFIG_RTE_EAL_IGB_UIO=n
diff --git a/mk/machine/octeontx2/rte.vars.mk b/mk/machine/octeontx2/rte.vars.mk
new file mode 100644
index 000000000..cbec7f14d
--- /dev/null
+++ b/mk/machine/octeontx2/rte.vars.mk
@@ -0,0 +1,34 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Marvell International Ltd
+#
+
+#
+# machine:
+#
+#   - can define ARCH variable (overridden by cmdline value)
+#   - can define CROSS variable (overridden by cmdline value)
+#   - define MACHINE_CFLAGS variable (overridden by cmdline value)
+#   - define MACHINE_LDFLAGS variable (overridden by cmdline value)
+#   - define MACHINE_ASFLAGS variable (overridden by cmdline value)
+#   - can define CPU_CFLAGS variable (overridden by cmdline value) that
+#     overrides the one defined in arch.
+#   - can define CPU_LDFLAGS variable (overridden by cmdline value) that
+#     overrides the one defined in arch.
+#   - can define CPU_ASFLAGS variable (overridden by cmdline value) that
+#     overrides the one defined in arch.
+#   - may override any previously defined variable
+#
+
+# ARCH =
+# CROSS =
+# MACHINE_CFLAGS =
+# MACHINE_LDFLAGS =
+# MACHINE_ASFLAGS =
+# CPU_CFLAGS =
+# CPU_LDFLAGS =
+# CPU_ASFLAGS =
+
+include $(RTE_SDK)/mk/rte.helper.mk
+
+MACHINE_CFLAGS += $(call rte_cc_has_argument, -march=-mcpu=armv8.2-a+crc+crypto+lse)
+MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=octeontx2)