diff mbox

[dpdk-dev,v2,01/14] baseband/turbo_sw: update DPDK to work with FlexRAN 1.4.0

Message ID 20180509141430.24072-1-kamilx.chalupnik@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Pablo de Lara Guarch
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Kamil Chalupnik May 9, 2018, 2:14 p.m. UTC 
  From: KamilX Chalupnik <kamilx.chalupnik@intel.com>

Adjusting BaseBand drivers code to changes in FlexRAN 1.4.0:
- update usage of crc functions after API changes

Update the documentation describing Wireless Baseband Device:
- FlexRAN releases mapping table added
- download and build instructions for BBDEV turbo_sw driver in
  compliance with FlexRAN 1.4.0 release added

Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
---
 doc/guides/bbdevs/turbo_sw.rst                   | 50 ++++++++++++------------
 drivers/baseband/turbo_sw/bbdev_turbo_software.c | 21 +++++-----
 2 files changed, 35 insertions(+), 36 deletions(-)

Comments

Kamil Chalupnik May 9, 2018, 2:14 p.m. UTC | #1 
Patchset adjusts BaseBand drivers code to changes in FlexRAN 1.4.0:
 - update usage of crc functions after API changes

Patchset includes following changes in Turbo Software drivers:
 - optimization of preparation data to encode processing (usage of memcpy
   changed or removed)
 - minor changes in defines definitions
 - function scaling input likelihood ratio (LLR)values to specific range
   [-16, 16] added
 - sizes of the internal buffers used by decoding were increased due to
   problem with memory for large vectors
 - support for optional CRC overlap in decode processing implemented
 - support for measurement of offload cost added
 - splitting Queue Groups into UL/DL Groups. They are independent for
   Decode/Encode

Baseband Device documentation was updated:
 - FlexRAN releases mapping table added
 - download and build instructions for BBDEV turbo_sw driver in
   compliance with FlexRAN 1.4.0 release added
 - device capabilities updated
 - input/output data buffers description added
 - details about implementation of turbo encode/decode operation added
 - added a note to enable building as a shared lib
 - vector test names updated
 - description of test added
 - usage of test app updated

Test vectors, test script and test application were updated:
 - creation of new vectors to test and validate BBDevice capabilities.
 - python script used for tests execuption updated
 - Improve readability of test application by replacing
   int values with rte_bbdev_event_type enum

Release note updated according to introduced changes.

Kamil Chalupnik (14):
  baseband/turbo_sw: update DPDK to work with FlexRAN 1.4.0
  baseband/turbo_sw: memory copying optimized or removed
  baseband/turbo_sw: minor changes in macro definitions
  baseband/turbo_sw: scalling likelihood ratio (LLR) input
  baseband/turbo_sw: increase internal buffers
  baseband/turbo_sw: support for optional CRC overlap
  bbdev: measure offload cost
  bbdev: split queue groups
  app/bbdev: update test vectors names
  app/bbdev: added new test vectors
  app/bbdev: improve readability of test application
  doc/turbo_sw: update Wireless Baseband Device documentation
  doc/bbdev: dynamic lib support
  doc: update tests and usage of test app description

 app/test-bbdev/Makefile                            |    2 +
 app/test-bbdev/test-bbdev.py                       |    2 +-
 app/test-bbdev/test_bbdev.c                        |   29 +-
 app/test-bbdev/test_bbdev_perf.c                   |  399 +++++--
 app/test-bbdev/test_bbdev_vector.c                 |    2 +
 app/test-bbdev/test_vectors/bbdev_null.data        |    5 +
 app/test-bbdev/test_vectors/bbdev_vector_null.data |    5 -
 .../test_vectors/bbdev_vector_td_default.data      |   54 -
 .../test_vectors/bbdev_vector_te_default.data      |   33 -
 .../turbo_dec_c1_k40_r0_e17280_sbd_negllr.data     |   57 +
 ...k6144_r0_e10376_crc24b_sbd_negllr_high_snr.data |  643 ++++++++++
 ..._k6144_r0_e10376_crc24b_sbd_negllr_low_snr.data |  643 ++++++++++
 .../turbo_dec_c1_k6144_r0_e34560_negllr.data       |  645 +++++++++++
 .../turbo_dec_c1_k6144_r0_e34560_posllr.data       |  645 +++++++++++
 .../turbo_dec_c1_k6144_r0_e34560_sbd_negllr.data   | 1224 +++++++++++++++++++
 .../turbo_dec_c1_k6144_r0_e34560_sbd_posllr.data   | 1225 ++++++++++++++++++++
 .../turbo_dec_c2_k3136_r0_e4920_sbd_negllr.data    |  676 +++++++++++
 ...bo_dec_c2_k3136_r0_e4920_sbd_negllr_crc24b.data |  677 +++++++++++
 .../test_vectors/turbo_enc_c1_k40_r0_e1190_rm.data |   36 +
 .../test_vectors/turbo_enc_c1_k40_r0_e1194_rm.data |   36 +
 .../test_vectors/turbo_enc_c1_k40_r0_e1196_rm.data |   36 +
 .../test_vectors/turbo_enc_c1_k40_r0_e272_rm.data  |   33 +
 .../turbo_enc_c1_k6144_r0_e120_rm_rvidx.data       |   63 +
 .../test_vectors/turbo_enc_c1_k6144_r0_e18444.data |  156 +++
 .../turbo_enc_c1_k6144_r0_e18448_crc24a.data       |  159 +++
 .../turbo_enc_c1_k6144_r0_e32256_crc24b_rm.data    |  180 +++
 .../turbo_enc_c2_k5952_r0_e17868_crc24b.data       |  300 +++++
 .../turbo_enc_c3_k4800_r2_e14412_crc24b.data       |  153 +++
 .../turbo_enc_c4_k4800_r2_e14412_crc24b.data       |  252 ++++
 app/test-bbdev/turbo_dec_default.data              |    1 +
 app/test-bbdev/turbo_enc_default.data              |    1 +
 config/common_base                                 |    5 +
 doc/guides/bbdevs/turbo_sw.rst                     |   58 +-
 doc/guides/prog_guide/bbdev.rst                    |  237 +++-
 doc/guides/rel_notes/release_18_05.rst             |   12 +
 doc/guides/tools/testbbdev.rst                     |  173 ++-
 drivers/baseband/null/bbdev_null.c                 |    3 +-
 drivers/baseband/turbo_sw/bbdev_turbo_software.c   |  267 +++--
 lib/librte_bbdev/rte_bbdev.c                       |   13 +-
 lib/librte_bbdev/rte_bbdev.h                       |    8 +-
 lib/librte_bbdev/rte_bbdev_op.h                    |   28 +-
 41 files changed, 8799 insertions(+), 377 deletions(-)
 create mode 100644 app/test-bbdev/test_vectors/bbdev_null.data
 delete mode 100644 app/test-bbdev/test_vectors/bbdev_vector_null.data
 delete mode 100644 app/test-bbdev/test_vectors/bbdev_vector_td_default.data
 delete mode 100644 app/test-bbdev/test_vectors/bbdev_vector_te_default.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c1_k40_r0_e17280_sbd_negllr.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c1_k6144_r0_e10376_crc24b_sbd_negllr_high_snr.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c1_k6144_r0_e10376_crc24b_sbd_negllr_low_snr.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c1_k6144_r0_e34560_negllr.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c1_k6144_r0_e34560_posllr.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c1_k6144_r0_e34560_sbd_negllr.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c1_k6144_r0_e34560_sbd_posllr.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c2_k3136_r0_e4920_sbd_negllr.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_dec_c2_k3136_r0_e4920_sbd_negllr_crc24b.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1190_rm.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1194_rm.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1196_rm.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e272_rm.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c1_k6144_r0_e120_rm_rvidx.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c1_k6144_r0_e18444.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c1_k6144_r0_e18448_crc24a.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c1_k6144_r0_e32256_crc24b_rm.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c2_k5952_r0_e17868_crc24b.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c3_k4800_r2_e14412_crc24b.data
 create mode 100644 app/test-bbdev/test_vectors/turbo_enc_c4_k4800_r2_e14412_crc24b.data
 create mode 120000 app/test-bbdev/turbo_dec_default.data
 create mode 120000 app/test-bbdev/turbo_enc_default.data
De Lara Guarch, Pablo May 9, 2018, 7:21 p.m. UTC | #2 
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Kamil Chalupnik
> Sent: Wednesday, May 9, 2018 3:15 PM
> To: dev@dpdk.org
> Cc: Mokhtar, Amr <amr.mokhtar@intel.com>; Chalupnik, KamilX
> <kamilx.chalupnik@intel.com>
> Subject: [dpdk-dev] [PATCH v2 00/14] Documentation and Turbo Software
> Baseband Device Update
> 

Applied to dpdk-next-crypto.
Thanks,

Pablo
diff mbox

Patch

diff --git a/doc/guides/bbdevs/turbo_sw.rst b/doc/guides/bbdevs/turbo_sw.rst
index b3fed16..996b2a2 100644
--- a/doc/guides/bbdevs/turbo_sw.rst
+++ b/doc/guides/bbdevs/turbo_sw.rst
@@ -40,24 +40,37 @@  FlexRAN SDK Download
 ~~~~~~~~~~~~~~~~~~~~
 
 To build DPDK with the *turbo_sw* PMD the user is required to download
-the export controlled ``FlexRAN SDK`` Libraries. An account at Intel Resource
-Design Center needs to be registered from
-`<https://www.intel.com/content/www/us/en/design/resource-design-center.html>`_.
+the export controlled ``FlexRAN SDK`` Libraries. An account at `Intel Resource
+Design Center <https://www.intel.com/content/www/us/en/design/resource-design-center.html>`_
+needs to be registered.
 
 Once registered, the user needs to log in, and look for
-*Intel SWA_SW_FlexRAN_Release_Package R1_3_0* and click for download. Or use
-this direct download link `<https://cdrd.intel.com/v1/dl/getContent/575367>`_.
+*Intel FlexRAN Software Release Package 1_4_0* to download or directly through
+this `link <https://cdrdv2.intel.com/v1/dl/getContent/576288>`_.
 
 After download is complete, the user needs to unpack and compile on their
 system before building DPDK.
 
+The following table maps DPDK versions with past FlexRAN SDK releases:
+
+.. _table_flexran_releases:
+
+.. table:: DPDK and FlexRAN SDK releases compliance
+
+   =====================  ============================
+   DPDK version           FlexRAN SDK release
+   =====================  ============================
+   18.02                  1.3.0
+   18.05                  1.4.0
+   =====================  ============================
+
 FlexRAN SDK Installation
 ~~~~~~~~~~~~~~~~~~~~~~~~
 
 The following are pre-requisites for building FlexRAN SDK Libraries:
  (a) An AVX2 supporting machine
  (b) Windriver TS 2 or CentOS 7 operating systems
- (c) Intel ICC compiler installed
+ (c) Intel ICC 17.0.3 compiler installed
 
 The following instructions should be followed in this exact order:
 
@@ -68,30 +81,19 @@  The following instructions should be followed in this exact order:
         source <path-to-icc-compiler-install-folder>/linux/bin/compilervars.sh intel64 -platform linux
 
 
-#. Extract the ``FlexRAN-1.3.0.tar.gz.zip`` package, then run the SDK extractor
-   script and accept the license:
+#. Extract the ``576288-576288-intel-swa-sw-flexran-release-package-r1-4-0.zip``
+   package, then run the SDK extractor script and accept the license:
 
     .. code-block:: console
 
-        cd <path-to-workspace>/FlexRAN-1.3.0/
-        ./SDK-R1.3.0.sh
-
-#. To allow ``FlexRAN SDK R1.3.0`` to work with bbdev properly, the following
-   hotfix is required. Change the return of function ``rate_matching_turbo_lte_avx2()``
-   located in file
-   ``<path-to-workspace>/FlexRAN-1.3.0/SDK-R1.3.0/sdk/source/phy/lib_rate_matching/phy_rate_match_avx2.cpp``
-   to return 0 instead of 1.
-
-    .. code-block:: c
-
-        -  return 1;
-        +  return 0;
+        cd <path-to-workspace>/FlexRAN-1.4.0/
+        ./SDK-R1.4.0.sh
 
 #. Generate makefiles based on system configuration:
 
     .. code-block:: console
 
-        cd <path-to-workspace>/FlexRAN-1.3.0/SDK-R1.3.0/sdk/
+        cd <path-to-workspace>/FlexRAN-1.4.0/SDK-R1.4.0/sdk/
         ./create-makefiles-linux.sh
 
 #. A build folder is generated in this form ``build-<ISA>-<CC>``, enter that
@@ -118,8 +120,8 @@  Example:
 
 .. code-block:: console
 
-    export FLEXRAN_SDK=<path-to-workspace>/FlexRAN-1.3.0/SDK-R1.3.0/sdk/build-avx2-icc/install
-    export DIR_WIRELESS_SDK=<path-to-workspace>/FlexRAN-1.3.0/SDK-R1.3.0/sdk/
+    export FLEXRAN_SDK=<path-to-workspace>/FlexRAN-1.4.0/SDK-R1.4.0/sdk/build-avx2-icc/install
+    export DIR_WIRELESS_SDK=<path-to-workspace>/FlexRAN-1.4.0/SDK-R1.4.0/sdk/
 
 
 * Set ``CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=y`` in DPDK common configuration
diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c
index 302abf5..26b8560 100644
--- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c
+++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c
@@ -462,6 +462,7 @@  process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
 	uint8_t *in, *out0, *out1, *out2, *tmp_out, *rm_out;
 	struct rte_bbdev_op_turbo_enc *enc = &op->turbo_enc;
 	struct bblib_crc_request crc_req;
+	struct bblib_crc_response crc_resp;
 	struct bblib_turbo_encoder_request turbo_req;
 	struct bblib_turbo_encoder_response turbo_resp;
 	struct bblib_rate_match_dl_request rm_req;
@@ -482,13 +483,11 @@  process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
 		 * it by 3 CRC bytes
 		 */
 		rte_memcpy(q->enc_in, in, (k - 24) >> 3);
-		crc_req.data = q->enc_in;
+		crc_req.data = in;
 		crc_req.len = (k - 24) >> 3;
-		if (bblib_lte_crc24a_gen(&crc_req) == -1) {
-			op->status |= 1 << RTE_BBDEV_CRC_ERROR;
-			rte_bbdev_log(ERR, "CRC24a generation failed");
-			return;
-		}
+		crc_resp.data = q->enc_in;
+		bblib_lte_crc24a_gen(&crc_req, &crc_resp);
+
 		in = q->enc_in;
 	} else if (enc->op_flags & RTE_BBDEV_TURBO_CRC_24B_ATTACH) {
 		/* CRC24B */
@@ -501,13 +500,11 @@  process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
 		 * it by 3 CRC bytes
 		 */
 		rte_memcpy(q->enc_in, in, (k - 24) >> 3);
-		crc_req.data = q->enc_in;
+		crc_req.data = in;
 		crc_req.len = (k - 24) >> 3;
-		if (bblib_lte_crc24b_gen(&crc_req) == -1) {
-			op->status |= 1 << RTE_BBDEV_CRC_ERROR;
-			rte_bbdev_log(ERR, "CRC24b generation failed");
-			return;
-		}
+		crc_resp.data = q->enc_in;
+		bblib_lte_crc24b_gen(&crc_req, &crc_resp);
+
 		in = q->enc_in;
 	} else {
 		ret = is_enc_input_valid(k, k_idx, total_left);