crypto/qat: enable asymmetric crypto on gen4 device
Checks
Commit Message
This commit enables asymmetric crypto in generation four
devices (4xxx).
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
doc/guides/cryptodevs/qat.rst | 1 +
drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 12 ++++++++----
2 files changed, 9 insertions(+), 4 deletions(-)
Comments
Acked-by: Ji, Kai <kai.ji@intel.com>
> -----Original Message-----
> From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> Sent: Thursday, April 7, 2022 10:47 AM
> To: dev@dpdk.org
> Cc: gakhil@marvell.com; Zhang, Roy Fan <roy.fan.zhang@intel.com>; Kusztal,
> ArkadiuszX <arkadiuszx.kusztal@intel.com>
> Subject: [PATCH] crypto/qat: enable asymmetric crypto on gen4 device
>
> This commit enables asymmetric crypto in generation four devices (4xxx).
>
> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> ---
> 2.30.2
> Acked-by: Ji, Kai <kai.ji@intel.com>
Please be consistent in Acks
Corrected this to
Acked-by: Kai Ji <kai.ji@intel.com>
>
> > This commit enables asymmetric crypto in generation four devices (4xxx).
> >
> > Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Applied to dpdk-next-crypto
@@ -169,6 +169,7 @@ poll mode crypto driver support for the following hardware accelerator devices:
* ``Intel QuickAssist Technology C3xxx``
* ``Intel QuickAssist Technology D15xx``
* ``Intel QuickAssist Technology C4xxx``
+* ``Intel QuickAssist Technology 4xxx``
The QAT ASYM PMD has support for:
@@ -375,8 +375,12 @@ RTE_INIT(qat_sym_crypto_gen4_init)
RTE_INIT(qat_asym_crypto_gen4_init)
{
- qat_asym_gen_dev_ops[QAT_GEN4].cryptodev_ops = NULL;
- qat_asym_gen_dev_ops[QAT_GEN4].get_capabilities = NULL;
- qat_asym_gen_dev_ops[QAT_GEN4].get_feature_flags = NULL;
- qat_asym_gen_dev_ops[QAT_GEN4].set_session = NULL;
+ qat_asym_gen_dev_ops[QAT_GEN4].cryptodev_ops =
+ &qat_asym_crypto_ops_gen1;
+ qat_asym_gen_dev_ops[QAT_GEN4].get_capabilities =
+ qat_asym_crypto_cap_get_gen1;
+ qat_asym_gen_dev_ops[QAT_GEN4].get_feature_flags =
+ qat_asym_crypto_feature_flags_get_gen1;
+ qat_asym_gen_dev_ops[QAT_GEN4].set_session =
+ qat_asym_crypto_set_session_gen1;
}