Message ID | 1438140121-9011-1-git-send-email-yong.liu@intel.com (mailing list archive) |
---|---|
State | Accepted, archived |
Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 5570FC4F0; Wed, 29 Jul 2015 05:22:10 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id BF463C4D4 for <dev@dpdk.org>; Wed, 29 Jul 2015 05:22:08 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP; 28 Jul 2015 20:22:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,568,1432623600"; d="scan'208";a="737593231" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga001.jf.intel.com with ESMTP; 28 Jul 2015 20:22:07 -0700 Received: from shecgisg003.sh.intel.com (shecgisg003.sh.intel.com [10.239.29.90]) by shvmail01.sh.intel.com with ESMTP id t6T3M4Cx025489; Wed, 29 Jul 2015 11:22:04 +0800 Received: from shecgisg003.sh.intel.com (localhost [127.0.0.1]) by shecgisg003.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t6T3M2xJ009047; Wed, 29 Jul 2015 11:22:04 +0800 Received: (from yliu84x@localhost) by shecgisg003.sh.intel.com (8.13.6/8.13.6/Submit) id t6T3M2AP009043; Wed, 29 Jul 2015 11:22:02 +0800 From: Yong Liu <yong.liu@intel.com> To: dev@dpdk.org Date: Wed, 29 Jul 2015 11:22:01 +0800 Message-Id: <1438140121-9011-1-git-send-email-yong.liu@intel.com> X-Mailer: git-send-email 1.7.4.1 Subject: [dpdk-dev] [PATCH] app test: fix mempool cache_size not match limited cache_size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK <dev.dpdk.org> List-Unsubscribe: <http://dpdk.org/ml/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://dpdk.org/ml/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <http://dpdk.org/ml/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> |
Commit Message
Marvin Liu
July 29, 2015, 3:22 a.m. UTC
From: Marvin Liu <yong.liu@intel.com> In previous setting, mempool size and cache_size are both 32. This is not satisfied with cache_size checking rule by now. Cache size should less than CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE and mempool size / 1.5. Signed-off-by: Marvin Liu <yong.liu@intel.com>
Comments
> -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Yong Liu > Sent: Wednesday, July 29, 2015 11:22 AM > To: dev@dpdk.org > Subject: [dpdk-dev] [PATCH] app test: fix mempool cache_size not match > limited cache_size > > From: Marvin Liu <yong.liu@intel.com> > > In previous setting, mempool size and cache_size are both 32. > This is not satisfied with cache_size checking rule by now. > Cache size should less than CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE and > mempool size / 1.5. > > Signed-off-by: Marvin Liu <yong.liu@intel.com> > Acked-by: Jingjing Wu <jingjing.wu@intel.com> > diff --git a/app/test/test_sched.c b/app/test/test_sched.c index > 1ef6910..7a38db3 100644 > --- a/app/test/test_sched.c > +++ b/app/test/test_sched.c > @@ -87,7 +87,7 @@ static struct rte_sched_port_params port_param = { > > #define NB_MBUF 32 > #define MBUF_DATA_SZ (2048 + RTE_PKTMBUF_HEADROOM) > -#define PKT_BURST_SZ 32 > +#define PKT_BURST_SZ 0 > #define MEMPOOL_CACHE_SZ PKT_BURST_SZ > #define SOCKET 0 > > -- > 1.9.3
2015-07-29 11:22, Yong Liu: > In previous setting, mempool size and cache_size are both 32. > This is not satisfied with cache_size checking rule by now. > Cache size should less than CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE and mempool size / 1.5. Sorry I don't really understand this explanation. > #define NB_MBUF 32 > #define MBUF_DATA_SZ (2048 + RTE_PKTMBUF_HEADROOM) > -#define PKT_BURST_SZ 32 > +#define PKT_BURST_SZ 0 > #define MEMPOOL_CACHE_SZ PKT_BURST_SZ Shouldn't be MEMPOOL_CACHE_SZ to set to 0?
Thanks Thomas. > -----Original Message----- > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com] > Sent: Monday, August 03, 2015 5:27 AM > To: Liu, Yong > Cc: dev@dpdk.org; olivier.matz@6wind.com; Wu, Jingjing > Subject: Re: [dpdk-dev] [PATCH] app test: fix mempool cache_size not match > limited cache_size > > 2015-07-29 11:22, Yong Liu: > > In previous setting, mempool size and cache_size are both 32. > > This is not satisfied with cache_size checking rule by now. > > Cache size should less than CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE and > mempool size / 1.5. > > Sorry I don't really understand this explanation. > This information is stripped from the description for parameter cache_size of function rte_mempool_create. Now rte_mempool_create function will check cache_size value less than mempool size /1.5. In test_sched.c, mempool size and cache size are all 32 and not match mempool cache size checking rule. This will cause sched_autotest not work. > > #define NB_MBUF 32 > > #define MBUF_DATA_SZ (2048 + RTE_PKTMBUF_HEADROOM) > > -#define PKT_BURST_SZ 32 > > +#define PKT_BURST_SZ 0 > > #define MEMPOOL_CACHE_SZ PKT_BURST_SZ > > Shouldn't be MEMPOOL_CACHE_SZ to set to 0? Macro PKT_BURST_SZ not used in this file, MEMPOOL_CACHE_SZ should be set to 0.
> > From: Marvin Liu <yong.liu@intel.com> > > > > In previous setting, mempool size and cache_size are both 32. > > This is not satisfied with cache_size checking rule by now. > > Cache size should less than CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE and > > mempool size / 1.5. > > > > Signed-off-by: Marvin Liu <yong.liu@intel.com> > > > Acked-by: Jingjing Wu <jingjing.wu@intel.com> > > #define NB_MBUF 32 > > #define MBUF_DATA_SZ (2048 + RTE_PKTMBUF_HEADROOM) > > -#define PKT_BURST_SZ 32 > > +#define PKT_BURST_SZ 0 > > #define MEMPOOL_CACHE_SZ PKT_BURST_SZ > > #define SOCKET 0 Applied after removing PKT_BURST_SZ, thanks
diff --git a/app/test/test_sched.c b/app/test/test_sched.c index 1ef6910..7a38db3 100644 --- a/app/test/test_sched.c +++ b/app/test/test_sched.c @@ -87,7 +87,7 @@ static struct rte_sched_port_params port_param = { #define NB_MBUF 32 #define MBUF_DATA_SZ (2048 + RTE_PKTMBUF_HEADROOM) -#define PKT_BURST_SZ 32 +#define PKT_BURST_SZ 0 #define MEMPOOL_CACHE_SZ PKT_BURST_SZ #define SOCKET 0