net/mlx5: update GENEVE TLV option exist bit

Message ID 20210531114543.9881-1-shirik@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: update GENEVE TLV option exist bit |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues
ci/intel-Testing success Testing PASS
ci/github-robot success github build: passed
ci/iol-intel-Functional fail Functional Testing issues
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-testing fail Testing issues

Commit Message

Shiri Kuzin May 31, 2021, 11:45 a.m. UTC
  The GENEVE TLV option matching is done using a flex parser.

Recent update in firmware, requires that in order to match on the
GENEVE TLV option the "geneve_tlv_option_0_exist" bit should be set.

Add the new "geneve_tlv_option_0_exist" setting when translating the
GENEVE TLV option item.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/common/mlx5/mlx5_prm.h  | 3 ++-
 drivers/net/mlx5/mlx5_flow_dv.c | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)
  

Comments

Raslan Darawsheh June 6, 2021, 11:32 a.m. UTC | #1
Hi Shiri,

> -----Original Message-----
> From: Shiri Kuzin <shirik@nvidia.com>
> Sent: Monday, May 31, 2021 2:46 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>
> Subject: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> 
> The GENEVE TLV option matching is done using a flex parser.
> 
> Recent update in firmware, requires that in order to match on the GENEVE
> TLV option the "geneve_tlv_option_0_exist" bit should be set.
> 
> Add the new "geneve_tlv_option_0_exist" setting when translating the
> GENEVE TLV option item.
> 
> Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> ---

This is a valid Patch for Stable, so I'll add it during integration
Cc:stable@dpdk.org

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  
Shiri Kuzin June 24, 2021, 8:55 a.m. UTC | #2
This patch will be removed for now until FW support is fully done and be added when the support is completed.

Regards,
Shiri

> -----Original Message-----
> From: Raslan Darawsheh <rasland@nvidia.com>
> Sent: Sunday, June 6, 2021 2:32 PM
> To: Shiri Kuzin <shirik@nvidia.com>; dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; stable@dpdk.org
> Subject: RE: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> 
> Hi Shiri,
> 
> > -----Original Message-----
> > From: Shiri Kuzin <shirik@nvidia.com>
> > Sent: Monday, May 31, 2021 2:46 PM
> > To: dev@dpdk.org
> > Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh
> > <rasland@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>
> > Subject: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> >
> > The GENEVE TLV option matching is done using a flex parser.
> >
> > Recent update in firmware, requires that in order to match on the
> > GENEVE TLV option the "geneve_tlv_option_0_exist" bit should be set.
> >
> > Add the new "geneve_tlv_option_0_exist" setting when translating the
> > GENEVE TLV option item.
> >
> > Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
> > Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> > ---
> 
> This is a valid Patch for Stable, so I'll add it during integration
> Cc:stable@dpdk.org
> 
> Patch applied to next-net-mlx,
> 
> Kindest regards,
> Raslan Darawsheh
  
Raslan Darawsheh June 24, 2021, 11:20 a.m. UTC | #3
Ok dropping this patch from next-net-mlx,

Kindest regards,
Raslan Darawsheh

> -----Original Message-----
> From: Shiri Kuzin <shirik@nvidia.com>
> Sent: Thursday, June 24, 2021 11:55 AM
> To: Raslan Darawsheh <rasland@nvidia.com>; dev@dpdk.org
> Cc: stable@dpdk.org
> Subject: RE: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> 
> This patch will be removed for now until FW support is fully done and be
> added when the support is completed.
> 
> Regards,
> Shiri
> 
> > -----Original Message-----
> > From: Raslan Darawsheh <rasland@nvidia.com>
> > Sent: Sunday, June 6, 2021 2:32 PM
> > To: Shiri Kuzin <shirik@nvidia.com>; dev@dpdk.org
> > Cc: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> > <viacheslavo@nvidia.com>; stable@dpdk.org
> > Subject: RE: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> >
> > Hi Shiri,
> >
> > > -----Original Message-----
> > > From: Shiri Kuzin <shirik@nvidia.com>
> > > Sent: Monday, May 31, 2021 2:46 PM
> > > To: dev@dpdk.org
> > > Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh
> > > <rasland@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>
> > > Subject: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> > >
> > > The GENEVE TLV option matching is done using a flex parser.
> > >
> > > Recent update in firmware, requires that in order to match on the
> > > GENEVE TLV option the "geneve_tlv_option_0_exist" bit should be set.
> > >
> > > Add the new "geneve_tlv_option_0_exist" setting when translating the
> > > GENEVE TLV option item.
> > >
> > > Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
> > > Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> > > ---
> >
> > This is a valid Patch for Stable, so I'll add it during integration
> > Cc:stable@dpdk.org
> >
> > Patch applied to next-net-mlx,
> >
> > Kindest regards,
> > Raslan Darawsheh
  
Raslan Darawsheh Aug. 22, 2021, 10:47 a.m. UTC | #4
Hi,

> -----Original Message-----
> From: Raslan Darawsheh
> Sent: Thursday, June 24, 2021 2:20 PM
> To: Shiri Kuzin <shirik@nvidia.com>; dev@dpdk.org
> Cc: stable@dpdk.org
> Subject: RE: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> 
> Ok dropping this patch from next-net-mlx,
> 
> Kindest regards,
> Raslan Darawsheh
> 
> > -----Original Message-----
> > From: Shiri Kuzin <shirik@nvidia.com>
> > Sent: Thursday, June 24, 2021 11:55 AM
> > To: Raslan Darawsheh <rasland@nvidia.com>; dev@dpdk.org
> > Cc: stable@dpdk.org
> > Subject: RE: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> >
> > This patch will be removed for now until FW support is fully done and
> > be added when the support is completed.
> >
> > Regards,
> > Shiri
> >
> > > -----Original Message-----
> > > From: Raslan Darawsheh <rasland@nvidia.com>
> > > Sent: Sunday, June 6, 2021 2:32 PM
> > > To: Shiri Kuzin <shirik@nvidia.com>; dev@dpdk.org
> > > Cc: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> > > <viacheslavo@nvidia.com>; stable@dpdk.org
> > > Subject: RE: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> > >
> > > Hi Shiri,
> > >
> > > > -----Original Message-----
> > > > From: Shiri Kuzin <shirik@nvidia.com>
> > > > Sent: Monday, May 31, 2021 2:46 PM
> > > > To: dev@dpdk.org
> > > > Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh
> > > > <rasland@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>
> > > > Subject: [PATCH] net/mlx5: update GENEVE TLV option exist bit
> > > >
> > > > The GENEVE TLV option matching is done using a flex parser.
> > > >
> > > > Recent update in firmware, requires that in order to match on the
> > > > GENEVE TLV option the "geneve_tlv_option_0_exist" bit should be set.
> > > >
> > > > Add the new "geneve_tlv_option_0_exist" setting when translating
> > > > the GENEVE TLV option item.
> > > >
> > > > Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
> > > > Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> > > > ---
> > >
> > > This is a valid Patch for Stable, so I'll add it during integration
> > > Cc:stable@dpdk.org
> > >
> > > Patch applied to next-net-mlx,
> > >
> > > Kindest regards,
> > > Raslan Darawsheh

FW has prober fix for it, 
So applying the patch again to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 26761f5bd3..3e4e6fa216 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -853,7 +853,8 @@  struct mlx5_ifc_fte_match_set_misc_bits {
 	u8 vxlan_vni[0x18];
 	u8 reserved_at_b8[0x8];
 	u8 geneve_vni[0x18];
-	u8 reserved_at_e4[0x7];
+	u8 reserved_at_e4[0x6];
+	u8 geneve_tlv_option_0_exist[0x1];
 	u8 geneve_oam[0x1];
 	u8 reserved_at_e0[0xc];
 	u8 outer_ipv6_flow_label[0x14];
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index c50649a107..f009689cff 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -8939,6 +8939,8 @@  flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
 		MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
 			 geneve_opt_v->option_len + 1);
 	}
+	MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
+	MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
 	/* Set the data. */
 	if (geneve_opt_v->data) {
 		memcpy(&opt_data_key, geneve_opt_v->data,