From: Thomas Monjalon
> 29/04/2021 17:43, Matan Azrad:
> > From: Dekel Peled <dekelp@nvidia.com>
> >
> > This patch adds support of write operation to NIC registers.
> >
> > Signed-off-by: Dekel Peled <dekelp@nvidia.com>
> > Acked-by: Matan Azrad <matan@nvidia.com>
> > ---
> > --- a/drivers/common/mlx5/version.map
> > +++ b/drivers/common/mlx5/version.map
> > @@ -13,8 +13,17 @@ INTERNAL {
> > mlx5_dev_to_pci_addr; # WINDOWS_NO_EXPORT
> >
> > mlx5_devx_cmd_alloc_pd;
> > + mlx5_devx_alloc_uar;
>
> Please keep alphabetical order.
>
> > +
> > mlx5_devx_cmd_create_cq;
> > + mlx5_devx_cmd_create_credential_obj;
> > + mlx5_devx_cmd_create_crypto_login_obj;
> > + mlx5_devx_cmd_create_dek_obj;
> > mlx5_devx_cmd_create_flex_parser;
> > + mlx5_devx_cmd_create_flow_hit_aso_obj;
> > + mlx5_devx_cmd_create_flow_meter_aso_obj;
> > + mlx5_devx_cmd_create_geneve_tlv_option;
> > + mlx5_devx_cmd_create_import_kek_obj;
> > mlx5_devx_cmd_create_qp;
> > mlx5_devx_cmd_create_rq;
> > mlx5_devx_cmd_create_rqt;
> > @@ -24,13 +33,6 @@ INTERNAL {
> > mlx5_devx_cmd_create_tis;
> > mlx5_devx_cmd_create_virtio_q_counters; # WINDOWS_NO_EXPORT
> > mlx5_devx_cmd_create_virtq;
> > - mlx5_devx_cmd_create_flow_hit_aso_obj;
> > - mlx5_devx_cmd_create_flow_meter_aso_obj;
> > - mlx5_devx_cmd_create_geneve_tlv_option;
> > - mlx5_devx_cmd_create_dek_obj;
> > - mlx5_devx_cmd_create_import_kek_obj;
> > - mlx5_devx_cmd_create_credential_obj;
> > - mlx5_devx_cmd_create_crypto_login_obj;
>
> Are they changes of previous patches?
> It seems some cleaning is required in previous patches.
Yes, this one tried to do the cleaning, I will handle it in the first patch (of this series) accessing this file.
> > mlx5_devx_cmd_destroy;
> > mlx5_devx_cmd_flow_counter_alloc;
> > mlx5_devx_cmd_flow_counter_query; @@ -51,12 +53,17 @@
> INTERNAL {
> > mlx5_devx_cmd_queue_counter_alloc; # WINDOWS_NO_EXPORT
> > mlx5_devx_cmd_queue_counter_query; # WINDOWS_NO_EXPORT
> > mlx5_devx_cmd_register_read;
> > + mlx5_devx_cmd_register_write;
> > mlx5_devx_cmd_wq_query; # WINDOWS_NO_EXPORT
> > mlx5_devx_get_out_command_status;
> > mlx5_devx_alloc_uar; # WINDOWS_NO_EXPORT
> >
> > +
> > mlx5_devx_cq_create;
>
> There is an extra blank line here.
>
>
@@ -12,7 +12,6 @@
#include "mlx5_common_log.h"
#include "mlx5_malloc.h"
-
/**
* Perform read access to the registers. Reads data from register
* and writes ones to the specified buffer.
@@ -61,7 +60,7 @@ mlx5_devx_cmd_register_read(void *ctx, uint16_t reg_id, uint32_t arg,
if (status) {
int syndrome = MLX5_GET(access_register_out, out, syndrome);
- DRV_LOG(DEBUG, "Failed to access NIC register 0x%X, "
+ DRV_LOG(DEBUG, "Failed to read access NIC register 0x%X, "
"status %x, syndrome = %x",
reg_id, status, syndrome);
return -1;
@@ -74,6 +73,70 @@ mlx5_devx_cmd_register_read(void *ctx, uint16_t reg_id, uint32_t arg,
return rc;
}
+/**
+ * Perform write access to the registers.
+ *
+ * @param[in] ctx
+ * Context returned from mlx5 open_device() glue function.
+ * @param[in] reg_id
+ * Register identifier according to the PRM.
+ * @param[in] arg
+ * Register access auxiliary parameter according to the PRM.
+ * @param[out] data
+ * Pointer to the buffer containing data to write.
+ * @param[in] dw_cnt
+ * Buffer size in double words (32bit units).
+ *
+ * @return
+ * 0 on success, a negative value otherwise.
+ */
+int
+mlx5_devx_cmd_register_write(void *ctx, uint16_t reg_id, uint32_t arg,
+ uint32_t *data, uint32_t dw_cnt)
+{
+ uint32_t in[MLX5_ST_SZ_DW(access_register_in) +
+ MLX5_ACCESS_REGISTER_DATA_DWORD_MAX] = {0};
+ uint32_t out[MLX5_ST_SZ_DW(access_register_out)] = {0};
+ int status, rc;
+ void *ptr;
+
+ MLX5_ASSERT(data && dw_cnt);
+ MLX5_ASSERT(dw_cnt <= MLX5_ACCESS_REGISTER_DATA_DWORD_MAX);
+ if (dw_cnt > MLX5_ACCESS_REGISTER_DATA_DWORD_MAX) {
+ DRV_LOG(ERR, "Data to write exceeds max size");
+ return -1;
+ }
+ MLX5_SET(access_register_in, in, opcode,
+ MLX5_CMD_OP_ACCESS_REGISTER_USER);
+ MLX5_SET(access_register_in, in, op_mod,
+ MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE);
+ MLX5_SET(access_register_in, in, register_id, reg_id);
+ MLX5_SET(access_register_in, in, argument, arg);
+ ptr = MLX5_ADDR_OF(access_register_in, in, register_data);
+ memcpy(ptr, data, dw_cnt * sizeof(uint32_t));
+ rc = mlx5_glue->devx_general_cmd(ctx, in, sizeof(in), out, sizeof(out));
+
+ rc = mlx5_glue->devx_general_cmd(ctx, in,
+ MLX5_ST_SZ_BYTES(access_register_in) +
+ dw_cnt * sizeof(uint32_t),
+ out, sizeof(out));
+ if (rc)
+ goto error;
+ status = MLX5_GET(access_register_out, out, status);
+ if (status) {
+ int syndrome = MLX5_GET(access_register_out, out, syndrome);
+
+ DRV_LOG(DEBUG, "Failed to write access NIC register 0x%X, "
+ "status %x, syndrome = %x",
+ reg_id, status, syndrome);
+ return -1;
+ }
+ return 0;
+error:
+ rc = (rc > 0) ? -rc : rc;
+ return rc;
+}
+
/**
* Allocate flow counters via devx interface.
*
@@ -566,6 +566,10 @@ __rte_internal
int mlx5_devx_cmd_register_read(void *ctx, uint16_t reg_id,
uint32_t arg, uint32_t *data, uint32_t dw_cnt);
+__rte_internal
+int mlx5_devx_cmd_register_write(void *ctx, uint16_t reg_id,
+ uint32_t arg, uint32_t *data, uint32_t dw_cnt);
+
__rte_internal
struct mlx5_devx_obj *
mlx5_devx_cmd_create_geneve_tlv_option(void *ctx,
@@ -13,8 +13,17 @@ INTERNAL {
mlx5_dev_to_pci_addr; # WINDOWS_NO_EXPORT
mlx5_devx_cmd_alloc_pd;
+ mlx5_devx_alloc_uar;
+
mlx5_devx_cmd_create_cq;
+ mlx5_devx_cmd_create_credential_obj;
+ mlx5_devx_cmd_create_crypto_login_obj;
+ mlx5_devx_cmd_create_dek_obj;
mlx5_devx_cmd_create_flex_parser;
+ mlx5_devx_cmd_create_flow_hit_aso_obj;
+ mlx5_devx_cmd_create_flow_meter_aso_obj;
+ mlx5_devx_cmd_create_geneve_tlv_option;
+ mlx5_devx_cmd_create_import_kek_obj;
mlx5_devx_cmd_create_qp;
mlx5_devx_cmd_create_rq;
mlx5_devx_cmd_create_rqt;
@@ -24,13 +33,6 @@ INTERNAL {
mlx5_devx_cmd_create_tis;
mlx5_devx_cmd_create_virtio_q_counters; # WINDOWS_NO_EXPORT
mlx5_devx_cmd_create_virtq;
- mlx5_devx_cmd_create_flow_hit_aso_obj;
- mlx5_devx_cmd_create_flow_meter_aso_obj;
- mlx5_devx_cmd_create_geneve_tlv_option;
- mlx5_devx_cmd_create_dek_obj;
- mlx5_devx_cmd_create_import_kek_obj;
- mlx5_devx_cmd_create_credential_obj;
- mlx5_devx_cmd_create_crypto_login_obj;
mlx5_devx_cmd_destroy;
mlx5_devx_cmd_flow_counter_alloc;
mlx5_devx_cmd_flow_counter_query;
@@ -51,12 +53,17 @@ INTERNAL {
mlx5_devx_cmd_queue_counter_alloc; # WINDOWS_NO_EXPORT
mlx5_devx_cmd_queue_counter_query; # WINDOWS_NO_EXPORT
mlx5_devx_cmd_register_read;
+ mlx5_devx_cmd_register_write;
mlx5_devx_cmd_wq_query; # WINDOWS_NO_EXPORT
mlx5_devx_get_out_command_status;
mlx5_devx_alloc_uar; # WINDOWS_NO_EXPORT
+
mlx5_devx_cq_create;
mlx5_devx_cq_destroy;
+
+ mlx5_devx_get_out_command_status;
+
mlx5_devx_rq_create;
mlx5_devx_rq_destroy;
mlx5_devx_sq_create;