Message ID | 20200807155859.63888-1-ciara.power@intel.com (mailing list archive) |
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Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 50D2BA04B0; Fri, 7 Aug 2020 18:06:30 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 81ACE2BF1; Fri, 7 Aug 2020 18:06:29 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id C295D2B84 for <dev@dpdk.org>; Fri, 7 Aug 2020 18:06:27 +0200 (CEST) IronPort-SDR: qSoud/ESgQ2NlscqugbqIwxavKSE47S5tUkvyTEXj0VwUZM5OK1UMKHkKrLQ880kaCkNhlMGff Eq1BErUa0Myw== X-IronPort-AV: E=McAfee;i="6000,8403,9705"; a="171183016" X-IronPort-AV: E=Sophos;i="5.75,446,1589266800"; d="scan'208";a="171183016" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2020 09:06:26 -0700 IronPort-SDR: CwGNUE8j1xsAuJix2d3SwGnsJFJHNDLtJXVYcE9Ys9lKbrz17ti0Q1WgFvIK//lqGbL7SKJf64 ns0FpkEsZIWg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,446,1589266800"; d="scan'208";a="275407853" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 07 Aug 2020 09:06:25 -0700 From: Ciara Power <ciara.power@intel.com> To: dev@dpdk.org Cc: bruce.richardson@intel.com, Ciara Power <ciara.power@intel.com> Date: Fri, 7 Aug 2020 16:58:47 +0100 Message-Id: <20200807155859.63888-1-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 Subject: [dpdk-dev] [PATCH 20.11 00/12] add max SIMD bitwidth to EAL X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> |
Series |
add max SIMD bitwidth to EAL
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Message
Power, Ciara
Aug. 7, 2020, 3:58 p.m. UTC
A number of components in DPDK have optional AVX-512 or other vector code paths which can be selected at runtime. Rather than having each component provide its own mechanism to select a code path, this patchset adds support for a single setting to control what code paths are used. This can be used to enable some non-default code paths e.g. ones using AVX-512, but also to limit the code paths to certain vector widths, or to scalar code only, which is useful for testing. The max SIMD bitwidth setting can be set by the app itself through use of the available API, or can be overriden by a commandline argument passed by the user. Ciara Power (12): eal: add max SIMD bitwidth eal: add default SIMD bitwidth values net/i40e: add checks for max SIMD bitwidth net/axgbe: add checks for max SIMD bitwidth net/bnxt: add checks for max SIMD bitwidth net/enic: add checks for max SIMD bitwidth net/fm10k: add checks for max SIMD bitwidth net/iavf: add checks for max SIMD bitwidth net/ice: add checks for max SIMD bitwidth net/ixgbe: add checks for max SIMD bitwidth net/mlx5: add checks for max SIMD bitwidth net/virtio: add checks for max SIMD bitwidth drivers/net/axgbe/axgbe_rxtx.c | 3 +- drivers/net/bnxt/bnxt_ethdev.c | 6 ++- drivers/net/enic/enic_rxtx_vec_avx2.c | 3 +- drivers/net/fm10k/fm10k_ethdev.c | 11 ++-- drivers/net/i40e/i40e_rxtx.c | 19 ++++--- drivers/net/iavf/iavf_rxtx.c | 16 +++--- drivers/net/ice/ice_rxtx.c | 20 ++++--- drivers/net/ixgbe/ixgbe_rxtx.c | 7 ++- drivers/net/mlx5/mlx5_ethdev.c | 3 +- drivers/net/virtio/virtio_ethdev.c | 12 +++-- lib/librte_eal/arm/include/rte_vect.h | 2 + lib/librte_eal/common/eal_common_options.c | 63 ++++++++++++++++++++++ lib/librte_eal/common/eal_internal_cfg.h | 8 +++ lib/librte_eal/common/eal_options.h | 2 + lib/librte_eal/include/generic/rte_vect.h | 2 + lib/librte_eal/include/rte_eal.h | 31 +++++++++++ lib/librte_eal/ppc/include/rte_vect.h | 2 + lib/librte_eal/rte_eal_version.map | 4 ++ lib/librte_eal/x86/include/rte_vect.h | 2 + 19 files changed, 184 insertions(+), 32 deletions(-)
Comments
On Fri, 7 Aug 2020 16:58:47 +0100 Ciara Power <ciara.power@intel.com> wrote: > A number of components in DPDK have optional AVX-512 or other vector > code paths which can be selected at runtime. Rather than having each > component provide its own mechanism to select a code path, this patchset > adds support for a single setting to control what code paths are used. > This can be used to enable some non-default code paths e.g. ones using > AVX-512, but also to limit the code paths to certain vector widths, or > to scalar code only, which is useful for testing. > > The max SIMD bitwidth setting can be set by the app itself through use of > the available API, or can be overriden by a commandline argument passed by > the user. > > Ciara Power (12): > eal: add max SIMD bitwidth > eal: add default SIMD bitwidth values > net/i40e: add checks for max SIMD bitwidth > net/axgbe: add checks for max SIMD bitwidth > net/bnxt: add checks for max SIMD bitwidth > net/enic: add checks for max SIMD bitwidth > net/fm10k: add checks for max SIMD bitwidth > net/iavf: add checks for max SIMD bitwidth > net/ice: add checks for max SIMD bitwidth > net/ixgbe: add checks for max SIMD bitwidth > net/mlx5: add checks for max SIMD bitwidth > net/virtio: add checks for max SIMD bitwidth > > drivers/net/axgbe/axgbe_rxtx.c | 3 +- > drivers/net/bnxt/bnxt_ethdev.c | 6 ++- > drivers/net/enic/enic_rxtx_vec_avx2.c | 3 +- > drivers/net/fm10k/fm10k_ethdev.c | 11 ++-- > drivers/net/i40e/i40e_rxtx.c | 19 ++++--- > drivers/net/iavf/iavf_rxtx.c | 16 +++--- > drivers/net/ice/ice_rxtx.c | 20 ++++--- > drivers/net/ixgbe/ixgbe_rxtx.c | 7 ++- > drivers/net/mlx5/mlx5_ethdev.c | 3 +- > drivers/net/virtio/virtio_ethdev.c | 12 +++-- > lib/librte_eal/arm/include/rte_vect.h | 2 + > lib/librte_eal/common/eal_common_options.c | 63 ++++++++++++++++++++++ > lib/librte_eal/common/eal_internal_cfg.h | 8 +++ > lib/librte_eal/common/eal_options.h | 2 + > lib/librte_eal/include/generic/rte_vect.h | 2 + > lib/librte_eal/include/rte_eal.h | 31 +++++++++++ > lib/librte_eal/ppc/include/rte_vect.h | 2 + > lib/librte_eal/rte_eal_version.map | 4 ++ > lib/librte_eal/x86/include/rte_vect.h | 2 + > 19 files changed, 184 insertions(+), 32 deletions(-) > This looks useful, could you add some documentation on rationale and how you expect application to set it.
Hi Stephen, To give an overview of the rationale behind the patchset: - It allows other apps such as OVS and VPP which already make use of AVX-512 to indicate that they are happy for DPDK to use AVX-512 too. - It allows the end-user to override those settings if so desired. - It allows an easy way for the user to test with different vector paths by limiting bitwidths. I can add some documentation for this in a v2, thanks for the suggestion. - Ciara >-----Original Message----- >From: Stephen Hemminger <stephen@networkplumber.org> >Sent: Friday 7 August 2020 17:19 >To: Power, Ciara <ciara.power@intel.com> >Cc: dev@dpdk.org; Richardson, Bruce <bruce.richardson@intel.com> >Subject: Re: [dpdk-dev] [PATCH 20.11 00/12] add max SIMD bitwidth to EAL > >On Fri, 7 Aug 2020 16:58:47 +0100 >Ciara Power <ciara.power@intel.com> wrote: > >> A number of components in DPDK have optional AVX-512 or other vector >> code paths which can be selected at runtime. Rather than having each >> component provide its own mechanism to select a code path, this >> patchset adds support for a single setting to control what code paths are >used. >> This can be used to enable some non-default code paths e.g. ones using >> AVX-512, but also to limit the code paths to certain vector widths, or >> to scalar code only, which is useful for testing. >> >> The max SIMD bitwidth setting can be set by the app itself through use >> of the available API, or can be overriden by a commandline argument >> passed by the user. >> >> Ciara Power (12): >> eal: add max SIMD bitwidth >> eal: add default SIMD bitwidth values >> net/i40e: add checks for max SIMD bitwidth >> net/axgbe: add checks for max SIMD bitwidth >> net/bnxt: add checks for max SIMD bitwidth >> net/enic: add checks for max SIMD bitwidth >> net/fm10k: add checks for max SIMD bitwidth >> net/iavf: add checks for max SIMD bitwidth >> net/ice: add checks for max SIMD bitwidth >> net/ixgbe: add checks for max SIMD bitwidth >> net/mlx5: add checks for max SIMD bitwidth >> net/virtio: add checks for max SIMD bitwidth >> >> drivers/net/axgbe/axgbe_rxtx.c | 3 +- >> drivers/net/bnxt/bnxt_ethdev.c | 6 ++- >> drivers/net/enic/enic_rxtx_vec_avx2.c | 3 +- >> drivers/net/fm10k/fm10k_ethdev.c | 11 ++-- >> drivers/net/i40e/i40e_rxtx.c | 19 ++++--- >> drivers/net/iavf/iavf_rxtx.c | 16 +++--- >> drivers/net/ice/ice_rxtx.c | 20 ++++--- >> drivers/net/ixgbe/ixgbe_rxtx.c | 7 ++- >> drivers/net/mlx5/mlx5_ethdev.c | 3 +- >> drivers/net/virtio/virtio_ethdev.c | 12 +++-- >> lib/librte_eal/arm/include/rte_vect.h | 2 + >> lib/librte_eal/common/eal_common_options.c | 63 >++++++++++++++++++++++ >> lib/librte_eal/common/eal_internal_cfg.h | 8 +++ >> lib/librte_eal/common/eal_options.h | 2 + >> lib/librte_eal/include/generic/rte_vect.h | 2 + >> lib/librte_eal/include/rte_eal.h | 31 +++++++++++ >> lib/librte_eal/ppc/include/rte_vect.h | 2 + >> lib/librte_eal/rte_eal_version.map | 4 ++ >> lib/librte_eal/x86/include/rte_vect.h | 2 + >> 19 files changed, 184 insertions(+), 32 deletions(-) >> > >This looks useful, could you add some documentation on rationale and how >you expect application to set it.
Hi Ciara, I have not reviewed other patches in this series yet. Few questions inline. > -----Original Message----- > From: dev <dev-bounces@dpdk.org> On Behalf Of Ciara Power > Sent: Friday, August 7, 2020 10:59 AM > To: dev@dpdk.org > Cc: bruce.richardson@intel.com; Ciara Power <ciara.power@intel.com> > Subject: [dpdk-dev] [PATCH 20.11 00/12] add max SIMD bitwidth to EAL > > A number of components in DPDK have optional AVX-512 or other vector code > paths which can be selected at runtime. Rather than having each component > provide its own mechanism to select a code path, this patchset adds support > for a single setting to control what code paths are used. Do you mean that all the components will have to use AVX-512? IMO, different libraries might behave differently to the use of different vector sizes. Are we taking away the ability to use different vector sizes for different components. > This can be used to enable some non-default code paths e.g. ones using AVX- > 512, but also to limit the code paths to certain vector widths, or to scalar > code only, which is useful for testing. > > The max SIMD bitwidth setting can be set by the app itself through use of the > available API, or can be overriden by a commandline argument passed by the > user. Arm platforms support SVE (scalable vector extensions) feature. With this feature, the code is agnostic to the vector size. i.e. same code can run on various vector sizes. There is no code yet in DPDK with this feature. But, it will be added in the near future. It would be good to handle this now so that we do not have issues in the future.. > > Ciara Power (12): > eal: add max SIMD bitwidth > eal: add default SIMD bitwidth values > net/i40e: add checks for max SIMD bitwidth > net/axgbe: add checks for max SIMD bitwidth > net/bnxt: add checks for max SIMD bitwidth > net/enic: add checks for max SIMD bitwidth > net/fm10k: add checks for max SIMD bitwidth > net/iavf: add checks for max SIMD bitwidth > net/ice: add checks for max SIMD bitwidth > net/ixgbe: add checks for max SIMD bitwidth > net/mlx5: add checks for max SIMD bitwidth > net/virtio: add checks for max SIMD bitwidth > > drivers/net/axgbe/axgbe_rxtx.c | 3 +- > drivers/net/bnxt/bnxt_ethdev.c | 6 ++- > drivers/net/enic/enic_rxtx_vec_avx2.c | 3 +- > drivers/net/fm10k/fm10k_ethdev.c | 11 ++-- > drivers/net/i40e/i40e_rxtx.c | 19 ++++--- > drivers/net/iavf/iavf_rxtx.c | 16 +++--- > drivers/net/ice/ice_rxtx.c | 20 ++++--- > drivers/net/ixgbe/ixgbe_rxtx.c | 7 ++- > drivers/net/mlx5/mlx5_ethdev.c | 3 +- > drivers/net/virtio/virtio_ethdev.c | 12 +++-- > lib/librte_eal/arm/include/rte_vect.h | 2 + > lib/librte_eal/common/eal_common_options.c | 63 > ++++++++++++++++++++++ > lib/librte_eal/common/eal_internal_cfg.h | 8 +++ > lib/librte_eal/common/eal_options.h | 2 + > lib/librte_eal/include/generic/rte_vect.h | 2 + > lib/librte_eal/include/rte_eal.h | 31 +++++++++++ > lib/librte_eal/ppc/include/rte_vect.h | 2 + > lib/librte_eal/rte_eal_version.map | 4 ++ > lib/librte_eal/x86/include/rte_vect.h | 2 + > 19 files changed, 184 insertions(+), 32 deletions(-) > > -- > 2.17.1
Hi Honnappa, >-----Original Message----- >From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> >Sent: Tuesday 11 August 2020 06:37 >To: Power, Ciara <ciara.power@intel.com>; dev@dpdk.org >Cc: Richardson, Bruce <bruce.richardson@intel.com>; nd <nd@arm.com>; >Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>; nd ><nd@arm.com> >Subject: RE: [dpdk-dev] [PATCH 20.11 00/12] add max SIMD bitwidth to EAL > >Hi Ciara, > I have not reviewed other patches in this series yet. Few questions >inline. > >> -----Original Message----- >> From: dev <dev-bounces@dpdk.org> On Behalf Of Ciara Power >> Sent: Friday, August 7, 2020 10:59 AM >> To: dev@dpdk.org >> Cc: bruce.richardson@intel.com; Ciara Power <ciara.power@intel.com> >> Subject: [dpdk-dev] [PATCH 20.11 00/12] add max SIMD bitwidth to EAL >> >> A number of components in DPDK have optional AVX-512 or other vector >> code paths which can be selected at runtime. Rather than having each >> component provide its own mechanism to select a code path, this >> patchset adds support for a single setting to control what code paths are >used. >Do you mean that all the components will have to use AVX-512? >IMO, different libraries might behave differently to the use of different vector >sizes. Are we taking away the ability to use different vector sizes for different >components. > No, this setting is a max bitwidth which can be set by apps using the EAL API based on what is best for the usage in their apps, or by the user with an EAL flag, but each library is still free to choose it's own best path, subject to it not being longer than the specified max. For example, if the max bitwidth is set to 512, a library can still choose to use a 256-bit path over a 512 one if its advantageous. >> This can be used to enable some non-default code paths e.g. ones using >> AVX- 512, but also to limit the code paths to certain vector widths, >> or to scalar code only, which is useful for testing. >> >> The max SIMD bitwidth setting can be set by the app itself through use >> of the available API, or can be overriden by a commandline argument >> passed by the user. >Arm platforms support SVE (scalable vector extensions) feature. With this >feature, the code is agnostic to the vector size. i.e. same code can run on >various vector sizes. There is no code yet in DPDK with this feature. But, it will >be added in the near future. It would be good to handle this now so that we >do not have issues in the future.. Do you have any suggestions how this could be handled? <snip> Thanks, Ciara