diff mbox series

[03/20] common/mlx5: add MMO and regexp structs/opcodes

Message ID 1593941027-86651-4-git-send-email-orika@mellanox.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series add Mellanox RegEx PMD |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Ori Kam July 5, 2020, 9:23 a.m. UTC 
  From: Yuval Avnery <yuvalav@mellanox.com>

Added General purpose PRM MMO structs, and regex specific structs.

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Signed-off-by: Ori Kam <orika@mellanox.com>
---
 drivers/common/mlx5/mlx5_prm.h | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

Comments

Slava Ovsiienko July 8, 2020, 7:32 a.m. UTC | #1 
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>

> -----Original Message-----
> From: Ori Kam <orika@mellanox.com>
> Sent: Sunday, July 5, 2020 12:24
> To: jerinj@marvell.com; xiang.w.wang@intel.com; Matan Azrad
> <matan@mellanox.com>; Slava Ovsiienko <viacheslavo@mellanox.com>;
> Shahaf Shuler <shahafs@mellanox.com>
> Cc: guyk@marvell.com; dev@dpdk.org; pbhagavatula@marvell.com;
> hemant.agrawal@nxp.com; Opher Reviv <opher@mellanox.com>; Alex
> Rosenbaum <alexr@mellanox.com>; dovrat@marvell.com;
> pkapoor@marvell.com; nipun.gupta@nxp.com;
> bruce.richardson@intel.com; yang.a.hong@intel.com;
> harry.chang@intel.com; gu.jian1@zte.com.cn;
> shanjiangh@chinatelecom.cn; zhangy.yun@chinatelecom.cn;
> lixingfu@huachentel.com; wushuai@inspur.com; yuyingxia@yxlink.com;
> fanchenggang@sunyainfo.com; davidfgao@tencent.com;
> liuzhong1@chinaunicom.cn; zhaoyong11@huawei.com; oc@yunify.com;
> jim@netgate.com; hongjun.ni@intel.com; deri@ntop.org;
> fc@napatech.com; arthur.su@lionic.com; Thomas Monjalon
> <thomas@monjalon.net>; Ori Kam <orika@mellanox.com>; Raslan
> Darawsheh <rasland@mellanox.com>; Yuval Avnery
> <yuvalav@mellanox.com>
> Subject: [PATCH 03/20] common/mlx5: add MMO and regexp
> structs/opcodes
> 
> From: Yuval Avnery <yuvalav@mellanox.com>
> 
> Added General purpose PRM MMO structs, and regex specific structs.
> 
> Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
> Signed-off-by: Ori Kam <orika@mellanox.com>
> ---
>  drivers/common/mlx5/mlx5_prm.h | 40
> ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 
> diff --git a/drivers/common/mlx5/mlx5_prm.h
> b/drivers/common/mlx5/mlx5_prm.h index c63795f..c2b9a20 100644
> --- a/drivers/common/mlx5/mlx5_prm.h
> +++ b/drivers/common/mlx5/mlx5_prm.h
> @@ -373,6 +373,42 @@ struct mlx5_cqe {
>  	uint8_t op_own;
>  };
> 
> +/* MMO metadata segment */
> +
> +#define	MLX5_OPCODE_MMO	0x2f
> +#define	MLX5_OPC_MOD_MMO_REGEX 0x4
> +
> +struct mlx5_wqe_metadata_seg {
> +	uint32_t mmo_control_31_0; /* mmo_control_63_32 is in
> ctrl_seg.imm */
> +	uint32_t lkey;
> +	uint64_t addr;
> +};
> +
> +struct mlx5_ifc_regexp_mmo_control_bits {
> +	uint8_t reserved_at_31[0x2];
> +	uint8_t le[0x1];
> +	uint8_t reserved_at_28[0x1];
> +	uint8_t subset_id_0[0xc];
> +	uint8_t reserved_at_16[0x4];
> +	uint8_t subset_id_1[0xc];
> +	uint8_t ctrl[0x4];
> +	uint8_t subset_id_2[0xc];
> +	uint8_t reserved_at_16_1[0x4];
> +	uint8_t subset_id_3[0xc];
> +};
> +
> +struct mlx5_ifc_regexp_metadata_bits {
> +	uint8_t rof_version[0x10];
> +	uint8_t latency_count[0x10];
> +	uint8_t instruction_count[0x10];
> +	uint8_t primary_thread_count[0x10];
> +	uint8_t match_count[0x8];
> +	uint8_t detected_match_count[0x8];
> +	uint8_t status[0x10];
> +	uint8_t job_id[0x20];
> +	uint8_t reserved[0x80];
> +};
> +
>  /* Adding direct verbs to data-path. */
> 
>  /* CQ sequence number mask. */
> @@ -759,6 +795,10 @@ enum {
>  	MLX5_CMD_OP_CREATE_GENERAL_OBJECT = 0xa00,
>  	MLX5_CMD_OP_MODIFY_GENERAL_OBJECT = 0xa01,
>  	MLX5_CMD_OP_QUERY_GENERAL_OBJECT = 0xa02,
> +	MLX5_CMD_SET_REGEX_PARAM = 0xb04,
> +	MLX5_CMD_QUERY_REGEX_PARAMS = 0xb05,
> +	MLX5_CMD_SET_REGEX_REGISTERS = 0xb06,
> +	MLX5_CMD_QUERY_REGEX_REGISTERS = 0xb07,
>  };
> 
>  enum {
> --
> 1.8.3.1
diff mbox series

Patch

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index c63795f..c2b9a20 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -373,6 +373,42 @@  struct mlx5_cqe {
 	uint8_t op_own;
 };
 
+/* MMO metadata segment */
+
+#define	MLX5_OPCODE_MMO	0x2f
+#define	MLX5_OPC_MOD_MMO_REGEX 0x4
+
+struct mlx5_wqe_metadata_seg {
+	uint32_t mmo_control_31_0; /* mmo_control_63_32 is in ctrl_seg.imm */
+	uint32_t lkey;
+	uint64_t addr;
+};
+
+struct mlx5_ifc_regexp_mmo_control_bits {
+	uint8_t reserved_at_31[0x2];
+	uint8_t le[0x1];
+	uint8_t reserved_at_28[0x1];
+	uint8_t subset_id_0[0xc];
+	uint8_t reserved_at_16[0x4];
+	uint8_t subset_id_1[0xc];
+	uint8_t ctrl[0x4];
+	uint8_t subset_id_2[0xc];
+	uint8_t reserved_at_16_1[0x4];
+	uint8_t subset_id_3[0xc];
+};
+
+struct mlx5_ifc_regexp_metadata_bits {
+	uint8_t rof_version[0x10];
+	uint8_t latency_count[0x10];
+	uint8_t instruction_count[0x10];
+	uint8_t primary_thread_count[0x10];
+	uint8_t match_count[0x8];
+	uint8_t detected_match_count[0x8];
+	uint8_t status[0x10];
+	uint8_t job_id[0x20];
+	uint8_t reserved[0x80];
+};
+
 /* Adding direct verbs to data-path. */
 
 /* CQ sequence number mask. */
@@ -759,6 +795,10 @@  enum {
 	MLX5_CMD_OP_CREATE_GENERAL_OBJECT = 0xa00,
 	MLX5_CMD_OP_MODIFY_GENERAL_OBJECT = 0xa01,
 	MLX5_CMD_OP_QUERY_GENERAL_OBJECT = 0xa02,
+	MLX5_CMD_SET_REGEX_PARAM = 0xb04,
+	MLX5_CMD_QUERY_REGEX_PARAMS = 0xb05,
+	MLX5_CMD_SET_REGEX_REGISTERS = 0xb06,
+	MLX5_CMD_QUERY_REGEX_REGISTERS = 0xb07,
 };
 
 enum {