[v3] net/mlx5: optimize Rx hash fields conversion
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Commit Message
Previous fix added translation of Rx hash fields to PRM format.
This patch optimizes the fix, to perform value translation only
if value is not zero.
In case value is zero, there is no need to translate it.
Fixes: 51035775c3c7 ("net/mlx5: fix setting of Rx hash fields")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
---
v2: Modify title for clarity, change 'fix' to 'optimize'.
Remove the 'Fixes' label.
v3: Add back the 'Fixes' label.
---
---
drivers/net/mlx5/mlx5_rxq.c | 34 +++++++++++++++++++---------------
1 file changed, 19 insertions(+), 15 deletions(-)
Comments
Hi,
> -----Original Message-----
> From: Dekel Peled <dekelp@mellanox.com>
> Sent: Wednesday, January 15, 2020 11:20 PM
> To: Matan Azrad <matan@mellanox.com>; Slava Ovsiienko
> <viacheslavo@mellanox.com>
> Cc: Raslan Darawsheh <rasland@mellanox.com>; Ori Kam
> <orika@mellanox.com>; dev@dpdk.org; stable@dpdk.org
> Subject: [PATCH v3] net/mlx5: optimize Rx hash fields conversion
>
> Previous fix added translation of Rx hash fields to PRM format.
>
> This patch optimizes the fix, to perform value translation only
> if value is not zero.
> In case value is zero, there is no need to translate it.
>
> Fixes: 51035775c3c7 ("net/mlx5: fix setting of Rx hash fields")
> Cc: stable@dpdk.org
>
> Signed-off-by: Dekel Peled <dekelp@mellanox.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
>
> ---
> v2: Modify title for clarity, change 'fix' to 'optimize'.
> Remove the 'Fixes' label.
> v3: Add back the 'Fixes' label.
> ---
>
> ---
> drivers/net/mlx5/mlx5_rxq.c | 34 +++++++++++++++++++---------------
> 1 file changed, 19 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
> index ca25e32..c936a7f 100644
> --- a/drivers/net/mlx5/mlx5_rxq.c
> +++ b/drivers/net/mlx5/mlx5_rxq.c
> @@ -2460,7 +2460,6 @@ struct mlx5_hrxq *
> }
> } else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */
> struct mlx5_devx_tir_attr tir_attr;
> - struct mlx5_rx_hash_field_select *rx_hash_field_select;
> uint32_t i;
> uint32_t lro = 1;
>
> @@ -2474,23 +2473,27 @@ struct mlx5_hrxq *
> memset(&tir_attr, 0, sizeof(tir_attr));
> tir_attr.disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT;
> tir_attr.rx_hash_fn = MLX5_RX_HASH_FN_TOEPLITZ;
> -#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
> tir_attr.tunneled_offload_en = !!tunnel;
> - /* Translate hash_fields bitmap to PRM format. */
> - rx_hash_field_select = hash_fields & IBV_RX_HASH_INNER ?
> - &tir_attr.rx_hash_field_selector_inner :
> - &tir_attr.rx_hash_field_selector_outer;
> + /* If needed, translate hash_fields bitmap to PRM format. */
> + if (hash_fields) {
> +#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
> + struct mlx5_rx_hash_field_select
> *rx_hash_field_select =
> + hash_fields & IBV_RX_HASH_INNER ?
> +
> &tir_attr.rx_hash_field_selector_inner :
> +
> &tir_attr.rx_hash_field_selector_outer;
> #else
> - rx_hash_field_select =
> &tir_attr.rx_hash_field_selector_outer;
> + struct mlx5_rx_hash_field_select
> *rx_hash_field_select =
> +
> &tir_attr.rx_hash_field_selector_outer;
> #endif
> - /* 1 bit: 0: IPv4, 1: IPv6. */
> - rx_hash_field_select->l3_prot_type =
> - !!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
> - /* 1 bit: 0: TCP, 1: UDP. */
> - rx_hash_field_select->l4_prot_type =
> - !!(hash_fields & MLX5_UDP_IBV_RX_HASH);
> - /* Bitmask which sets which fields to use in RX Hash. */
> - rx_hash_field_select->selected_fields =
> +
> + /* 1 bit: 0: IPv4, 1: IPv6. */
> + rx_hash_field_select->l3_prot_type =
> + !!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
> + /* 1 bit: 0: TCP, 1: UDP. */
> + rx_hash_field_select->l4_prot_type =
> + !!(hash_fields & MLX5_UDP_IBV_RX_HASH);
> + /* Bitmask which sets which fields to use in RX Hash.
> */
> + rx_hash_field_select->selected_fields =
> ((!!(hash_fields & MLX5_L3_SRC_IBV_RX_HASH)) <<
>
> MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP) |
> (!!(hash_fields & MLX5_L3_DST_IBV_RX_HASH)) <<
> @@ -2499,6 +2502,7 @@ struct mlx5_hrxq *
>
> MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT |
> (!!(hash_fields & MLX5_L4_DST_IBV_RX_HASH)) <<
>
> MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT;
> + }
> if (rxq_ctrl->obj->type ==
> MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN)
> tir_attr.transport_domain = priv->sh->td->id;
> else
> --
> 1.8.3.1
Fixed fixes reference,
patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
@@ -2460,7 +2460,6 @@ struct mlx5_hrxq *
}
} else { /* ind_tbl->type == MLX5_IND_TBL_TYPE_DEVX */
struct mlx5_devx_tir_attr tir_attr;
- struct mlx5_rx_hash_field_select *rx_hash_field_select;
uint32_t i;
uint32_t lro = 1;
@@ -2474,23 +2473,27 @@ struct mlx5_hrxq *
memset(&tir_attr, 0, sizeof(tir_attr));
tir_attr.disp_type = MLX5_TIRC_DISP_TYPE_INDIRECT;
tir_attr.rx_hash_fn = MLX5_RX_HASH_FN_TOEPLITZ;
-#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
tir_attr.tunneled_offload_en = !!tunnel;
- /* Translate hash_fields bitmap to PRM format. */
- rx_hash_field_select = hash_fields & IBV_RX_HASH_INNER ?
- &tir_attr.rx_hash_field_selector_inner :
- &tir_attr.rx_hash_field_selector_outer;
+ /* If needed, translate hash_fields bitmap to PRM format. */
+ if (hash_fields) {
+#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
+ struct mlx5_rx_hash_field_select *rx_hash_field_select =
+ hash_fields & IBV_RX_HASH_INNER ?
+ &tir_attr.rx_hash_field_selector_inner :
+ &tir_attr.rx_hash_field_selector_outer;
#else
- rx_hash_field_select = &tir_attr.rx_hash_field_selector_outer;
+ struct mlx5_rx_hash_field_select *rx_hash_field_select =
+ &tir_attr.rx_hash_field_selector_outer;
#endif
- /* 1 bit: 0: IPv4, 1: IPv6. */
- rx_hash_field_select->l3_prot_type =
- !!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
- /* 1 bit: 0: TCP, 1: UDP. */
- rx_hash_field_select->l4_prot_type =
- !!(hash_fields & MLX5_UDP_IBV_RX_HASH);
- /* Bitmask which sets which fields to use in RX Hash. */
- rx_hash_field_select->selected_fields =
+
+ /* 1 bit: 0: IPv4, 1: IPv6. */
+ rx_hash_field_select->l3_prot_type =
+ !!(hash_fields & MLX5_IPV6_IBV_RX_HASH);
+ /* 1 bit: 0: TCP, 1: UDP. */
+ rx_hash_field_select->l4_prot_type =
+ !!(hash_fields & MLX5_UDP_IBV_RX_HASH);
+ /* Bitmask which sets which fields to use in RX Hash. */
+ rx_hash_field_select->selected_fields =
((!!(hash_fields & MLX5_L3_SRC_IBV_RX_HASH)) <<
MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP) |
(!!(hash_fields & MLX5_L3_DST_IBV_RX_HASH)) <<
@@ -2499,6 +2502,7 @@ struct mlx5_hrxq *
MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT |
(!!(hash_fields & MLX5_L4_DST_IBV_RX_HASH)) <<
MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT;
+ }
if (rxq_ctrl->obj->type == MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN)
tir_attr.transport_domain = priv->sh->td->id;
else