diff mbox series

[v2] net/axgbe: add a HW quirk for register definitions

Message ID 20200109123937.10658-1-Selwin.Sebastian@amd.com (mailing list archive)
State Superseded, archived
Delegated to: Ferruh Yigit
Headers
Series [v2] net/axgbe: add a HW quirk for register definitions |

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ci/iol-intel-Performance success Performance Testing PASS
ci/iol-testing fail Testing issues
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ci/iol-mellanox-Performance success Performance Testing PASS
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ci/Intel-compilation fail Compilation issues

Commit Message

Sebastian, Selwin Jan. 9, 2020, 12:39 p.m. UTC 
  V1000/R1000 processors are using the same PCI ids for the network
device as SNOWYOWL processor but has altered register definitions
for determining the window settings for the indirect PCS access.
Add support to check for this hardware and if found use the new
register values

Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
---
 drivers/net/axgbe/axgbe_common.h |  2 ++
 drivers/net/axgbe/axgbe_ethdev.c | 22 +++++++++++++++++++---
 2 files changed, 21 insertions(+), 3 deletions(-)

Comments

Ferruh Yigit Jan. 13, 2020, 5:18 p.m. UTC | #1 
On 1/9/2020 12:39 PM, Selwin Sebastian wrote:
> V1000/R1000 processors are using the same PCI ids for the network
> device as SNOWYOWL processor but has altered register definitions
> for determining the window settings for the indirect PCS access.
> Add support to check for this hardware and if found use the new
> register values
> 
> Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
> ---
>  drivers/net/axgbe/axgbe_common.h |  2 ++
>  drivers/net/axgbe/axgbe_ethdev.c | 22 +++++++++++++++++++---
>  2 files changed, 21 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
> index 34f60f156..4a3fbac16 100644
> --- a/drivers/net/axgbe/axgbe_common.h
> +++ b/drivers/net/axgbe/axgbe_common.h
> @@ -841,6 +841,8 @@
>  #define PCS_V1_WINDOW_SELECT		0x03fc
>  #define PCS_V2_WINDOW_DEF		0x9060
>  #define PCS_V2_WINDOW_SELECT		0x9064
> +#define PCS_V2_RV_WINDOW_DEF		0x1060
> +#define PCS_V2_RV_WINDOW_SELECT		0x1064
>  
>  /* PCS register entry bit positions and sizes */
>  #define PCS_V2_WINDOW_DEF_OFFSET_INDEX	6
> diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
> index d1f160e79..c551375a4 100644
> --- a/drivers/net/axgbe/axgbe_ethdev.c
> +++ b/drivers/net/axgbe/axgbe_ethdev.c
> @@ -29,8 +29,10 @@ static int  axgbe_dev_info_get(struct rte_eth_dev *dev,
>  
>  /* The set of PCI devices this driver supports */
>  #define AMD_PCI_VENDOR_ID       0x1022
> +#define AMD_PCI_RV_ROOT_COMPLEX_ID	0x15d0
>  #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
>  #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
> +extern struct rte_pci_bus rte_pci_bus;

This is not working for the case DPDK is build as shared library, since the
symbol is not exported in the .map file, because it should be driver internal.

What about adding an API to 'drivers/bus/pci' to check if given vendor_id &
device_id exists in the bus? This also prevents accessing the bus internals.


>  
>  int axgbe_logtype_init;
>  int axgbe_logtype_driver;
> @@ -585,6 +587,7 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>  	struct rte_pci_device *pci_dev;
>  	uint32_t reg, mac_lo, mac_hi;
>  	int ret;
> +	struct rte_pci_device *root_complex_dev;
>  
>  	eth_dev->dev_ops = &axgbe_eth_dev_ops;
>  	eth_dev->rx_pkt_burst = &axgbe_recv_pkts;
> @@ -605,6 +608,20 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>  	pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
>  	pdata->pci_dev = pci_dev;
>  
> +	/*
> +	 * Get root complex device to differentiate RV AXGBE vs SNOWY AXGBE
> +	 */
> +	root_complex_dev = TAILQ_FIRST(&rte_pci_bus.device_list);
> +
> +	if (root_complex_dev->id.vendor_id == AMD_PCI_VENDOR_ID &&
> +		root_complex_dev->id.device_id == AMD_PCI_RV_ROOT_COMPLEX_ID) {
> +			pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
> +			pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
> +	} else {
> +		pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
> +		pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
> +	}
> +
>  	pdata->xgmac_regs =
>  		(void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
>  	pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs
> @@ -620,14 +637,13 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>  		pdata->vdata = &axgbe_v2b;
>  
>  	/* Configure the PCS indirect addressing support */
> -	reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF);
> +	reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
>  	pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
>  	pdata->xpcs_window <<= 6;
>  	pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
>  	pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
>  	pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
> -	pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
> -	pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
> +
>  	PMD_INIT_LOG(DEBUG,
>  		     "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window,
>  		     pdata->xpcs_window_size, pdata->xpcs_window_mask);
>
Sebastian, Selwin Jan. 14, 2020, noon UTC | #2 
[AMD Official Use Only - Internal Distribution Only]

Hi Ferruh,
	I submitted my v3 of the patch with changes. Added a new api to pci driver to search for device.  

Thanks and Regards
Selwin Sebastian
 

-----Original Message-----
From: Ferruh Yigit <ferruh.yigit@intel.com> 
Sent: Monday, January 13, 2020 10:48 PM
To: Sebastian, Selwin <Selwin.Sebastian@amd.com>; dev@dpdk.org
Cc: Thomas Monjalon <thomas@monjalon.net>; David Marchand <david.marchand@redhat.com>
Subject: Re: [dpdk-dev] [PATCH v2] net/axgbe: add a HW quirk for register definitions

[CAUTION: External Email]

On 1/9/2020 12:39 PM, Selwin Sebastian wrote:
> V1000/R1000 processors are using the same PCI ids for the network 
> device as SNOWYOWL processor but has altered register definitions for 
> determining the window settings for the indirect PCS access.
> Add support to check for this hardware and if found use the new 
> register values
>
> Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
> ---
>  drivers/net/axgbe/axgbe_common.h |  2 ++  
> drivers/net/axgbe/axgbe_ethdev.c | 22 +++++++++++++++++++---
>  2 files changed, 21 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/axgbe/axgbe_common.h 
> b/drivers/net/axgbe/axgbe_common.h
> index 34f60f156..4a3fbac16 100644
> --- a/drivers/net/axgbe/axgbe_common.h
> +++ b/drivers/net/axgbe/axgbe_common.h
> @@ -841,6 +841,8 @@
>  #define PCS_V1_WINDOW_SELECT         0x03fc
>  #define PCS_V2_WINDOW_DEF            0x9060
>  #define PCS_V2_WINDOW_SELECT         0x9064
> +#define PCS_V2_RV_WINDOW_DEF         0x1060
> +#define PCS_V2_RV_WINDOW_SELECT              0x1064
>
>  /* PCS register entry bit positions and sizes */
>  #define PCS_V2_WINDOW_DEF_OFFSET_INDEX       6
> diff --git a/drivers/net/axgbe/axgbe_ethdev.c 
> b/drivers/net/axgbe/axgbe_ethdev.c
> index d1f160e79..c551375a4 100644
> --- a/drivers/net/axgbe/axgbe_ethdev.c
> +++ b/drivers/net/axgbe/axgbe_ethdev.c
> @@ -29,8 +29,10 @@ static int  axgbe_dev_info_get(struct rte_eth_dev 
> *dev,
>
>  /* The set of PCI devices this driver supports */
>  #define AMD_PCI_VENDOR_ID       0x1022
> +#define AMD_PCI_RV_ROOT_COMPLEX_ID   0x15d0
>  #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458  #define 
> AMD_PCI_AXGBE_DEVICE_V2B 0x1459
> +extern struct rte_pci_bus rte_pci_bus;

This is not working for the case DPDK is build as shared library, since the symbol is not exported in the .map file, because it should be driver internal.

What about adding an API to 'drivers/bus/pci' to check if given vendor_id & device_id exists in the bus? This also prevents accessing the bus internals.


>
>  int axgbe_logtype_init;
>  int axgbe_logtype_driver;
> @@ -585,6 +587,7 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>       struct rte_pci_device *pci_dev;
>       uint32_t reg, mac_lo, mac_hi;
>       int ret;
> +     struct rte_pci_device *root_complex_dev;
>
>       eth_dev->dev_ops = &axgbe_eth_dev_ops;
>       eth_dev->rx_pkt_burst = &axgbe_recv_pkts; @@ -605,6 +608,20 @@ 
> eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>       pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
>       pdata->pci_dev = pci_dev;
>
> +     /*
> +      * Get root complex device to differentiate RV AXGBE vs SNOWY AXGBE
> +      */
> +     root_complex_dev = TAILQ_FIRST(&rte_pci_bus.device_list);
> +
> +     if (root_complex_dev->id.vendor_id == AMD_PCI_VENDOR_ID &&
> +             root_complex_dev->id.device_id == AMD_PCI_RV_ROOT_COMPLEX_ID) {
> +                     pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
> +                     pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
> +     } else {
> +             pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
> +             pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
> +     }
> +
>       pdata->xgmac_regs =
>               (void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
>       pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs @@ 
> -620,14 +637,13 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>               pdata->vdata = &axgbe_v2b;
>
>       /* Configure the PCS indirect addressing support */
> -     reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF);
> +     reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
>       pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
>       pdata->xpcs_window <<= 6;
>       pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
>       pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
>       pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
> -     pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
> -     pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
> +
>       PMD_INIT_LOG(DEBUG,
>                    "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window,
>                    pdata->xpcs_window_size, pdata->xpcs_window_mask);
>
diff mbox series

Patch

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 34f60f156..4a3fbac16 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -841,6 +841,8 @@ 
 #define PCS_V1_WINDOW_SELECT		0x03fc
 #define PCS_V2_WINDOW_DEF		0x9060
 #define PCS_V2_WINDOW_SELECT		0x9064
+#define PCS_V2_RV_WINDOW_DEF		0x1060
+#define PCS_V2_RV_WINDOW_SELECT		0x1064
 
 /* PCS register entry bit positions and sizes */
 #define PCS_V2_WINDOW_DEF_OFFSET_INDEX	6
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index d1f160e79..c551375a4 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -29,8 +29,10 @@  static int  axgbe_dev_info_get(struct rte_eth_dev *dev,
 
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID       0x1022
+#define AMD_PCI_RV_ROOT_COMPLEX_ID	0x15d0
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458
 #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
+extern struct rte_pci_bus rte_pci_bus;
 
 int axgbe_logtype_init;
 int axgbe_logtype_driver;
@@ -585,6 +587,7 @@  eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
 	struct rte_pci_device *pci_dev;
 	uint32_t reg, mac_lo, mac_hi;
 	int ret;
+	struct rte_pci_device *root_complex_dev;
 
 	eth_dev->dev_ops = &axgbe_eth_dev_ops;
 	eth_dev->rx_pkt_burst = &axgbe_recv_pkts;
@@ -605,6 +608,20 @@  eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
 	pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
 	pdata->pci_dev = pci_dev;
 
+	/*
+	 * Get root complex device to differentiate RV AXGBE vs SNOWY AXGBE
+	 */
+	root_complex_dev = TAILQ_FIRST(&rte_pci_bus.device_list);
+
+	if (root_complex_dev->id.vendor_id == AMD_PCI_VENDOR_ID &&
+		root_complex_dev->id.device_id == AMD_PCI_RV_ROOT_COMPLEX_ID) {
+			pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+			pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+	} else {
+		pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+		pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+	}
+
 	pdata->xgmac_regs =
 		(void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
 	pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs
@@ -620,14 +637,13 @@  eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
 		pdata->vdata = &axgbe_v2b;
 
 	/* Configure the PCS indirect addressing support */
-	reg = XPCS32_IOREAD(pdata, PCS_V2_WINDOW_DEF);
+	reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
 	pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
 	pdata->xpcs_window <<= 6;
 	pdata->xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);
 	pdata->xpcs_window_size = 1 << (pdata->xpcs_window_size + 7);
 	pdata->xpcs_window_mask = pdata->xpcs_window_size - 1;
-	pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
-	pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+
 	PMD_INIT_LOG(DEBUG,
 		     "xpcs window :%x, size :%x, mask :%x ", pdata->xpcs_window,
 		     pdata->xpcs_window_size, pdata->xpcs_window_mask);