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GET /api/patches/99549/?format=api
{ "id": 99549, "url": "https://patches.dpdk.org/api/patches/99549/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210924085653.17080-1-alvinx.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210924085653.17080-1-alvinx.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210924085653.17080-1-alvinx.zhang@intel.com", "date": "2021-09-24T08:56:53", "name": "[v3] net/ice: add support for low Rx latency", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7b547936d0604296597017b4aa25ac6bb5b6acd0", "submitter": { "id": 1398, "url": "https://patches.dpdk.org/api/people/1398/?format=api", "name": "Alvin Zhang", "email": "alvinx.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210924085653.17080-1-alvinx.zhang@intel.com/mbox/", "series": [ { "id": 19126, "url": "https://patches.dpdk.org/api/series/19126/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=19126", "date": "2021-09-24T08:56:53", "name": "[v3] net/ice: add support for low Rx latency", "version": 3, "mbox": "https://patches.dpdk.org/series/19126/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/99549/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/99549/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 33382A0548;\n\tFri, 24 Sep 2021 10:57:05 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A41434122D;\n\tFri, 24 Sep 2021 10:57:04 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by mails.dpdk.org (Postfix) with ESMTP id 53E9740142\n for <dev@dpdk.org>; Fri, 24 Sep 2021 10:57:03 +0200 (CEST)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Sep 2021 01:57:00 -0700", "from shwdenpg235.ccr.corp.intel.com ([10.253.106.22])\n by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Sep 2021 01:56:59 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10116\"; a=\"222145294\"", "E=Sophos;i=\"5.85,319,1624345200\"; d=\"scan'208\";a=\"222145294\"", "E=Sophos;i=\"5.85,319,1624345200\"; d=\"scan'208\";a=\"534947681\"" ], "From": "Alvin Zhang <alvinx.zhang@intel.com>", "To": "qi.z.zhang@intel.com", "Cc": "dev@dpdk.org,\n\tAlvin Zhang <alvinx.zhang@intel.com>", "Date": "Fri, 24 Sep 2021 16:56:53 +0800", "Message-Id": "<20210924085653.17080-1-alvinx.zhang@intel.com>", "X-Mailer": "git-send-email 2.21.0.windows.1", "In-Reply-To": "<20210918025923.5112-1-alvinx.zhang@intel.com>", "References": "<20210918025923.5112-1-alvinx.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3] net/ice: add support for low Rx latency", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds a devarg parameter to enable/disable low Rx latency.\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\n---\n\nv3: rebase to dpdk-next-net-intel\n---\n doc/guides/nics/ice.rst | 12 ++++++++++++\n drivers/net/ice/ice_ethdev.c | 26 +++++++++++++++++++++++---\n drivers/net/ice/ice_ethdev.h | 1 +\n 3 files changed, 36 insertions(+), 3 deletions(-)", "diff": "diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst\nindex ebe2cbc..355f192 100644\n--- a/doc/guides/nics/ice.rst\n+++ b/doc/guides/nics/ice.rst\n@@ -227,6 +227,18 @@ Runtime Config Options\n \n -a af:00.0,pps_out='[pin:0]'\n \n+- ``Low Rx latency`` (default ``0``)\n+\n+ vRAN workloads require low latency DPDK interface for the front haul\n+ interface connection to Radio. By specifying ``1`` for parameter\n+ ``rx-low-latency``, each completed Rx descriptor can be written immediately\n+ to host memory and the Rx interrupt latency can be reduced to 2us::\n+\n+ -a 0000:88:00.0,rx-low-latency=1\n+\n+ As a trade-off, this configuration may cause the packet processing performance\n+ degradation due to the PCI bandwidth limitation.\n+\n Driver compilation and testing\n ------------------------------\n \ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex e24a3b6..9edf811 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -30,6 +30,7 @@\n #define ICE_PROTO_XTR_ARG \"proto_xtr\"\n #define ICE_HW_DEBUG_MASK_ARG \"hw_debug_mask\"\n #define ICE_ONE_PPS_OUT_ARG \"pps_out\"\n+#define ICE_RX_LOW_LATENCY \"rx-low-latency\"\n \n static const char * const ice_valid_args[] = {\n \tICE_SAFE_MODE_SUPPORT_ARG,\n@@ -37,6 +38,7 @@\n \tICE_PROTO_XTR_ARG,\n \tICE_HW_DEBUG_MASK_ARG,\n \tICE_ONE_PPS_OUT_ARG,\n+\tICE_RX_LOW_LATENCY,\n \tNULL\n };\n \n@@ -1956,6 +1958,9 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)\n \tif (ret)\n \t\tgoto bail;\n \n+\tret = rte_kvargs_process(kvlist, ICE_RX_LOW_LATENCY,\n+\t\t\t\t &parse_bool, &ad->devargs.rx_low_latency);\n+\n bail:\n \trte_kvargs_free(kvlist);\n \treturn ret;\n@@ -3272,8 +3277,9 @@ static int ice_init_rss(struct ice_pf *pf)\n {\n \tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n \tuint32_t val, val_tx;\n-\tint i;\n+\tint rx_low_latency, i;\n \n+\trx_low_latency = vsi->adapter->devargs.rx_low_latency;\n \tfor (i = 0; i < nb_queue; i++) {\n \t\t/*do actual bind*/\n \t\tval = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |\n@@ -3283,8 +3289,21 @@ static int ice_init_rss(struct ice_pf *pf)\n \n \t\tPMD_DRV_LOG(INFO, \"queue %d is binding to vect %d\",\n \t\t\t base_queue + i, msix_vect);\n+\n \t\t/* set ITR0 value */\n-\t\tICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x2);\n+\t\tif (rx_low_latency) {\n+\t\t\t/**\n+\t\t\t * Empirical configuration for optimal real time\n+\t\t\t * latency reduced interrupt throttling to 2us\n+\t\t\t */\n+\t\t\tICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x1);\n+\t\t\tICE_WRITE_REG(hw, QRX_ITR(base_queue + i),\n+\t\t\t\t QRX_ITR_NO_EXPR_M);\n+\t\t} else {\n+\t\t\tICE_WRITE_REG(hw, GLINT_ITR(0, msix_vect), 0x2);\n+\t\t\tICE_WRITE_REG(hw, QRX_ITR(base_queue + i), 0);\n+\t\t}\n+\n \t\tICE_WRITE_REG(hw, QINT_RQCTL(base_queue + i), val);\n \t\tICE_WRITE_REG(hw, QINT_TQCTL(base_queue + i), val_tx);\n \t}\n@@ -5497,7 +5516,8 @@ static int ice_xstats_get_names(__rte_unused struct rte_eth_dev *dev,\n \t\t\t ICE_HW_DEBUG_MASK_ARG \"=0xXXX\"\n \t\t\t ICE_PROTO_XTR_ARG \"=[queue:]<vlan|ipv4|ipv6|ipv6_flow|tcp|ip_offset>\"\n \t\t\t ICE_SAFE_MODE_SUPPORT_ARG \"=<0|1>\"\n-\t\t\t ICE_PIPELINE_MODE_SUPPORT_ARG \"=<0|1>\");\n+\t\t\t ICE_PIPELINE_MODE_SUPPORT_ARG \"=<0|1>\"\n+\t\t\t ICE_RX_LOW_LATENCY \"=<0|1>\");\n \n RTE_LOG_REGISTER_SUFFIX(ice_logtype_init, init, NOTICE);\n RTE_LOG_REGISTER_SUFFIX(ice_logtype_driver, driver, NOTICE);\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex ea9d892..26f5c56 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -476,6 +476,7 @@ struct ice_pf {\n * Cache devargs parse result.\n */\n struct ice_devargs {\n+\tint rx_low_latency;\n \tint safe_mode_support;\n \tuint8_t proto_xtr_dflt;\n \tint pipe_mode_support;\n", "prefixes": [ "v3" ] }