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GET /api/patches/99174/?format=api
{ "id": 99174, "url": "https://patches.dpdk.org/api/patches/99174/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210917140252.2999006-7-kevin.laatz@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210917140252.2999006-7-kevin.laatz@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210917140252.2999006-7-kevin.laatz@intel.com", "date": "2021-09-17T14:02:42", "name": "[v4,06/16] dma/idxd: add datapath structures", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e686ab7421e6492c8e0936924d6c967165191e2f", "submitter": { "id": 921, "url": "https://patches.dpdk.org/api/people/921/?format=api", "name": "Kevin Laatz", "email": "kevin.laatz@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210917140252.2999006-7-kevin.laatz@intel.com/mbox/", "series": [ { "id": 19018, "url": "https://patches.dpdk.org/api/series/19018/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=19018", "date": "2021-09-17T14:02:36", "name": "add dmadev driver for idxd devices", "version": 4, "mbox": "https://patches.dpdk.org/series/19018/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/99174/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/99174/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 237B1A0C46;\n\tFri, 17 Sep 2021 16:04:03 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 25A3E4115D;\n\tFri, 17 Sep 2021 16:03:29 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by mails.dpdk.org (Postfix) with ESMTP id F1A1341154\n for <dev@dpdk.org>; Fri, 17 Sep 2021 16:03:26 +0200 (CEST)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Sep 2021 07:03:25 -0700", "from silpixa00401122.ir.intel.com ([10.55.128.10])\n by fmsmga006.fm.intel.com with ESMTP; 17 Sep 2021 07:03:24 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10109\"; a=\"219614893\"", "E=Sophos;i=\"5.85,301,1624345200\"; d=\"scan'208\";a=\"219614893\"", "E=Sophos;i=\"5.85,301,1624345200\"; d=\"scan'208\";a=\"699496238\"" ], "X-ExtLoop1": "1", "From": "Kevin Laatz <kevin.laatz@intel.com>", "To": "dev@dpdk.org", "Cc": "bruce.richardson@intel.com, fengchengwen@huawei.com, jerinj@marvell.com,\n conor.walsh@intel.com, Kevin Laatz <kevin.laatz@intel.com>", "Date": "Fri, 17 Sep 2021 14:02:42 +0000", "Message-Id": "<20210917140252.2999006-7-kevin.laatz@intel.com>", "X-Mailer": "git-send-email 2.30.2", "In-Reply-To": "<20210917140252.2999006-1-kevin.laatz@intel.com>", "References": "<20210827172048.558704-1-kevin.laatz@intel.com>\n <20210917140252.2999006-1-kevin.laatz@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v4 06/16] dma/idxd: add datapath structures", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add data structures required for the data path for IDXD devices.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\nSigned-off-by: Kevin Laatz <kevin.laatz@intel.com>\nReviewed-by: Conor Walsh <conor.walsh@intel.com>\n\n---\nv2: add completion status for invalid opcode\n---\n drivers/dma/idxd/idxd_bus.c | 1 +\n drivers/dma/idxd/idxd_common.c | 33 ++++++++++++++++++\n drivers/dma/idxd/idxd_hw_defs.h | 60 ++++++++++++++++++++++++++++++++\n drivers/dma/idxd/idxd_internal.h | 3 ++\n drivers/dma/idxd/idxd_pci.c | 2 +-\n 5 files changed, 98 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/dma/idxd/idxd_bus.c b/drivers/dma/idxd/idxd_bus.c\nindex b48fa954ed..3c0837ec52 100644\n--- a/drivers/dma/idxd/idxd_bus.c\n+++ b/drivers/dma/idxd/idxd_bus.c\n@@ -95,6 +95,7 @@ idxd_dev_close(struct rte_dma_dev *dev)\n \n static const struct rte_dma_dev_ops idxd_bus_ops = {\n \t\t.dev_close = idxd_dev_close,\n+\t\t.dev_dump = idxd_dump,\n };\n \n static void *\ndiff --git a/drivers/dma/idxd/idxd_common.c b/drivers/dma/idxd/idxd_common.c\nindex 8afad637fc..45cde78e88 100644\n--- a/drivers/dma/idxd/idxd_common.c\n+++ b/drivers/dma/idxd/idxd_common.c\n@@ -10,6 +10,35 @@\n \n #define IDXD_PMD_NAME_STR \"dmadev_idxd\"\n \n+int\n+idxd_dump(const struct rte_dma_dev *dev, FILE *f)\n+{\n+\tstruct idxd_dmadev *idxd = dev->dev_private;\n+\tunsigned int i;\n+\n+\tfprintf(f, \"== IDXD Private Data ==\\n\");\n+\tfprintf(f, \" Portal: %p\\n\", idxd->portal);\n+\tfprintf(f, \" Config: { ring_size: %u }\\n\",\n+\t\t\tidxd->qcfg.nb_desc);\n+\tfprintf(f, \" Batch ring (sz = %u, max_batches = %u):\\n\\t\",\n+\t\t\tidxd->max_batches + 1, idxd->max_batches);\n+\tfor (i = 0; i <= idxd->max_batches; i++) {\n+\t\tfprintf(f, \" %u \", idxd->batch_idx_ring[i]);\n+\t\tif (i == idxd->batch_idx_read && i == idxd->batch_idx_write)\n+\t\t\tfprintf(f, \"[rd ptr, wr ptr] \");\n+\t\telse if (i == idxd->batch_idx_read)\n+\t\t\tfprintf(f, \"[rd ptr] \");\n+\t\telse if (i == idxd->batch_idx_write)\n+\t\t\tfprintf(f, \"[wr ptr] \");\n+\t\tif (i == idxd->max_batches)\n+\t\t\tfprintf(f, \"\\n\");\n+\t}\n+\n+\tfprintf(f, \" Curr batch: start = %u, size = %u\\n\", idxd->batch_start, idxd->batch_size);\n+\tfprintf(f, \" IDS: avail = %u, returned: %u\\n\", idxd->ids_avail, idxd->ids_returned);\n+\treturn 0;\n+}\n+\n int\n idxd_dmadev_create(const char *name, struct rte_device *dev,\n \t\t const struct idxd_dmadev *base_idxd,\n@@ -19,6 +48,10 @@ idxd_dmadev_create(const char *name, struct rte_device *dev,\n \tstruct rte_dma_dev *dmadev = NULL;\n \tint ret = 0;\n \n+\tRTE_BUILD_BUG_ON(sizeof(struct idxd_hw_desc) != 64);\n+\tRTE_BUILD_BUG_ON(offsetof(struct idxd_hw_desc, size) != 32);\n+\tRTE_BUILD_BUG_ON(sizeof(struct idxd_completion) != 32);\n+\n \tif (!name) {\n \t\tIDXD_PMD_ERR(\"Invalid name of the device!\");\n \t\tret = -EINVAL;\ndiff --git a/drivers/dma/idxd/idxd_hw_defs.h b/drivers/dma/idxd/idxd_hw_defs.h\nindex ea627cba6d..55ca9f7f52 100644\n--- a/drivers/dma/idxd/idxd_hw_defs.h\n+++ b/drivers/dma/idxd/idxd_hw_defs.h\n@@ -5,6 +5,66 @@\n #ifndef _IDXD_HW_DEFS_H_\n #define _IDXD_HW_DEFS_H_\n \n+/*\n+ * Defines used in the data path for interacting with IDXD hardware.\n+ */\n+#define IDXD_CMD_OP_SHIFT 24\n+enum rte_idxd_ops {\n+\tidxd_op_nop = 0,\n+\tidxd_op_batch,\n+\tidxd_op_drain,\n+\tidxd_op_memmove,\n+\tidxd_op_fill\n+};\n+\n+#define IDXD_FLAG_FENCE (1 << 0)\n+#define IDXD_FLAG_COMPLETION_ADDR_VALID (1 << 2)\n+#define IDXD_FLAG_REQUEST_COMPLETION (1 << 3)\n+#define IDXD_FLAG_CACHE_CONTROL (1 << 8)\n+\n+/**\n+ * Hardware descriptor used by DSA hardware, for both bursts and\n+ * for individual operations.\n+ */\n+struct idxd_hw_desc {\n+\tuint32_t pasid;\n+\tuint32_t op_flags;\n+\trte_iova_t completion;\n+\n+\tRTE_STD_C11\n+\tunion {\n+\t\trte_iova_t src; /* source address for copy ops etc. */\n+\t\trte_iova_t desc_addr; /* descriptor pointer for batch */\n+\t};\n+\trte_iova_t dst;\n+\n+\tuint32_t size; /* length of data for op, or batch size */\n+\n+\tuint16_t intr_handle; /* completion interrupt handle */\n+\n+\t/* remaining 26 bytes are reserved */\n+\tuint16_t __reserved[13];\n+} __rte_aligned(64);\n+\n+#define IDXD_COMP_STATUS_INCOMPLETE 0\n+#define IDXD_COMP_STATUS_SUCCESS 1\n+#define IDXD_COMP_STATUS_INVALID_OPCODE 0x10\n+#define IDXD_COMP_STATUS_INVALID_SIZE 0x13\n+#define IDXD_COMP_STATUS_SKIPPED 0xFF /* not official IDXD error, needed as placeholder */\n+\n+/**\n+ * Completion record structure written back by DSA\n+ */\n+struct idxd_completion {\n+\tuint8_t status;\n+\tuint8_t result;\n+\t/* 16-bits pad here */\n+\tuint32_t completed_size; /* data length, or descriptors for batch */\n+\n+\trte_iova_t fault_address;\n+\tuint32_t invalid_flags;\n+} __rte_aligned(32);\n+\n /*** Definitions for Intel(R) Data Streaming Accelerator ***/\n \n #define IDXD_CMD_SHIFT 20\ndiff --git a/drivers/dma/idxd/idxd_internal.h b/drivers/dma/idxd/idxd_internal.h\nindex cb3a68c69b..99c8e04302 100644\n--- a/drivers/dma/idxd/idxd_internal.h\n+++ b/drivers/dma/idxd/idxd_internal.h\n@@ -39,6 +39,8 @@ struct idxd_pci_common {\n };\n \n struct idxd_dmadev {\n+\tstruct idxd_hw_desc *desc_ring;\n+\n \t/* counters to track the batches */\n \tunsigned short max_batches;\n \tunsigned short batch_idx_read;\n@@ -79,5 +81,6 @@ struct idxd_dmadev {\n \n int idxd_dmadev_create(const char *name, struct rte_device *dev,\n \t\tconst struct idxd_dmadev *base_idxd, const struct rte_dma_dev_ops *ops);\n+int idxd_dump(const struct rte_dma_dev *dev, FILE *f);\n \n #endif /* _IDXD_INTERNAL_H_ */\ndiff --git a/drivers/dma/idxd/idxd_pci.c b/drivers/dma/idxd/idxd_pci.c\nindex 171e5ffc07..33cf76adfb 100644\n--- a/drivers/dma/idxd/idxd_pci.c\n+++ b/drivers/dma/idxd/idxd_pci.c\n@@ -60,7 +60,7 @@ idxd_is_wq_enabled(struct idxd_dmadev *idxd)\n }\n \n static const struct rte_dma_dev_ops idxd_pci_ops = {\n-\n+\t.dev_dump = idxd_dump,\n };\n \n /* each portal uses 4 x 4k pages */\n", "prefixes": [ "v4", "06/16" ] }