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GET /api/patches/99017/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 99017,
    "url": "https://patches.dpdk.org/api/patches/99017/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210916095304.3058210-11-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210916095304.3058210-11-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210916095304.3058210-11-qi.z.zhang@intel.com",
    "date": "2021-09-16T09:53:02",
    "name": "[10/12] net/ice/base: add get/set functions for shared parameters",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "92fa262f8a250fb4a7ffccc8f2c43a4d9b0905fd",
    "submitter": {
        "id": 504,
        "url": "https://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210916095304.3058210-11-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 18975,
            "url": "https://patches.dpdk.org/api/series/18975/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=18975",
            "date": "2021-09-16T09:52:52",
            "name": "ice base code batch 2 for DPDK 21.11",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/18975/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/99017/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/99017/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D5539A0C41;\n\tThu, 16 Sep 2021 11:50:54 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7D3714113D;\n\tThu, 16 Sep 2021 11:50:23 +0200 (CEST)",
            "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id AB6E64113B\n for <dev@dpdk.org>; Thu, 16 Sep 2021 11:50:21 +0200 (CEST)",
            "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Sep 2021 02:50:21 -0700",
            "from dpdk51.sh.intel.com ([10.67.111.142])\n by fmsmga008.fm.intel.com with ESMTP; 16 Sep 2021 02:50:19 -0700"
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10108\"; a=\"222185889\"",
            "E=Sophos;i=\"5.85,298,1624345200\"; d=\"scan'208\";a=\"222185889\"",
            "E=Sophos;i=\"5.85,298,1624345200\"; d=\"scan'208\";a=\"509247029\""
        ],
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "qiming.yang@intel.com",
        "Cc": "junfeng.guo@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>",
        "Date": "Thu, 16 Sep 2021 17:53:02 +0800",
        "Message-Id": "<20210916095304.3058210-11-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20210916095304.3058210-1-qi.z.zhang@intel.com>",
        "References": "<20210916095304.3058210-1-qi.z.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 10/12] net/ice/base: add get/set functions for\n shared parameters",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add functions used by the driver for setting and getting the shared\ndriver parameters. These will be used by the driver in order to share\nthe PTP clock index identifier between PF drivers.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 10 ++++\n drivers/net/ice/base/ice_common.c     | 75 +++++++++++++++++++++++++++\n drivers/net/ice/base/ice_common.h     |  6 +++\n 3 files changed, 91 insertions(+)",
    "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex e9d6fcc3ad..253b971dfd 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -2713,6 +2713,16 @@ struct ice_aqc_driver_shared_params {\n \t__le32 addr_low;\n };\n \n+enum ice_aqc_driver_params {\n+\t/* OS clock index for PTP timer Domain 0 */\n+\tICE_AQC_DRIVER_PARAM_CLK_IDX_TMR0 = 0,\n+\t/* OS clock index for PTP timer Domain 1 */\n+\tICE_AQC_DRIVER_PARAM_CLK_IDX_TMR1,\n+\n+\t/* Add new parameters above */\n+\tICE_AQC_DRIVER_PARAM_MAX = 16,\n+};\n+\n /* Lan Queue Overflow Event (direct, 0x1001) */\n struct ice_aqc_event_lan_overflow {\n \t__le32 prtdcb_ruptq;\ndiff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 46b0dd11b8..ae55bebaa2 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -5494,6 +5494,81 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,\n \treturn ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n }\n \n+/**\n+ * ice_aq_set_driver_param - Set driver parameter to share via firmware\n+ * @hw: pointer to the HW struct\n+ * @idx: parameter index to set\n+ * @value: the value to set the parameter to\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Set the value of one of the software defined parameters. All PFs connected\n+ * to this device can read the value using ice_aq_get_driver_param.\n+ *\n+ * Note that firmware provides no synchronization or locking, and will not\n+ * save the parameter value during a device reset. It is expected that\n+ * a single PF will write the parameter value, while all other PFs will only\n+ * read it.\n+ */\n+enum ice_status\n+ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,\n+\t\t\tu32 value, struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_driver_shared_params *cmd;\n+\tstruct ice_aq_desc desc;\n+\n+\tif (idx >= ICE_AQC_DRIVER_PARAM_MAX)\n+\t\treturn ICE_ERR_OUT_OF_RANGE;\n+\n+\tcmd = &desc.params.drv_shared_params;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params);\n+\n+\tcmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_SET;\n+\tcmd->param_indx = idx;\n+\tcmd->param_val = CPU_TO_LE32(value);\n+\n+\treturn ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n+}\n+\n+/**\n+ * ice_aq_get_driver_param - Get driver parameter shared via firmware\n+ * @hw: pointer to the HW struct\n+ * @idx: parameter index to set\n+ * @value: storage to return the shared parameter\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Get the value of one of the software defined parameters.\n+ *\n+ * Note that firmware provides no synchronization or locking. It is expected\n+ * that only a single PF will write a given parameter.\n+ */\n+enum ice_status\n+ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,\n+\t\t\tu32 *value, struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_driver_shared_params *cmd;\n+\tstruct ice_aq_desc desc;\n+\tenum ice_status status;\n+\n+\tif (idx >= ICE_AQC_DRIVER_PARAM_MAX)\n+\t\treturn ICE_ERR_OUT_OF_RANGE;\n+\n+\tcmd = &desc.params.drv_shared_params;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params);\n+\n+\tcmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_GET;\n+\tcmd->param_indx = idx;\n+\n+\tstatus = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n+\tif (status)\n+\t\treturn status;\n+\n+\t*value = LE32_TO_CPU(cmd->param_val);\n+\n+\treturn ICE_SUCCESS;\n+}\n+\n /**\n  * ice_aq_set_gpio\n  * @hw: pointer to the hw struct\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex a5bfdc072e..1d8882c279 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -251,6 +251,12 @@ enum ice_status\n ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,\n \t\t     struct ice_aqc_txsched_elem_data *buf);\n enum ice_status\n+ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,\n+\t\t\tu32 value, struct ice_sq_cd *cd);\n+enum ice_status\n+ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,\n+\t\t\tu32 *value, struct ice_sq_cd *cd);\n+enum ice_status\n ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,\n \t\tstruct ice_sq_cd *cd);\n enum ice_status\n",
    "prefixes": [
        "10/12"
    ]
}