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GET /api/patches/98370/?format=api
{ "id": 98370, "url": "https://patches.dpdk.org/api/patches/98370/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/13d0adcbe7547d5ae6b7643f9141b8753ff5a2ec.1631120194.git.gmuthukrishn@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<13d0adcbe7547d5ae6b7643f9141b8753ff5a2ec.1631120194.git.gmuthukrishn@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/13d0adcbe7547d5ae6b7643f9141b8753ff5a2ec.1631120194.git.gmuthukrishn@marvell.com", "date": "2021-09-08T17:03:05", "name": "[v7,3/6] common/cnxk: add telemetry endpoints to nix", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7e7cd8bab89eb76f4f3315b11ca8c0711108376c", "submitter": { "id": 2301, "url": "https://patches.dpdk.org/api/people/2301/?format=api", "name": "Gowrishankar Muthukrishnan", "email": "gmuthukrishn@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/13d0adcbe7547d5ae6b7643f9141b8753ff5a2ec.1631120194.git.gmuthukrishn@marvell.com/mbox/", "series": [ { "id": 18768, "url": "https://patches.dpdk.org/api/series/18768/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=18768", "date": "2021-09-08T17:03:03", "name": "cnxk: enable telemetry endpoints", "version": 7, "mbox": "https://patches.dpdk.org/series/18768/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/98370/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/98370/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 693D5A0C5C;\n\tWed, 8 Sep 2021 19:03:45 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CD806411F5;\n\tWed, 8 Sep 2021 19:03:35 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id C3328411AF\n for <dev@dpdk.org>; Wed, 8 Sep 2021 19:03:33 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id\n 1889r8hr001046;\n Wed, 8 Sep 2021 10:03:33 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 3axtxc1nsk-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Wed, 08 Sep 2021 10:03:32 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Wed, 8 Sep 2021 10:03:30 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Wed, 8 Sep 2021 10:03:30 -0700", "from localhost.localdomain (unknown [10.28.34.38])\n by maili.marvell.com (Postfix) with ESMTP id 1601D3F7091;\n Wed, 8 Sep 2021 10:03:24 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=r/ojHykXO85TCXoj0ugTOrJvhssiNFPKLmnI33+P57k=;\n b=flP9gv50Rr6Lce0Cqa8vjXOYwTb/qD1flnGE0+5ItSvRhNggv5hxfOBqJltVkrGuOhy9\n LYvlvrkV17nbAaExd3fwIPnzQ6mm3pBrK+2dnrFFoSid3CfysW6iH44EcXTu6ytXJKJv\n 3EtY7dwfFo2QqvEEgpQ2r9Bk6WqPsxHekUERExOAqOD2q5gumTz8ENHAxqLQtNSj/AhS\n +mnHX/4aOTFF+bcsekOIxdC9WAE1q+Pav/zdFhgkimH1rBhCUFuvp0u9uL3qI3o9Lx6s\n ZmrdzQ2ePQpW9ORCO0GfKwiiqlQ+wdFcuI4vin/dvs74PmUHh2GuL2PDv8hIsgrJlSFP 5w==", "From": "Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<bruce.richardson@intel.com>, <ciara.power@intel.com>,\n <jerinj@marvell.com>, <kirankumark@marvell.com>,\n <ndabilpuram@marvell.com>, <skori@marvell.com>,\n <skoteshwar@marvell.com>, <asekhar@marvell.com>,\n <pbhagavatula@marvell.com>, <anoobj@marvell.com>,\n <adwivedi@marvell.com>, <ktejasree@marvell.com>, Gowrishankar Muthukrishnan\n <gmuthukrishn@marvell.com>", "Date": "Wed, 8 Sep 2021 22:33:05 +0530", "Message-ID": "\n <13d0adcbe7547d5ae6b7643f9141b8753ff5a2ec.1631120194.git.gmuthukrishn@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<cover.1631120194.git.gmuthukrishn@marvell.com>", "References": "<cover.1631120194.git.gmuthukrishn@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "Z7GiNLWH4S65rfKasjCFkV5sALBsZa7Y", "X-Proofpoint-GUID": "Z7GiNLWH4S65rfKasjCFkV5sALBsZa7Y", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-08_06,2021-09-07_02,2020-04-07_01", "Subject": "[dpdk-dev] [v7, 3/6] common/cnxk: add telemetry endpoints to nix", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add telemetry endpoints to nix.\n\nSigned-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>\n---\n drivers/common/cnxk/cnxk_telemetry_nix.c | 849 +++++++++++++++++++++++\n drivers/common/cnxk/meson.build | 3 +-\n drivers/common/cnxk/roc_nix.c | 3 +\n drivers/common/cnxk/roc_nix_priv.h | 9 +\n drivers/common/cnxk/roc_nix_queue.c | 15 +-\n drivers/common/cnxk/roc_platform.h | 3 +\n 6 files changed, 878 insertions(+), 4 deletions(-)\n create mode 100644 drivers/common/cnxk/cnxk_telemetry_nix.c", "diff": "diff --git a/drivers/common/cnxk/cnxk_telemetry_nix.c b/drivers/common/cnxk/cnxk_telemetry_nix.c\nnew file mode 100644\nindex 0000000000..ba54621fb6\n--- /dev/null\n+++ b/drivers/common/cnxk/cnxk_telemetry_nix.c\n@@ -0,0 +1,849 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cnxk_telemetry.h\"\n+#include \"roc_api.h\"\n+#include \"roc_priv.h\"\n+\n+struct nix_tel_node {\n+\tTAILQ_ENTRY(nix_tel_node) node;\n+\tstruct roc_nix *nix;\n+\tuint16_t n_rq;\n+\tuint16_t n_cq;\n+\tuint16_t n_sq;\n+\tstruct roc_nix_rq **rqs;\n+\tstruct roc_nix_cq **cqs;\n+\tstruct roc_nix_sq **sqs;\n+};\n+\n+TAILQ_HEAD(nix_tel_node_list, nix_tel_node);\n+static struct nix_tel_node_list nix_list;\n+\n+static struct nix_tel_node *\n+nix_tel_node_get(struct roc_nix *roc_nix)\n+{\n+\tstruct nix_tel_node *node, *roc_node = NULL;\n+\n+\tTAILQ_FOREACH(node, &nix_list, node) {\n+\t\tif (node->nix == roc_nix) {\n+\t\t\troc_node = node;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\treturn roc_node;\n+}\n+\n+int\n+nix_tel_node_add(struct roc_nix *roc_nix)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct nix_tel_node *node;\n+\n+\tnode = nix_tel_node_get(roc_nix);\n+\tif (node) {\n+\t\tif (nix->nb_rx_queues == node->n_rq &&\n+\t\t nix->nb_tx_queues == node->n_sq)\n+\t\t\treturn 0;\n+\n+\t\tnix_tel_node_del(roc_nix);\n+\t}\n+\n+\tnode = plt_zmalloc(sizeof(struct nix_tel_node), 0);\n+\tif (!node)\n+\t\treturn -1;\n+\n+\tnode->nix = roc_nix;\n+\tnode->rqs =\n+\t\tplt_zmalloc(nix->nb_rx_queues * sizeof(struct roc_nix_rq *), 0);\n+\tnode->cqs =\n+\t\tplt_zmalloc(nix->nb_rx_queues * sizeof(struct roc_nix_cq *), 0);\n+\tnode->sqs =\n+\t\tplt_zmalloc(nix->nb_tx_queues * sizeof(struct roc_nix_sq *), 0);\n+\tTAILQ_INSERT_TAIL(&nix_list, node, node);\n+\n+\treturn 0;\n+}\n+\n+void\n+nix_tel_node_del(struct roc_nix *roc_nix)\n+{\n+\tstruct nix_tel_node *node;\n+\n+\tTAILQ_FOREACH(node, &nix_list, node) {\n+\t\tif (node->nix == roc_nix) {\n+\t\t\tplt_free(node->rqs);\n+\t\t\tplt_free(node->cqs);\n+\t\t\tplt_free(node->rqs);\n+\t\t\tTAILQ_REMOVE(&nix_list, node, node);\n+\t\t}\n+\t}\n+\n+\tplt_free(node);\n+}\n+\n+static struct nix_tel_node *\n+nix_tel_node_get_by_pcidev_name(const char *name)\n+{\n+\tstruct nix_tel_node *node, *roc_node = NULL;\n+\n+\tTAILQ_FOREACH(node, &nix_list, node) {\n+\t\tif (!strncmp(node->nix->pci_dev->name, name,\n+\t\t\t PCI_PRI_STR_SIZE)) {\n+\t\t\troc_node = node;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\treturn roc_node;\n+}\n+\n+int\n+nix_tel_node_add_rq(struct roc_nix_rq *rq)\n+{\n+\tstruct nix_tel_node *node;\n+\n+\tnode = nix_tel_node_get(rq->roc_nix);\n+\tif (!node)\n+\t\treturn -1;\n+\n+\tnode->rqs[rq->qid] = rq;\n+\tnode->n_rq++;\n+\treturn 0;\n+}\n+\n+int\n+nix_tel_node_add_cq(struct roc_nix_cq *cq)\n+{\n+\tstruct nix_tel_node *node;\n+\n+\tnode = nix_tel_node_get(cq->roc_nix);\n+\tif (!node)\n+\t\treturn -1;\n+\n+\tnode->cqs[cq->qid] = cq;\n+\tnode->n_cq++;\n+\treturn 0;\n+}\n+\n+int\n+nix_tel_node_add_sq(struct roc_nix_sq *sq)\n+{\n+\tstruct nix_tel_node *node;\n+\n+\tnode = nix_tel_node_get(sq->roc_nix);\n+\tif (!node)\n+\t\treturn -1;\n+\n+\tnode->sqs[sq->qid] = sq;\n+\tnode->n_sq++;\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_tel_nix(struct roc_nix *roc_nix, struct plt_tel_data *d)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\n+\tstruct dev *dev = &nix->dev;\n+\n+\tplt_tel_data_add_dict_ptr(d, \"nix\", nix);\n+\tplt_tel_data_add_dict_int(d, \"pf_func\", dev->pf_func);\n+\tplt_tel_data_add_dict_int(d, \"pf\", dev_get_pf(dev->pf_func));\n+\tplt_tel_data_add_dict_int(d, \"vf\", dev_get_vf(dev->pf_func));\n+\n+\tCNXK_TEL_DICT_PTR(d, dev, bar2);\n+\tCNXK_TEL_DICT_PTR(d, dev, bar4);\n+\tCNXK_TEL_DICT_INT(d, roc_nix, port_id);\n+\tCNXK_TEL_DICT_INT(d, roc_nix, rss_tag_as_xor);\n+\tCNXK_TEL_DICT_INT(d, roc_nix, max_sqb_count);\n+\tCNXK_TEL_DICT_PTR(d, nix, pci_dev);\n+\tCNXK_TEL_DICT_PTR(d, nix, base);\n+\tCNXK_TEL_DICT_PTR(d, nix, lmt_base);\n+\tCNXK_TEL_DICT_INT(d, nix, reta_sz);\n+\tCNXK_TEL_DICT_INT(d, nix, tx_chan_base);\n+\tCNXK_TEL_DICT_INT(d, nix, rx_chan_base);\n+\tCNXK_TEL_DICT_INT(d, nix, nb_tx_queues);\n+\tCNXK_TEL_DICT_INT(d, nix, nb_rx_queues);\n+\tCNXK_TEL_DICT_INT(d, nix, lso_tsov6_idx);\n+\tCNXK_TEL_DICT_INT(d, nix, lso_tsov4_idx);\n+\n+\tplt_tel_data_add_dict_int(d, \"lso_udp_tun_v4v4\",\n+\t\t\t\t nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V4V4]);\n+\tplt_tel_data_add_dict_int(d, \"lso_udp_tun_v4v6\",\n+\t\t\t\t nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V4V6]);\n+\tplt_tel_data_add_dict_int(d, \"lso_udp_tun_v6v4\",\n+\t\t\t\t nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V6V4]);\n+\tplt_tel_data_add_dict_int(d, \"lso_udp_tun_v6v6\",\n+\t\t\t\t nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V6V6]);\n+\tplt_tel_data_add_dict_int(d, \"lso_tun_v4v4\",\n+\t\t\t\t nix->lso_tun_idx[ROC_NIX_LSO_TUN_V4V4]);\n+\tplt_tel_data_add_dict_int(d, \"lso_tun_v4v6\",\n+\t\t\t\t nix->lso_tun_idx[ROC_NIX_LSO_TUN_V4V6]);\n+\tplt_tel_data_add_dict_int(d, \"lso_tun_v6v4\",\n+\t\t\t\t nix->lso_tun_idx[ROC_NIX_LSO_TUN_V6V4]);\n+\tplt_tel_data_add_dict_int(d, \"lso_tun_v6v6\",\n+\t\t\t\t nix->lso_tun_idx[ROC_NIX_LSO_TUN_V6V6]);\n+\n+\tCNXK_TEL_DICT_INT(d, nix, lf_tx_stats);\n+\tCNXK_TEL_DICT_INT(d, nix, lf_rx_stats);\n+\tCNXK_TEL_DICT_INT(d, nix, cgx_links);\n+\tCNXK_TEL_DICT_INT(d, nix, lbk_links);\n+\tCNXK_TEL_DICT_INT(d, nix, sdp_links);\n+\tCNXK_TEL_DICT_INT(d, nix, tx_link);\n+\tCNXK_TEL_DICT_INT(d, nix, sqb_size);\n+\tCNXK_TEL_DICT_INT(d, nix, msixoff);\n+\tCNXK_TEL_DICT_INT(d, nix, cints);\n+\tCNXK_TEL_DICT_INT(d, nix, qints);\n+\tCNXK_TEL_DICT_INT(d, nix, sdp_link);\n+\tCNXK_TEL_DICT_INT(d, nix, ptp_en);\n+\tCNXK_TEL_DICT_INT(d, nix, rss_alg_idx);\n+\tCNXK_TEL_DICT_INT(d, nix, tx_pause);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_tel_nix_rq(struct roc_nix_rq *rq, struct plt_tel_data *d)\n+{\n+\tplt_tel_data_add_dict_ptr(d, \"nix_rq\", rq);\n+\tCNXK_TEL_DICT_INT(d, rq, qid);\n+\tCNXK_TEL_DICT_PTR(d, rq, aura_handle);\n+\tCNXK_TEL_DICT_INT(d, rq, ipsech_ena);\n+\tCNXK_TEL_DICT_INT(d, rq, first_skip);\n+\tCNXK_TEL_DICT_INT(d, rq, later_skip);\n+\tCNXK_TEL_DICT_INT(d, rq, lpb_size);\n+\tCNXK_TEL_DICT_INT(d, rq, sso_ena);\n+\tCNXK_TEL_DICT_INT(d, rq, tag_mask);\n+\tCNXK_TEL_DICT_INT(d, rq, flow_tag_width);\n+\tCNXK_TEL_DICT_INT(d, rq, tt);\n+\tCNXK_TEL_DICT_INT(d, rq, hwgrp);\n+\tCNXK_TEL_DICT_INT(d, rq, vwqe_ena);\n+\tCNXK_TEL_DICT_INT(d, rq, vwqe_first_skip);\n+\tCNXK_TEL_DICT_INT(d, rq, vwqe_max_sz_exp);\n+\tCNXK_TEL_DICT_INT(d, rq, vwqe_wait_tmo);\n+\tCNXK_TEL_DICT_INT(d, rq, vwqe_aura_handle);\n+\tCNXK_TEL_DICT_PTR(d, rq, roc_nix);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_tel_nix_cq(struct roc_nix_cq *cq, struct plt_tel_data *d)\n+{\n+\tplt_tel_data_add_dict_ptr(d, \"nix_cq\", cq);\n+\tCNXK_TEL_DICT_INT(d, cq, qid);\n+\tCNXK_TEL_DICT_INT(d, cq, nb_desc);\n+\tCNXK_TEL_DICT_PTR(d, cq, roc_nix);\n+\tCNXK_TEL_DICT_PTR(d, cq, door);\n+\tCNXK_TEL_DICT_PTR(d, cq, status);\n+\tCNXK_TEL_DICT_PTR(d, cq, wdata);\n+\tCNXK_TEL_DICT_PTR(d, cq, desc_base);\n+\tCNXK_TEL_DICT_INT(d, cq, qmask);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_tel_nix_sq(struct roc_nix_sq *sq, struct plt_tel_data *d)\n+{\n+\tplt_tel_data_add_dict_ptr(d, \"nix_sq\", sq);\n+\tCNXK_TEL_DICT_INT(d, sq, qid);\n+\tCNXK_TEL_DICT_INT(d, sq, max_sqe_sz);\n+\tCNXK_TEL_DICT_INT(d, sq, nb_desc);\n+\tCNXK_TEL_DICT_INT(d, sq, sqes_per_sqb_log2);\n+\tCNXK_TEL_DICT_PTR(d, sq, roc_nix);\n+\tCNXK_TEL_DICT_PTR(d, sq, aura_handle);\n+\tCNXK_TEL_DICT_INT(d, sq, nb_sqb_bufs_adj);\n+\tCNXK_TEL_DICT_INT(d, sq, nb_sqb_bufs);\n+\tCNXK_TEL_DICT_PTR(d, sq, io_addr);\n+\tCNXK_TEL_DICT_PTR(d, sq, lmt_addr);\n+\tCNXK_TEL_DICT_PTR(d, sq, sqe_mem);\n+\tCNXK_TEL_DICT_PTR(d, sq, fc);\n+\n+\treturn 0;\n+}\n+\n+static void\n+nix_rq_ctx_cn9k(void *qctx, struct plt_tel_data *d)\n+{\n+\tstruct nix_rq_ctx_s *ctx = (struct nix_rq_ctx_s *)qctx;\n+\n+\t/* W0 */\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_aura, w0_);\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, substream, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ena_wqwd, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ipsech_ena, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sso_ena, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ena, w0_);\n+\n+\t/* W1 */\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_drop_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_drop_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_drop_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_caching, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, pb_caching, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sso_tt, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sso_grp, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_aura, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_aura, w1_);\n+\n+\t/* W2 */\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_hdr_split, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_imm_copy, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_imm_size, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, later_skip, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, first_skip, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_sizem1, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_ena, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_skip, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_sizem1, w2_);\n+\n+\t/* W3 */\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_pool_pass, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_pool_drop, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_aura_pass, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_aura_drop, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_pool_pass, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_pool_drop, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_pass, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_drop, w3_);\n+\n+\t/* W4 */\n+\tCNXK_TEL_DICT_INT(d, ctx, qint_idx, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, rq_int_ena, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, rq_int, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_pool_pass, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_pool_drop, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_aura_pass, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_aura_drop, w4_);\n+\n+\t/* W5 */\n+\tCNXK_TEL_DICT_INT(d, ctx, flow_tagw, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, bad_utag, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, good_utag, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ltag, w5_);\n+\n+\t/* W6 */\n+\tCNXK_TEL_DICT_U64(d, ctx, octs, w6_);\n+\n+\t/* W7 */\n+\tCNXK_TEL_DICT_U64(d, ctx, pkts, w7_);\n+\n+\t/* W8 */\n+\tCNXK_TEL_DICT_U64(d, ctx, drop_octs, w8_);\n+\n+\t/* W9 */\n+\tCNXK_TEL_DICT_U64(d, ctx, drop_pkts, w9_);\n+\n+\t/* W10 */\n+\tCNXK_TEL_DICT_U64(d, ctx, re_pkts, w10_);\n+}\n+\n+static void\n+nix_rq_ctx(void *qctx, struct plt_tel_data *d)\n+{\n+\tstruct nix_cn10k_rq_ctx_s *ctx = (struct nix_cn10k_rq_ctx_s *)qctx;\n+\n+\t/* W0 */\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_aura, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, len_ol3_dis, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, len_ol4_dis, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, len_il3_dis, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, len_il4_dis, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, csum_ol4_dis, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lenerr_dis, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ena_wqwd, w0);\n+\tCNXK_TEL_DICT_INT(d, ctx, ipsech_ena, w0);\n+\tCNXK_TEL_DICT_INT(d, ctx, sso_ena, w0);\n+\tCNXK_TEL_DICT_INT(d, ctx, ena, w0);\n+\n+\t/* W1 */\n+\tCNXK_TEL_DICT_INT(d, ctx, chi_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ipsecd_drop_en, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, pb_stashing, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_drop_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_drop_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_drop_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_caching, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, pb_caching, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sso_tt, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sso_grp, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_aura, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_aura, w1_);\n+\n+\t/* W2 */\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_hdr_split, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_imm_copy, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_imm_size, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, later_skip, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, first_skip, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_sizem1, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_ena, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_skip, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_sizem1, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, policer_ena, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, band_prof_id, w2_);\n+\n+\t/* W3 */\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_pool_pass, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_pool_drop, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_aura_pass, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, spb_aura_drop, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_pool_pass, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, wqe_pool_drop, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_pass, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xqe_drop, w3_);\n+\n+\t/* W4 */\n+\tCNXK_TEL_DICT_INT(d, ctx, qint_idx, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, rq_int_ena, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, rq_int, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_pool_pass, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_pool_drop, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_aura_pass, w4_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lpb_aura_drop, w4_);\n+\n+\t/* W5 */\n+\tCNXK_TEL_DICT_INT(d, ctx, vwqe_skip, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, max_vsize_exp, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vtime_wait, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vwqe_ena, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ipsec_vwqe, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, flow_tagw, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, bad_utag, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, good_utag, w5_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ltag, w5_);\n+\n+\t/* W6 */\n+\tCNXK_TEL_DICT_U64(d, ctx, octs, w6_);\n+\n+\t/* W7 */\n+\tCNXK_TEL_DICT_U64(d, ctx, pkts, w7_);\n+\n+\t/* W8 */\n+\tCNXK_TEL_DICT_U64(d, ctx, drop_octs, w8_);\n+\n+\t/* W9 */\n+\tCNXK_TEL_DICT_U64(d, ctx, drop_pkts, w9_);\n+\n+\t/* W10 */\n+\tCNXK_TEL_DICT_U64(d, ctx, re_pkts, w10_);\n+}\n+\n+static int\n+cnxk_tel_nix_rq_ctx(struct roc_nix *roc_nix, uint8_t n, struct plt_tel_data *d)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct dev *dev = &nix->dev;\n+\tstruct npa_lf *npa_lf;\n+\tvolatile void *qctx;\n+\tint rc = -1;\n+\n+\tnpa_lf = idev_npa_obj_get();\n+\tif (npa_lf == NULL)\n+\t\treturn NPA_ERR_DEVICE_NOT_BOUNDED;\n+\n+\trc = nix_q_ctx_get(dev, NIX_AQ_CTYPE_RQ, n, &qctx);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to get rq context\");\n+\t\treturn rc;\n+\t}\n+\n+\tif (roc_model_is_cn9k())\n+\t\tnix_rq_ctx_cn9k(&qctx, d);\n+\telse\n+\t\tnix_rq_ctx(&qctx, d);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_tel_nix_cq_ctx(struct roc_nix *roc_nix, uint8_t n, struct plt_tel_data *d)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct dev *dev = &nix->dev;\n+\tstruct npa_lf *npa_lf;\n+\tvolatile struct nix_cq_ctx_s *ctx;\n+\tint rc = -1;\n+\n+\tnpa_lf = idev_npa_obj_get();\n+\tif (npa_lf == NULL)\n+\t\treturn NPA_ERR_DEVICE_NOT_BOUNDED;\n+\n+\trc = nix_q_ctx_get(dev, NIX_AQ_CTYPE_CQ, n, (void *)&ctx);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to get cq context\");\n+\t\treturn rc;\n+\t}\n+\n+\t/* W0 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, base, w0_);\n+\n+\t/* W1 */\n+\tCNXK_TEL_DICT_U64(d, ctx, wrptr, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, avg_con, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cint_idx, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq_err, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, qint_idx, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, bpid, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, bp_ena, w1_);\n+\n+\t/* W2 */\n+\tCNXK_TEL_DICT_INT(d, ctx, update_time, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, avg_level, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, head, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, tail, w2_);\n+\n+\t/* W3 */\n+\tCNXK_TEL_DICT_INT(d, ctx, cq_err_int_ena, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq_err_int, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, qsize, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, caching, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, substream, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ena, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, drop_ena, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, drop, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, bp, w3_);\n+\n+\treturn 0;\n+}\n+\n+static void\n+nix_sq_ctx_cn9k(void *qctx, struct plt_tel_data *d)\n+{\n+\tstruct nix_sq_ctx_s *ctx = (struct nix_sq_ctx_s *)qctx;\n+\n+\t/* W0 */\n+\tCNXK_TEL_DICT_INT(d, ctx, sqe_way_mask, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sdp_mcast, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, substream, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, qint_idx, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ena, w0_);\n+\n+\t/* W1 */\n+\tCNXK_TEL_DICT_INT(d, ctx, sqb_count, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, default_chan, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_rr_quantum, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sso_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xoff, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq, w1_);\n+\n+\t/* W2 */\n+\tCNXK_TEL_DICT_INT(d, ctx, sqe_stype, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sq_int_ena, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sq_int, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sqb_aura, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_rr_count, w2_);\n+\n+\t/* W3 */\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_next_sq_vld, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_pend, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smenq_next_sqb_vld, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, head_offset, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smenq_offset, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, tail_offset, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_lso_segnum, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_next_sq, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, mnq_dis, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lmt_dis, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq_limit, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, max_sqe_size, w3_);\n+\n+\t/* W4 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, next_sqb, w4_);\n+\n+\t/* W5 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, tail_sqb, w5_);\n+\n+\t/* W6 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, smenq_sqb, w6_);\n+\n+\t/* W7 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, smenq_next_sqb, w7_);\n+\n+\t/* W8 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, head_sqb, w8_);\n+\n+\t/* W9 */\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_vld, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_vlan1_ins_ena, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_vlan0_ins_ena, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_mps, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_sb, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_sizem1, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_total, w9_);\n+\n+\t/* W10 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, scm_lso_rem, w10_);\n+\n+\t/* W11 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, octs, w11_);\n+\n+\t/* W12 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, pkts, w12_);\n+\n+\t/* W14 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, drop_octs, w14_);\n+\n+\t/* W15 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, drop_pkts, w15_);\n+}\n+\n+static void\n+nix_sq_ctx(void *qctx, struct plt_tel_data *d)\n+{\n+\tstruct nix_cn10k_sq_ctx_s *ctx = (struct nix_cn10k_sq_ctx_s *)qctx;\n+\n+\t/* W0 */\n+\tCNXK_TEL_DICT_INT(d, ctx, sqe_way_mask, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sdp_mcast, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, substream, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, qint_idx, w0_);\n+\tCNXK_TEL_DICT_INT(d, ctx, ena, w0_);\n+\n+\t/* W1 */\n+\tCNXK_TEL_DICT_INT(d, ctx, sqb_count, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, default_chan, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_rr_weight, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sso_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, xoff, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq_ena, w1_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq, w1_);\n+\n+\t/* W2 */\n+\tCNXK_TEL_DICT_INT(d, ctx, sqe_stype, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sq_int_ena, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sq_int, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, sqb_aura, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_rr_count_ub, w2_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_rr_count_lb, w2_);\n+\n+\t/* W3 */\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_next_sq_vld, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_pend, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smenq_next_sqb_vld, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, head_offset, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smenq_offset, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, tail_offset, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_lso_segnum, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, smq_next_sq, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, mnq_dis, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, lmt_dis, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, cq_limit, w3_);\n+\tCNXK_TEL_DICT_INT(d, ctx, max_sqe_size, w3_);\n+\n+\t/* W4 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, next_sqb, w4_);\n+\n+\t/* W5 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, tail_sqb, w5_);\n+\n+\t/* W6 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, smenq_sqb, w6_);\n+\n+\t/* W7 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, smenq_next_sqb, w7_);\n+\n+\t/* W8 */\n+\tCNXK_TEL_DICT_PTR(d, ctx, head_sqb, w8_);\n+\n+\t/* W9 */\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_vld, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_vlan1_ins_ena, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_vlan0_ins_ena, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_mps, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_sb, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_sizem1, w9_);\n+\tCNXK_TEL_DICT_INT(d, ctx, vfi_lso_total, w9_);\n+\n+\t/* W10 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, scm_lso_rem, w10_);\n+\n+\t/* W11 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, octs, w11_);\n+\n+\t/* W12 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, pkts, w12_);\n+\n+\t/* W14 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, drop_octs, w14_);\n+\n+\t/* W15 */\n+\tCNXK_TEL_DICT_BF_PTR(d, ctx, drop_pkts, w15_);\n+}\n+\n+static int\n+cnxk_tel_nix_sq_ctx(struct roc_nix *roc_nix, uint8_t n, struct plt_tel_data *d)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct dev *dev = &nix->dev;\n+\tstruct npa_lf *npa_lf;\n+\tvolatile void *qctx;\n+\tint rc = -1;\n+\n+\tnpa_lf = idev_npa_obj_get();\n+\tif (npa_lf == NULL)\n+\t\treturn NPA_ERR_DEVICE_NOT_BOUNDED;\n+\n+\trc = nix_q_ctx_get(dev, NIX_AQ_CTYPE_SQ, n, &qctx);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to get rq context\");\n+\t\treturn rc;\n+\t}\n+\n+\tif (roc_model_is_cn9k())\n+\t\tnix_sq_ctx_cn9k(&qctx, d);\n+\telse\n+\t\tnix_sq_ctx(&qctx, d);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_nix_tel_handle_list(const char *cmd __plt_unused,\n+\t\t\t const char *params __plt_unused,\n+\t\t\t struct plt_tel_data *d)\n+{\n+\tstruct nix_tel_node *node;\n+\tstruct roc_nix *roc_nix;\n+\n+\tplt_tel_data_start_array(d, PLT_TEL_STRING_VAL);\n+\n+\tTAILQ_FOREACH(node, &nix_list, node) {\n+\t\troc_nix = node->nix;\n+\t\tplt_tel_data_add_array_string(d, roc_nix->pci_dev->name);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_nix_tel_handle_info(const char *cmd __plt_unused, const char *params,\n+\t\t\t struct plt_tel_data *d)\n+{\n+\tchar name[PCI_PRI_STR_SIZE];\n+\tstruct nix_tel_node *node;\n+\n+\tif (params == NULL || strlen(params) == 0 || !isdigit(*params))\n+\t\treturn -1;\n+\n+\tplt_strlcpy(name, params, PCI_PRI_STR_SIZE);\n+\n+\tnode = nix_tel_node_get_by_pcidev_name(name);\n+\tif (!node)\n+\t\treturn -1;\n+\n+\tplt_tel_data_start_dict(d);\n+\treturn cnxk_tel_nix(node->nix, d);\n+}\n+\n+static int\n+cnxk_nix_tel_handle_info_x(const char *cmd, const char *params,\n+\t\t\t struct plt_tel_data *d)\n+{\n+\tstruct nix_tel_node *node;\n+\tchar *name, *param;\n+\tchar buf[1024];\n+\tint rc = -1;\n+\n+\tif (params == NULL || strlen(params) == 0 || !isdigit(*params))\n+\t\tgoto exit;\n+\n+\tplt_strlcpy(buf, params, PCI_PRI_STR_SIZE + 1);\n+\tname = strtok(buf, \",\");\n+\tparam = strtok(NULL, \"\\0\");\n+\n+\tnode = nix_tel_node_get_by_pcidev_name(name);\n+\tif (!node)\n+\t\tgoto exit;\n+\n+\tplt_tel_data_start_dict(d);\n+\n+\tif (strstr(cmd, \"rq\")) {\n+\t\tchar *tok = strtok(param, \",\");\n+\t\tint rq;\n+\n+\t\tif (!tok)\n+\t\t\tgoto exit;\n+\n+\t\trq = strtol(tok, NULL, 10);\n+\t\tif ((node->n_rq <= rq) || (rq < 0))\n+\t\t\tgoto exit;\n+\n+\t\tif (strstr(cmd, \"ctx\"))\n+\t\t\trc = cnxk_tel_nix_rq_ctx(node->nix, rq, d);\n+\t\telse\n+\t\t\trc = cnxk_tel_nix_rq(node->rqs[rq], d);\n+\n+\t} else if (strstr(cmd, \"cq\")) {\n+\t\tchar *tok = strtok(param, \",\");\n+\t\tint cq;\n+\n+\t\tif (!tok)\n+\t\t\tgoto exit;\n+\n+\t\tcq = strtol(tok, NULL, 10);\n+\t\tif ((node->n_cq <= cq) || (cq < 0))\n+\t\t\tgoto exit;\n+\n+\t\tif (strstr(cmd, \"ctx\"))\n+\t\t\trc = cnxk_tel_nix_cq_ctx(node->nix, cq, d);\n+\t\telse\n+\t\t\trc = cnxk_tel_nix_cq(node->cqs[cq], d);\n+\n+\t} else if (strstr(cmd, \"sq\")) {\n+\t\tchar *tok = strtok(param, \",\");\n+\t\tint sq;\n+\n+\t\tif (!tok)\n+\t\t\tgoto exit;\n+\n+\t\tsq = strtol(tok, NULL, 10);\n+\t\tif ((node->n_sq <= sq) || (sq < 0))\n+\t\t\tgoto exit;\n+\n+\t\tif (strstr(cmd, \"ctx\"))\n+\t\t\trc = cnxk_tel_nix_sq_ctx(node->nix, sq, d);\n+\t\telse\n+\t\t\trc = cnxk_tel_nix_sq(node->sqs[sq], d);\n+\t}\n+\n+exit:\n+\treturn rc;\n+}\n+\n+PLT_INIT(cnxk_telemetry_nix_init)\n+{\n+\tTAILQ_INIT(&nix_list);\n+\n+\tplt_telemetry_register_cmd(\n+\t\t\"/cnxk/nix/list\", cnxk_nix_tel_handle_list,\n+\t\t\"Returns list of available NIX devices. Takes no parameters\");\n+\tplt_telemetry_register_cmd(\n+\t\t\"/cnxk/nix/info\", cnxk_nix_tel_handle_info,\n+\t\t\"Returns nix information. Parameters: pci id\");\n+\tplt_telemetry_register_cmd(\n+\t\t\"/cnxk/nix/rq/info\", cnxk_nix_tel_handle_info_x,\n+\t\t\"Returns nix rq information. Parameters: pci id, rq id\");\n+\tplt_telemetry_register_cmd(\n+\t\t\"/cnxk/nix/rq/ctx\", cnxk_nix_tel_handle_info_x,\n+\t\t\"Returns nix rq context. Parameters: pci id, rq id\");\n+\tplt_telemetry_register_cmd(\n+\t\t\"/cnxk/nix/cq/info\", cnxk_nix_tel_handle_info_x,\n+\t\t\"Returns nix cq information. Parameters: pci id, cq id\");\n+\tplt_telemetry_register_cmd(\n+\t\t\"/cnxk/nix/cq/ctx\", cnxk_nix_tel_handle_info_x,\n+\t\t\"Returns nix cq context. Parameters: pci id, cq id\");\n+\tplt_telemetry_register_cmd(\n+\t\t\"/cnxk/nix/sq/info\", cnxk_nix_tel_handle_info_x,\n+\t\t\"Returns nix sq information. Parameters: pci id, sq id\");\n+\tplt_telemetry_register_cmd(\n+\t\t\"/cnxk/nix/sq/ctx\", cnxk_nix_tel_handle_info_x,\n+\t\t\"Returns nix sq context. Parameters: pci id, sq id\");\n+}\ndiff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex f0a1c9f115..fe7a95b526 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -65,6 +65,7 @@ sources = files(\n sources += files('cnxk_security.c')\n \n # Telemetry common code\n-sources += files('cnxk_telemetry_npa.c')\n+sources += files('cnxk_telemetry_npa.c',\n+ 'cnxk_telemetry_nix.c')\n \n deps += ['bus_pci', 'net', 'telemetry']\ndiff --git a/drivers/common/cnxk/roc_nix.c b/drivers/common/cnxk/roc_nix.c\nindex 3ab954e94d..17beb1a736 100644\n--- a/drivers/common/cnxk/roc_nix.c\n+++ b/drivers/common/cnxk/roc_nix.c\n@@ -178,6 +178,8 @@ roc_nix_lf_alloc(struct roc_nix *roc_nix, uint32_t nb_rxq, uint32_t nb_txq,\n \tnix->sqs = plt_zmalloc(sizeof(struct roc_nix_sq *) * nb_txq, 0);\n \tif (!nix->sqs)\n \t\treturn -ENOMEM;\n+\n+\tnix_tel_node_add(roc_nix);\n fail:\n \treturn rc;\n }\n@@ -413,6 +415,7 @@ roc_nix_dev_init(struct roc_nix *roc_nix)\n dev_fini:\n \trc |= dev_fini(dev, pci_dev);\n fail:\n+\tnix_tel_node_del(roc_nix);\n \treturn rc;\n }\n \ndiff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h\nindex 2cd5a72347..ba639791ce 100644\n--- a/drivers/common/cnxk/roc_nix_priv.h\n+++ b/drivers/common/cnxk/roc_nix_priv.h\n@@ -424,4 +424,13 @@ int nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,\n int nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid,\n \t\t __io void **ctx_p);\n \n+/*\n+ * Telemetry\n+ */\n+int nix_tel_node_add(struct roc_nix *roc_nix);\n+void nix_tel_node_del(struct roc_nix *roc_nix);\n+int nix_tel_node_add_rq(struct roc_nix_rq *rq);\n+int nix_tel_node_add_cq(struct roc_nix_cq *cq);\n+int nix_tel_node_add_sq(struct roc_nix_sq *sq);\n+\n #endif /* _ROC_NIX_PRIV_H_ */\ndiff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c\nindex 8fbb13ecbd..f546fc83c5 100644\n--- a/drivers/common/cnxk/roc_nix_queue.c\n+++ b/drivers/common/cnxk/roc_nix_queue.c\n@@ -387,7 +387,11 @@ roc_nix_rq_init(struct roc_nix *roc_nix, struct roc_nix_rq *rq, bool ena)\n \tif (rc)\n \t\treturn rc;\n \n-\treturn mbox_process(mbox);\n+\trc = mbox_process(mbox);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn nix_tel_node_add_rq(rq);\n }\n \n int\n@@ -415,7 +419,11 @@ roc_nix_rq_modify(struct roc_nix *roc_nix, struct roc_nix_rq *rq, bool ena)\n \tif (rc)\n \t\treturn rc;\n \n-\treturn mbox_process(mbox);\n+\trc = mbox_process(mbox);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn nix_tel_node_add_rq(rq);\n }\n \n int\n@@ -504,7 +512,7 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)\n \tif (rc)\n \t\tgoto free_mem;\n \n-\treturn 0;\n+\treturn nix_tel_node_add_cq(cq);\n \n free_mem:\n \tplt_free(cq->desc_base);\n@@ -884,6 +892,7 @@ roc_nix_sq_init(struct roc_nix *roc_nix, struct roc_nix_sq *sq)\n \t\t\t\t\t((qid & RVU_CN9K_LMT_SLOT_MASK) << 12));\n \t}\n \n+\trc = nix_tel_node_add_sq(sq);\n \treturn rc;\n nomem:\n \tplt_free(sq->fc);\ndiff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h\nindex 57073d62aa..b95af115f7 100644\n--- a/drivers/common/cnxk/roc_platform.h\n+++ b/drivers/common/cnxk/roc_platform.h\n@@ -145,7 +145,10 @@\n \n #define plt_strlcpy rte_strlcpy\n \n+#define PLT_TEL_STRING_VAL RTE_TEL_STRING_VAL\n #define plt_tel_data\t\t rte_tel_data\n+#define plt_tel_data_start_array rte_tel_data_start_array\n+#define plt_tel_data_add_array_string rte_tel_data_add_array_string\n #define plt_tel_data_start_dict rte_tel_data_start_dict\n #define plt_tel_data_add_dict_int rte_tel_data_add_dict_int\n #define plt_tel_data_add_dict_ptr(d, n, v)\t\t\t\\\n", "prefixes": [ "v7", "3/6" ] }