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GET /api/patches/968/?format=api
{ "id": 968, "url": "https://patches.dpdk.org/api/patches/968/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1414376006-31402-5-git-send-email-jijiang.liu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1414376006-31402-5-git-send-email-jijiang.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1414376006-31402-5-git-send-email-jijiang.liu@intel.com", "date": "2014-10-27T02:13:20", "name": "[dpdk-dev,v8,04/10] i40e:support VxLAN packet identification in i40e", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "011e5dc84164299e30034df45583e5937ca3c57a", "submitter": { "id": 52, "url": "https://patches.dpdk.org/api/people/52/?format=api", "name": "Jijiang Liu", "email": "jijiang.liu@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1414376006-31402-5-git-send-email-jijiang.liu@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/968/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/968/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 96CEE7F4C;\n\tMon, 27 Oct 2014 03:05:09 +0100 (CET)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id 0DCE17F41\n\tfor <dev@dpdk.org>; Mon, 27 Oct 2014 03:05:00 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga101.jf.intel.com with ESMTP; 26 Oct 2014 19:13:41 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 26 Oct 2014 19:13:40 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s9R2DdkZ016735;\n\tMon, 27 Oct 2014 10:13:39 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s9R2DbfX031465; Mon, 27 Oct 2014 10:13:39 +0800", "(from jijiangl@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s9R2Da3D031461; \n\tMon, 27 Oct 2014 10:13:36 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.04,792,1406617200\"; d=\"scan'208\";a=\"625956281\"", "From": "Jijiang Liu <jijiang.liu@intel.com>", "To": "dev@dpdk.org", "Date": "Mon, 27 Oct 2014 10:13:20 +0800", "Message-Id": "<1414376006-31402-5-git-send-email-jijiang.liu@intel.com>", "X-Mailer": "git-send-email 1.7.12.2", "In-Reply-To": "<1414376006-31402-1-git-send-email-jijiang.liu@intel.com>", "References": "<1414376006-31402-1-git-send-email-jijiang.liu@intel.com>", "Subject": "[dpdk-dev] [PATCH v8 04/10] i40e:support VxLAN packet\n\tidentification in i40e", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Implement the configuration API of VxLAN destination UDP port in librte_pmd_i40e,\nand add new Rx offload flags for supporting VXLAN packet offload.\n\nSigned-off-by: Jijiang Liu <jijiang.liu@intel.com>\n---\n lib/librte_mbuf/rte_mbuf.h | 2 +\n lib/librte_pmd_i40e/i40e_ethdev.c | 157 +++++++++++++++++++++++++++++++++++++\n lib/librte_pmd_i40e/i40e_ethdev.h | 8 ++-\n lib/librte_pmd_i40e/i40e_rxtx.c | 105 +++++++++++++-----------\n 4 files changed, 223 insertions(+), 49 deletions(-)", "diff": "diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h\nindex 497d88b..9af3bd9 100644\n--- a/lib/librte_mbuf/rte_mbuf.h\n+++ b/lib/librte_mbuf/rte_mbuf.h\n@@ -91,6 +91,8 @@ extern \"C\" {\n #define PKT_RX_IPV6_HDR_EXT (1ULL << 8) /**< RX packet with extended IPv6 header. */\n #define PKT_RX_IEEE1588_PTP (1ULL << 9) /**< RX IEEE1588 L2 Ethernet PT Packet. */\n #define PKT_RX_IEEE1588_TMST (1ULL << 10) /**< RX IEEE1588 L2/L4 timestamped packet.*/\n+#define PKT_RX_TUNNEL_IPV4_HDR (1ULL << 11) /**< RX tunnel packet with IPv4 header.*/\n+#define PKT_RX_TUNNEL_IPV6_HDR (1ULL << 12) /**< RX tunnel packet with IPv6 header. */\n \n #define PKT_TX_VLAN_PKT (1ULL << 55) /**< TX packet is a 802.1q VLAN packet. */\n #define PKT_TX_IP_CKSUM (1ULL << 54) /**< IP cksum of TX pkt. computed by NIC. */\ndiff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c\nindex 3b75f0f..eb643e5 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.c\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.c\n@@ -186,6 +186,10 @@ static int i40e_dev_rss_hash_update(struct rte_eth_dev *dev,\n \t\t\t\t struct rte_eth_rss_conf *rss_conf);\n static int i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev,\n \t\t\t\t struct rte_eth_rss_conf *rss_conf);\n+static int i40e_dev_udp_tunnel_add(struct rte_eth_dev *dev,\n+\t\t\t\tstruct rte_eth_udp_tunnel *udp_tunnel);\n+static int i40e_dev_udp_tunnel_del(struct rte_eth_dev *dev,\n+\t\t\t\tstruct rte_eth_udp_tunnel *udp_tunnel);\n static int i40e_dev_filter_ctrl(struct rte_eth_dev *dev,\n \t\t\t\tenum rte_filter_type filter_type,\n \t\t\t\tenum rte_filter_op filter_op,\n@@ -241,6 +245,8 @@ static struct eth_dev_ops i40e_eth_dev_ops = {\n \t.reta_query = i40e_dev_rss_reta_query,\n \t.rss_hash_update = i40e_dev_rss_hash_update,\n \t.rss_hash_conf_get = i40e_dev_rss_hash_conf_get,\n+\t.udp_tunnel_add = i40e_dev_udp_tunnel_add,\n+\t.udp_tunnel_del = i40e_dev_udp_tunnel_del,\n \t.filter_ctrl = i40e_dev_filter_ctrl,\n };\n \n@@ -4092,6 +4098,157 @@ i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev,\n \treturn 0;\n }\n \n+static int\n+i40e_get_vxlan_port_idx(struct i40e_pf *pf, uint16_t port)\n+{\n+\tuint8_t i;\n+\n+\tfor (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {\n+\t\tif (pf->vxlan_ports[i] == port)\n+\t\t\treturn i;\n+\t}\n+\n+\treturn -1;\n+}\n+\n+static int\n+i40e_add_vxlan_port(struct i40e_pf *pf, uint16_t port)\n+{\n+\tint idx, ret;\n+\tuint8_t filter_idx;\n+\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n+\n+\tidx = i40e_get_vxlan_port_idx(pf, port);\n+\n+\t/* Check if port already exists */\n+\tif (idx >= 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Port %d already offloaded\\n\", port);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Now check if there is space to add the new port */\n+\tidx = i40e_get_vxlan_port_idx(pf, 0);\n+\tif (idx < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Maximum number of UDP ports reached,\"\n+\t\t\t\"not adding port %d\\n\", port);\n+\t\treturn -ENOSPC;\n+\t}\n+\n+\tret = i40e_aq_add_udp_tunnel(hw, port, I40E_AQC_TUNNEL_TYPE_VXLAN,\n+\t\t\t\t\t&filter_idx, NULL);\n+\tif (ret < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to add VxLAN UDP port %d\\n\", port);\n+\t\treturn -1;\n+\t}\n+\n+\tPMD_DRV_LOG(INFO, \"Added %s port %d with AQ command with index %d\\n\",\n+\t\t\t port, filter_index);\n+\n+\t/* New port: add it and mark its index in the bitmap */\n+\tpf->vxlan_ports[idx] = port;\n+\tpf->vxlan_bitmap |= (1 << idx);\n+\n+\tif (!(pf->flags & I40E_FLAG_VXLAN))\n+\t\tpf->flags |= I40E_FLAG_VXLAN;\n+\n+\treturn 0;\n+}\n+\n+static int\n+i40e_del_vxlan_port(struct i40e_pf *pf, uint16_t port)\n+{\n+\tint idx;\n+\tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n+\n+\tif (!(pf->flags & I40E_FLAG_VXLAN)) {\n+\t\tPMD_DRV_LOG(ERR, \"VxLAN UDP port was not configured.\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tidx = i40e_get_vxlan_port_idx(pf, port);\n+\n+\tif (idx < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Port %d doesn't exist\\n\", port);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (i40e_aq_del_udp_tunnel(hw, idx, NULL) < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to delete VxLAN UDP port %d\\n\", port);\n+\t\treturn -1;\n+\t}\n+\n+\tPMD_DRV_LOG(INFO, \"Deleted port %d with AQ command with index %d\\n\",\n+\t\t\tport, idx);\n+\n+\tpf->vxlan_ports[idx] = 0;\n+\tpf->vxlan_bitmap &= ~(1 << idx);\n+\n+\tif (!pf->vxlan_bitmap)\n+\t\tpf->flags &= ~I40E_FLAG_VXLAN;\n+\n+\treturn 0;\n+}\n+\n+/* Add UDP tunneling port */\n+static int\n+i40e_dev_udp_tunnel_add(struct rte_eth_dev *dev,\n+\t\t\tstruct rte_eth_udp_tunnel *udp_tunnel)\n+{\n+\tint ret = 0;\n+\tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\n+\tif (udp_tunnel == NULL)\n+\t\treturn -EINVAL;\n+\n+\tswitch (udp_tunnel->prot_type) {\n+\tcase RTE_TUNNEL_TYPE_VXLAN:\n+\t\tret = i40e_add_vxlan_port(pf, udp_tunnel->udp_port);\n+\t\tbreak;\n+\n+\tcase RTE_TUNNEL_TYPE_GENEVE:\n+\tcase RTE_TUNNEL_TYPE_TEREDO:\n+\t\tPMD_DRV_LOG(ERR, \"Tunnel type is not supported now.\\n\");\n+\t\tret = -1;\n+\t\tbreak;\n+\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"Invalid tunnel type\\n\");\n+\t\tret = -1;\n+\t\tbreak;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+/* Remove UDP tunneling port */\n+static int\n+i40e_dev_udp_tunnel_del(struct rte_eth_dev *dev,\n+\t\t\tstruct rte_eth_udp_tunnel *udp_tunnel)\n+{\n+\tint ret = 0;\n+\tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\n+\tif (udp_tunnel == NULL)\n+\t\treturn -EINVAL;\n+\n+\tswitch (udp_tunnel->prot_type) {\n+\tcase RTE_TUNNEL_TYPE_VXLAN:\n+\t\tret = i40e_del_vxlan_port(pf, udp_tunnel->udp_port);\n+\t\tbreak;\n+\tcase RTE_TUNNEL_TYPE_GENEVE:\n+\tcase RTE_TUNNEL_TYPE_TEREDO:\n+\t\tPMD_DRV_LOG(ERR, \"Tunnel type is not supported now.\\n\");\n+\t\tret = -1;\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"Invalid tunnel type\\n\");\n+\t\tret = -1;\n+\t\tbreak;\n+\t}\n+\n+\treturn ret;\n+}\n+\n /* Configure RSS */\n static int\n i40e_pf_config_rss(struct i40e_pf *pf)\ndiff --git a/lib/librte_pmd_i40e/i40e_ethdev.h b/lib/librte_pmd_i40e/i40e_ethdev.h\nindex 1d42cd2..826a1fb 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.h\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.h\n@@ -60,13 +60,15 @@\n #define I40E_FLAG_HEADER_SPLIT_DISABLED (1ULL << 4)\n #define I40E_FLAG_HEADER_SPLIT_ENABLED (1ULL << 5)\n #define I40E_FLAG_FDIR (1ULL << 6)\n+#define I40E_FLAG_VXLAN (1ULL << 7)\n #define I40E_FLAG_ALL (I40E_FLAG_RSS | \\\n \t\t I40E_FLAG_DCB | \\\n \t\t I40E_FLAG_VMDQ | \\\n \t\t I40E_FLAG_SRIOV | \\\n \t\t I40E_FLAG_HEADER_SPLIT_DISABLED | \\\n \t\t I40E_FLAG_HEADER_SPLIT_ENABLED | \\\n-\t\t I40E_FLAG_FDIR)\n+\t\t I40E_FLAG_FDIR | \\\n+\t\t I40E_FLAG_VXLAN)\n \n #define I40E_RSS_OFFLOAD_ALL ( \\\n \tETH_RSS_NONF_IPV4_UDP | \\\n@@ -246,6 +248,10 @@ struct i40e_pf {\n \tuint16_t vmdq_nb_qps; /* The number of queue pairs of VMDq */\n \tuint16_t vf_nb_qps; /* The number of queue pairs of VF */\n \tuint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */\n+\n+\t/* store VxLAN UDP ports */\n+\tuint16_t vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];\n+\tuint16_t vxlan_bitmap; /* Vxlan bit mask */\n };\n \n enum pending_msg {\ndiff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c\nindex 2b53677..2108290 100644\n--- a/lib/librte_pmd_i40e/i40e_rxtx.c\n+++ b/lib/librte_pmd_i40e/i40e_rxtx.c\n@@ -208,34 +208,34 @@ i40e_rxd_ptype_to_pkt_flags(uint64_t qword)\n \t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 56 */\n \t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 57 */\n \t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 58 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 59 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 60 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 61 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 59 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 60 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 61 */\n \t\t0, /* PTYPE 62 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 63 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 64 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 65 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 66 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 67 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 68 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 63 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 64 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 65 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 66 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 67 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 68 */\n \t\t0, /* PTYPE 69 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 70 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 71 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 72 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 73 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 74 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 75 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 76 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 70 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 71 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 72 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 73 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 74 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 75 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 76 */\n \t\t0, /* PTYPE 77 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 78 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 79 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 80 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 81 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 82 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 83 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 78 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 79 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 80 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 81 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 82 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 83 */\n \t\t0, /* PTYPE 84 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 85 */\n-\t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 86 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 85 */\n+\t\tPKT_RX_TUNNEL_IPV4_HDR, /* PTYPE 86 */\n \t\tPKT_RX_IPV4_HDR_EXT, /* PTYPE 87 */\n \t\tPKT_RX_IPV6_HDR, /* PTYPE 88 */\n \t\tPKT_RX_IPV6_HDR, /* PTYPE 89 */\n@@ -274,34 +274,34 @@ i40e_rxd_ptype_to_pkt_flags(uint64_t qword)\n \t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 122 */\n \t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 123 */\n \t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 124 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 125 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 126 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 127 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 125 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 126 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 127 */\n \t\t0, /* PTYPE 128 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 129 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 130 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 131 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 132 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 133 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 134 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 129 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 130 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 131 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 132 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 133 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 134 */\n \t\t0, /* PTYPE 135 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 136 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 137 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 138 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 139 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 140 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 141 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 142 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 136 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 137 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 138 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 139 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 140 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 141 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 142 */\n \t\t0, /* PTYPE 143 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 144 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 145 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 146 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 147 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 148 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 149 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 144 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 145 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 146 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 147 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 148 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 149 */\n \t\t0, /* PTYPE 150 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 151 */\n-\t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 152 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 151 */\n+\t\tPKT_RX_TUNNEL_IPV6_HDR, /* PTYPE 152 */\n \t\tPKT_RX_IPV6_HDR_EXT, /* PTYPE 153 */\n \t\t0, /* PTYPE 154 */\n \t\t0, /* PTYPE 155 */\n@@ -638,6 +638,10 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue *rxq)\n \t\t\tpkt_flags |= i40e_rxd_error_to_pkt_flags(qword1);\n \t\t\tpkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1);\n \t\t\tmb->ol_flags = pkt_flags;\n+\n+\t\t\tmb->packet_type = (uint16_t)((qword1 &\n+\t\t\t\t\tI40E_RXD_QW1_PTYPE_MASK) >>\n+\t\t\t\t\tI40E_RXD_QW1_PTYPE_SHIFT);\n \t\t\tif (pkt_flags & PKT_RX_RSS_HASH)\n \t\t\t\tmb->hash.rss = rte_le_to_cpu_32(\\\n \t\t\t\t\trxdp->wb.qword0.hi_dword.rss);\n@@ -873,6 +877,8 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \t\tpkt_flags = i40e_rxd_status_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_error_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1);\n+\t\trxm->packet_type = (uint16_t)((qword1 & I40E_RXD_QW1_PTYPE_MASK) >>\n+\t\t\t\tI40E_RXD_QW1_PTYPE_SHIFT);\n \t\trxm->ol_flags = pkt_flags;\n \t\tif (pkt_flags & PKT_RX_RSS_HASH)\n \t\t\trxm->hash.rss =\n@@ -1027,6 +1033,9 @@ i40e_recv_scattered_pkts(void *rx_queue,\n \t\tpkt_flags = i40e_rxd_status_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_error_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_ptype_to_pkt_flags(qword1);\n+\t\tfirst_seg->packet_type = (uint16_t)((qword1 &\n+\t\t\t\t\tI40E_RXD_QW1_PTYPE_MASK) >>\n+\t\t\t\t\tI40E_RXD_QW1_PTYPE_SHIFT);\n \t\tfirst_seg->ol_flags = pkt_flags;\n \t\tif (pkt_flags & PKT_RX_RSS_HASH)\n \t\t\trxm->hash.rss =\n", "prefixes": [ "dpdk-dev", "v8", "04/10" ] }