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GET /api/patches/96171/?format=api
{ "id": 96171, "url": "https://patches.dpdk.org/api/patches/96171/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210721143743.24626-16-xuemingl@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210721143743.24626-16-xuemingl@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210721143743.24626-16-xuemingl@nvidia.com", "date": "2021-07-21T14:37:42", "name": "[v4,15/16] crypto/mlx5: migrate to common driver", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f204636efb54e2a7f27539b3ded819beffd236fb", "submitter": { "id": 1904, "url": "https://patches.dpdk.org/api/people/1904/?format=api", "name": "Xueming Li", "email": "xuemingl@nvidia.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210721143743.24626-16-xuemingl@nvidia.com/mbox/", "series": [ { "id": 17938, "url": "https://patches.dpdk.org/api/series/17938/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17938", "date": "2021-07-21T14:37:27", "name": "net/mlx5: support Sub-Function", "version": 4, "mbox": "https://patches.dpdk.org/series/17938/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/96171/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/96171/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": 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3M5XoBO16DtOS9Moe6oawNQe0hKRSl4bE0ZyGxhmmW3iSPItSNabT3cyw80wXWWiNfGOlWfNzJU+d8lNEK8nAS6tTwi3L8L9LOYP8qSZCYPOTfmawDW/P6vFA68U5RQHESfR8ve2iiLCWTWYRfaRTJvR/mLe87YQzzUqGK8KMM0yASHJsphKlmSRCb/nb/MreeLeKbVTLwxKWWb/gaYcwGoPCsvCErxrnu2nGb5nvBvDjiGgYGMKTi9eV6EJE3eoMUT8rRSZOBDw7xZCTva70LuVTOpuiDcn5BIqjDLzIx2n/PaRQeLM2V1La/6WvdZwY6LAlOyhY/ro2Mhgw+MxhLEJSlyqvDDErRv3OURhbM+P+6XQjv//Iu8bsAx4vmNlHUNMVGsrvY10PFAYWwHzWrU0L2+kdwwNXMO+ofOIWFTwGq9MJJJrqnkr4YUbrUgnZAvG3ivUybhdzPdEHhqkeMkwqi7EbW0qbVR4jesOx/1QkBtIpe4Z62bGUuUXpUuBuvA8nO+2P3VrE415YV5vHdbpR6fRAtnMRCfG/y/ErMi0m+0x/LHBj2SjQizM3G9GI/pSdigtBk7i3SJ4STafF/TLFZkgSweO0czaBGR+Kdd0hip1uwtlnWGemd6DDdzkb6JIZa6pxDfUNhe+BklihfdR4ZCEJXxqm7MMwzoPdJdLCYugpUZ+RON/DxocZ5LDWm//hhY9Djo9p7RaCGAv8A==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(346002)(396003)(39860400002)(136003)(376002)(46966006)(36840700001)(6636002)(1076003)(7636003)(186003)(16526019)(4326008)(7696005)(107886003)(478600001)(2906002)(8676002)(5660300002)(55016002)(26005)(6862004)(82310400003)(36860700001)(426003)(70586007)(86362001)(336012)(6666004)(8936002)(36756003)(6286002)(37006003)(54906003)(356005)(2616005)(82740400003)(316002)(36906005)(47076005)(70206006)(83380400001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "21 Jul 2021 14:39:54.9318 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n b22d11bc-1b70-430e-a18d-08d94c556807", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT056.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR12MB4077", "Subject": "[dpdk-dev] [PATCH v4 15/16] crypto/mlx5: migrate to common driver", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "To support auxiliary bus, upgrades driver to use mlx5 common driver\nstructure.\n\nSigned-off-by: Xueming Li <xuemingl@nvidia.com>\n---\n drivers/crypto/mlx5/mlx5_crypto.c | 61 ++++++++-----------------------\n drivers/crypto/mlx5/mlx5_crypto.h | 1 -\n 2 files changed, 16 insertions(+), 46 deletions(-)", "diff": "diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c\nindex fc05bb7d46..ea734f4d5c 100644\n--- a/drivers/crypto/mlx5/mlx5_crypto.c\n+++ b/drivers/crypto/mlx5/mlx5_crypto.c\n@@ -6,12 +6,11 @@\n #include <rte_mempool.h>\n #include <rte_errno.h>\n #include <rte_log.h>\n-#include <rte_pci.h>\n+#include <rte_bus_pci.h>\n #include <rte_memory.h>\n \n #include <mlx5_glue.h>\n #include <mlx5_common.h>\n-#include <mlx5_common_pci.h>\n #include <mlx5_devx_cmds.h>\n #include <mlx5_common_os.h>\n \n@@ -977,23 +976,8 @@ mlx5_crypto_mr_mem_event_cb(enum rte_mem_event event_type, const void *addr,\n \t}\n }\n \n-/**\n- * DPDK callback to register a PCI device.\n- *\n- * This function spawns crypto device out of a given PCI device.\n- *\n- * @param[in] pci_drv\n- * PCI driver structure (mlx5_crypto_driver).\n- * @param[in] pci_dev\n- * PCI device information.\n- *\n- * @return\n- * 0 on success, 1 to skip this driver, a negative errno value otherwise\n- * and rte_errno is set.\n- */\n static int\n-mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n-\t\t\tstruct rte_pci_device *pci_dev)\n+mlx5_crypto_dev_probe(struct rte_device *dev)\n {\n \tstruct ibv_device *ibv;\n \tstruct rte_cryptodev *crypto_dev;\n@@ -1005,28 +989,21 @@ mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n \tstruct rte_cryptodev_pmd_init_params init_params = {\n \t\t.name = \"\",\n \t\t.private_data_size = sizeof(struct mlx5_crypto_priv),\n-\t\t.socket_id = pci_dev->device.numa_node,\n+\t\t.socket_id = dev->numa_node,\n \t\t.max_nb_queue_pairs =\n \t\t\t\tRTE_CRYPTODEV_PMD_DEFAULT_MAX_NB_QUEUE_PAIRS,\n \t};\n \tuint16_t rdmw_wqe_size;\n \tint ret;\n \n-\tRTE_SET_USED(pci_drv);\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY) {\n \t\tDRV_LOG(ERR, \"Non-primary process type is not supported.\");\n \t\trte_errno = ENOTSUP;\n \t\treturn -rte_errno;\n \t}\n-\tibv = mlx5_os_get_ibv_device(&pci_dev->addr);\n-\tif (ibv == NULL) {\n-\t\tDRV_LOG(ERR, \"No matching IB device for PCI slot \"\n-\t\t\tPCI_PRI_FMT \".\", pci_dev->addr.domain,\n-\t\t\tpci_dev->addr.bus, pci_dev->addr.devid,\n-\t\t\tpci_dev->addr.function);\n+\tibv = mlx5_os_get_ibv_dev(dev);\n+\tif (ibv == NULL)\n \t\treturn -rte_errno;\n-\t}\n-\tDRV_LOG(INFO, \"PCI information matches for device \\\"%s\\\".\", ibv->name);\n \tctx = mlx5_glue->dv_open_device(ibv);\n \tif (ctx == NULL) {\n \t\tDRV_LOG(ERR, \"Failed to open IB device \\\"%s\\\".\", ibv->name);\n@@ -1041,7 +1018,7 @@ mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n \t\trte_errno = ENOTSUP;\n \t\treturn -ENOTSUP;\n \t}\n-\tret = mlx5_crypto_parse_devargs(pci_dev->device.devargs, &devarg_prms);\n+\tret = mlx5_crypto_parse_devargs(dev->devargs, &devarg_prms);\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"Failed to parse devargs.\");\n \t\treturn -rte_errno;\n@@ -1052,7 +1029,7 @@ mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n \t\tDRV_LOG(ERR, \"Failed to configure login.\");\n \t\treturn -rte_errno;\n \t}\n-\tcrypto_dev = rte_cryptodev_pmd_create(ibv->name, &pci_dev->device,\n+\tcrypto_dev = rte_cryptodev_pmd_create(ibv->name, dev,\n \t\t\t\t\t&init_params);\n \tif (crypto_dev == NULL) {\n \t\tDRV_LOG(ERR, \"Failed to create device \\\"%s\\\".\", ibv->name);\n@@ -1069,7 +1046,6 @@ mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n \tpriv = crypto_dev->data->dev_private;\n \tpriv->ctx = ctx;\n \tpriv->login_obj = login;\n-\tpriv->pci_dev = pci_dev;\n \tpriv->crypto_dev = crypto_dev;\n \tif (mlx5_crypto_hw_global_prepare(priv) != 0) {\n \t\trte_cryptodev_pmd_destroy(priv->crypto_dev);\n@@ -1112,13 +1088,13 @@ mlx5_crypto_pci_probe(struct rte_pci_driver *pci_drv,\n }\n \n static int\n-mlx5_crypto_pci_remove(struct rte_pci_device *pdev)\n+mlx5_crypto_dev_remove(struct rte_device *dev)\n {\n \tstruct mlx5_crypto_priv *priv = NULL;\n \n \tpthread_mutex_lock(&priv_list_lock);\n \tTAILQ_FOREACH(priv, &mlx5_crypto_priv_list, next)\n-\t\tif (rte_pci_addr_cmp(&priv->pci_dev->addr, &pdev->addr) != 0)\n+\t\tif (priv->crypto_dev->device == dev)\n \t\t\tbreak;\n \tif (priv)\n \t\tTAILQ_REMOVE(&mlx5_crypto_priv_list, priv, next);\n@@ -1146,24 +1122,19 @@ static const struct rte_pci_id mlx5_crypto_pci_id_map[] = {\n \t\t}\n };\n \n-static struct mlx5_pci_driver mlx5_crypto_driver = {\n-\t.driver_class = MLX5_CLASS_CRYPTO,\n-\t.pci_driver = {\n-\t\t.driver = {\n-\t\t\t.name = RTE_STR(MLX5_CRYPTO_DRIVER_NAME),\n-\t\t},\n-\t\t.id_table = mlx5_crypto_pci_id_map,\n-\t\t.probe = mlx5_crypto_pci_probe,\n-\t\t.remove = mlx5_crypto_pci_remove,\n-\t\t.drv_flags = 0,\n-\t},\n+static struct mlx5_class_driver mlx5_crypto_driver = {\n+\t.drv_class = MLX5_CLASS_CRYPTO,\n+\t.name = RTE_STR(MLX5_CRYPTO_DRIVER_NAME),\n+\t.id_table = mlx5_crypto_pci_id_map,\n+\t.probe = mlx5_crypto_dev_probe,\n+\t.remove = mlx5_crypto_dev_remove,\n };\n \n RTE_INIT(rte_mlx5_crypto_init)\n {\n \tmlx5_common_init();\n \tif (mlx5_glue != NULL)\n-\t\tmlx5_pci_driver_register(&mlx5_crypto_driver);\n+\t\tmlx5_class_driver_register(&mlx5_crypto_driver);\n }\n \n RTE_PMD_REGISTER_CRYPTO_DRIVER(mlx5_cryptodev_driver, mlx5_drv,\ndiff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h\nindex e751c9c202..d49b0001f0 100644\n--- a/drivers/crypto/mlx5/mlx5_crypto.h\n+++ b/drivers/crypto/mlx5/mlx5_crypto.h\n@@ -20,7 +20,6 @@\n struct mlx5_crypto_priv {\n \tTAILQ_ENTRY(mlx5_crypto_priv) next;\n \tstruct ibv_context *ctx; /* Device context. */\n-\tstruct rte_pci_device *pci_dev;\n \tstruct rte_cryptodev *crypto_dev;\n \tvoid *uar; /* User Access Region. */\n \tvolatile uint64_t *uar_addr;\n", "prefixes": [ "v4", "15/16" ] }