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GET /api/patches/95395/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 95395,
    "url": "https://patches.dpdk.org/api/patches/95395/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210706133257.3353-8-suanmingm@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210706133257.3353-8-suanmingm@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210706133257.3353-8-suanmingm@nvidia.com",
    "date": "2021-07-06T13:32:38",
    "name": "[v4,07/26] net/mlx5: remove cache term from the list utility",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "8973ffdf62913f3081e936c53d36348efd645889",
    "submitter": {
        "id": 1887,
        "url": "https://patches.dpdk.org/api/people/1887/?format=api",
        "name": "Suanming Mou",
        "email": "suanmingm@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "https://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210706133257.3353-8-suanmingm@nvidia.com/mbox/",
    "series": [
        {
            "id": 17668,
            "url": "https://patches.dpdk.org/api/series/17668/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17668",
            "date": "2021-07-06T13:32:31",
            "name": "net/mlx5: insertion rate optimization",
            "version": 4,
            "mbox": "https://patches.dpdk.org/series/17668/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/95395/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/95395/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Suanming Mou <suanmingm@nvidia.com>",
        "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>",
        "CC": "<rasland@nvidia.com>, <orika@nvidia.com>, <dev@dpdk.org>",
        "Date": "Tue, 6 Jul 2021 16:32:38 +0300",
        "Message-ID": "<20210706133257.3353-8-suanmingm@nvidia.com>",
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        "Subject": "[dpdk-dev] [PATCH v4 07/26] net/mlx5: remove cache term from the\n list utility",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Matan Azrad <matan@nvidia.com>\n\nThe internal mlx5 list tool is used mainly when the list objects need to\nbe synchronized between multiple threads.\n\nThe \"cache\" term is used in the internal mlx5 list API.\n\nNext enhancements on this tool will use the \"cache\" term for per thread\ncache management.\n\nTo prevent confusing, remove the current \"cache\" term from the API's\nnames.\n\nSigned-off-by: Matan Azrad <matan@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_os.c   |  32 +-\n drivers/net/mlx5/mlx5.c            |   2 +-\n drivers/net/mlx5/mlx5.h            |  15 +-\n drivers/net/mlx5/mlx5_flow.h       |  88 ++---\n drivers/net/mlx5/mlx5_flow_dv.c    | 558 ++++++++++++++---------------\n drivers/net/mlx5/mlx5_rx.h         |  12 +-\n drivers/net/mlx5/mlx5_rxq.c        |  28 +-\n drivers/net/mlx5/mlx5_utils.c      |  78 ++--\n drivers/net/mlx5/mlx5_utils.h      |  94 ++---\n drivers/net/mlx5/windows/mlx5_os.c |   7 +-\n 10 files changed, 454 insertions(+), 460 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 4b050b4f4a..57b0a1c57f 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -272,27 +272,27 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)\n \t\tgoto error;\n \t/* The resources below are only valid with DV support. */\n #ifdef HAVE_IBV_FLOW_DV_SUPPORT\n-\t/* Init port id action cache list. */\n-\tsnprintf(s, sizeof(s), \"%s_port_id_action_cache\", sh->ibdev_name);\n-\tmlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,\n+\t/* Init port id action mlx5 list. */\n+\tsnprintf(s, sizeof(s), \"%s_port_id_action_list\", sh->ibdev_name);\n+\tmlx5_list_create(&sh->port_id_action_list, s, 0, sh,\n \t\t\t     flow_dv_port_id_create_cb,\n \t\t\t     flow_dv_port_id_match_cb,\n \t\t\t     flow_dv_port_id_remove_cb);\n-\t/* Init push vlan action cache list. */\n-\tsnprintf(s, sizeof(s), \"%s_push_vlan_action_cache\", sh->ibdev_name);\n-\tmlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,\n+\t/* Init push vlan action mlx5 list. */\n+\tsnprintf(s, sizeof(s), \"%s_push_vlan_action_list\", sh->ibdev_name);\n+\tmlx5_list_create(&sh->push_vlan_action_list, s, 0, sh,\n \t\t\t     flow_dv_push_vlan_create_cb,\n \t\t\t     flow_dv_push_vlan_match_cb,\n \t\t\t     flow_dv_push_vlan_remove_cb);\n-\t/* Init sample action cache list. */\n-\tsnprintf(s, sizeof(s), \"%s_sample_action_cache\", sh->ibdev_name);\n-\tmlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,\n+\t/* Init sample action mlx5 list. */\n+\tsnprintf(s, sizeof(s), \"%s_sample_action_list\", sh->ibdev_name);\n+\tmlx5_list_create(&sh->sample_action_list, s, 0, sh,\n \t\t\t     flow_dv_sample_create_cb,\n \t\t\t     flow_dv_sample_match_cb,\n \t\t\t     flow_dv_sample_remove_cb);\n-\t/* Init dest array action cache list. */\n-\tsnprintf(s, sizeof(s), \"%s_dest_array_cache\", sh->ibdev_name);\n-\tmlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,\n+\t/* Init dest array action mlx5 list. */\n+\tsnprintf(s, sizeof(s), \"%s_dest_array_list\", sh->ibdev_name);\n+\tmlx5_list_create(&sh->dest_array_list, s, 0, sh,\n \t\t\t     flow_dv_dest_array_create_cb,\n \t\t\t     flow_dv_dest_array_match_cb,\n \t\t\t     flow_dv_dest_array_remove_cb);\n@@ -500,8 +500,8 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv)\n \t\tmlx5_release_tunnel_hub(sh, priv->dev_port);\n \t\tsh->tunnel_hub = NULL;\n \t}\n-\tmlx5_cache_list_destroy(&sh->port_id_action_list);\n-\tmlx5_cache_list_destroy(&sh->push_vlan_action_list);\n+\tmlx5_list_destroy(&sh->port_id_action_list);\n+\tmlx5_list_destroy(&sh->push_vlan_action_list);\n \tmlx5_free_table_hash_list(priv);\n }\n \n@@ -1704,7 +1704,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\terr = ENOTSUP;\n \t\t\tgoto error;\n \t}\n-\tmlx5_cache_list_init(&priv->hrxqs, \"hrxq\", 0, eth_dev,\n+\tmlx5_list_create(&priv->hrxqs, \"hrxq\", 0, eth_dev,\n \t\t\t     mlx5_hrxq_create_cb,\n \t\t\t     mlx5_hrxq_match_cb,\n \t\t\t     mlx5_hrxq_remove_cb);\n@@ -1765,7 +1765,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\tmlx5_l3t_destroy(priv->mtr_profile_tbl);\n \t\tif (own_domain_id)\n \t\t\tclaim_zero(rte_eth_switch_domain_free(priv->domain_id));\n-\t\tmlx5_cache_list_destroy(&priv->hrxqs);\n+\t\tmlx5_list_destroy(&priv->hrxqs);\n \t\tmlx5_free(priv);\n \t\tif (eth_dev != NULL)\n \t\t\teth_dev->data->dev_private = NULL;\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 2c99da0fac..f51be5ace6 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -1609,7 +1609,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)\n \tif (ret)\n \t\tDRV_LOG(WARNING, \"port %u some flows still remain\",\n \t\t\tdev->data->port_id);\n-\tmlx5_cache_list_destroy(&priv->hrxqs);\n+\tmlx5_list_destroy(&priv->hrxqs);\n \t/*\n \t * Free the shared context in last turn, because the cleanup\n \t * routines above may use some shared fields, like\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex b196fd365f..bf1fbb530b 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -79,7 +79,7 @@ enum mlx5_flow_type {\n \tMLX5_FLOW_TYPE_MAXI,\n };\n \n-/* Hash and cache list callback context. */\n+/* Hlist and list callback context. */\n struct mlx5_flow_cb_ctx {\n \tstruct rte_eth_dev *dev;\n \tstruct rte_flow_error *error;\n@@ -1114,10 +1114,10 @@ struct mlx5_dev_ctx_shared {\n \tstruct mlx5_hlist *encaps_decaps; /* Encap/decap action hash list. */\n \tstruct mlx5_hlist *modify_cmds;\n \tstruct mlx5_hlist *tag_table;\n-\tstruct mlx5_cache_list port_id_action_list; /* Port ID action cache. */\n-\tstruct mlx5_cache_list push_vlan_action_list; /* Push VLAN actions. */\n-\tstruct mlx5_cache_list sample_action_list; /* List of sample actions. */\n-\tstruct mlx5_cache_list dest_array_list;\n+\tstruct mlx5_list port_id_action_list; /* Port ID action list. */\n+\tstruct mlx5_list push_vlan_action_list; /* Push VLAN actions. */\n+\tstruct mlx5_list sample_action_list; /* List of sample actions. */\n+\tstruct mlx5_list dest_array_list;\n \t/* List of destination array actions. */\n \tstruct mlx5_flow_counter_mng cmng; /* Counters management structure. */\n \tvoid *default_miss_action; /* Default miss action. */\n@@ -1221,7 +1221,7 @@ struct mlx5_ind_table_obj {\n /* Hash Rx queue. */\n __extension__\n struct mlx5_hrxq {\n-\tstruct mlx5_cache_entry entry; /* Cache entry. */\n+\tstruct mlx5_list_entry entry; /* List entry. */\n \tuint32_t standalone:1; /* This object used in shared action. */\n \tstruct mlx5_ind_table_obj *ind_table; /* Indirection table. */\n \tRTE_STD_C11\n@@ -1359,7 +1359,7 @@ struct mlx5_priv {\n \tstruct mlx5_obj_ops obj_ops; /* HW objects operations. */\n \tLIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */\n \tLIST_HEAD(rxqobj, mlx5_rxq_obj) rxqsobj; /* Verbs/DevX Rx queues. */\n-\tstruct mlx5_cache_list hrxqs; /* Hash Rx queues. */\n+\tstruct mlx5_list hrxqs; /* Hash Rx queues. */\n \tLIST_HEAD(txq, mlx5_txq_ctrl) txqsctrl; /* DPDK Tx queues. */\n \tLIST_HEAD(txqobj, mlx5_txq_obj) txqsobj; /* Verbs/DevX Tx queues. */\n \t/* Indirection tables. */\n@@ -1369,7 +1369,6 @@ struct mlx5_priv {\n \t/**< Verbs modify header action object. */\n \tuint8_t ft_type; /**< Flow table type, Rx or Tx. */\n \tuint8_t max_lro_msg_size;\n-\t/* Tags resources cache. */\n \tuint32_t link_speed_capa; /* Link speed capabilities. */\n \tstruct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */\n \tstruct mlx5_stats_ctrl stats_ctrl; /* Stats control. */\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 81c95e0beb..4dec703366 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -467,7 +467,7 @@ struct mlx5_flow_dv_match_params {\n \n /* Matcher structure. */\n struct mlx5_flow_dv_matcher {\n-\tstruct mlx5_cache_entry entry; /**< Pointer to the next element. */\n+\tstruct mlx5_list_entry entry; /**< Pointer to the next element. */\n \tstruct mlx5_flow_tbl_resource *tbl;\n \t/**< Pointer to the table(group) the matcher associated with. */\n \tvoid *matcher_object; /**< Pointer to DV matcher */\n@@ -547,7 +547,7 @@ struct mlx5_flow_dv_jump_tbl_resource {\n \n /* Port ID resource structure. */\n struct mlx5_flow_dv_port_id_action_resource {\n-\tstruct mlx5_cache_entry entry;\n+\tstruct mlx5_list_entry entry;\n \tvoid *action; /**< Action object. */\n \tuint32_t port_id; /**< Port ID value. */\n \tuint32_t idx; /**< Indexed pool memory index. */\n@@ -555,7 +555,7 @@ struct mlx5_flow_dv_port_id_action_resource {\n \n /* Push VLAN action resource structure */\n struct mlx5_flow_dv_push_vlan_action_resource {\n-\tstruct mlx5_cache_entry entry; /* Cache entry. */\n+\tstruct mlx5_list_entry entry; /* Cache entry. */\n \tvoid *action; /**< Action object. */\n \tuint8_t ft_type; /**< Flow table type, Rx, Tx or FDB. */\n \trte_be32_t vlan_tag; /**< VLAN tag value. */\n@@ -590,7 +590,7 @@ struct mlx5_flow_tbl_data_entry {\n \t/**< hash list entry, 64-bits key inside. */\n \tstruct mlx5_flow_tbl_resource tbl;\n \t/**< flow table resource. */\n-\tstruct mlx5_cache_list matchers;\n+\tstruct mlx5_list matchers;\n \t/**< matchers' header associated with the flow table. */\n \tstruct mlx5_flow_dv_jump_tbl_resource jump;\n \t/**< jump resource, at most one for each table created. */\n@@ -631,7 +631,7 @@ struct mlx5_flow_sub_actions_idx {\n \n /* Sample action resource structure. */\n struct mlx5_flow_dv_sample_resource {\n-\tstruct mlx5_cache_entry entry; /**< Cache entry. */\n+\tstruct mlx5_list_entry entry; /**< Cache entry. */\n \tunion {\n \t\tvoid *verbs_action; /**< Verbs sample action object. */\n \t\tvoid **sub_actions; /**< Sample sub-action array. */\n@@ -653,7 +653,7 @@ struct mlx5_flow_dv_sample_resource {\n \n /* Destination array action resource structure. */\n struct mlx5_flow_dv_dest_array_resource {\n-\tstruct mlx5_cache_entry entry; /**< Cache entry. */\n+\tstruct mlx5_list_entry entry; /**< Cache entry. */\n \tuint32_t idx; /** Destination array action object index. */\n \tuint8_t ft_type; /** Flow Table Type */\n \tuint8_t num_of_dest; /**< Number of destination actions. */\n@@ -1619,43 +1619,45 @@ struct mlx5_hlist_entry *flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,\n void flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,\n \t\t\t\t   struct mlx5_hlist_entry *entry);\n \n-int flow_dv_matcher_match_cb(struct mlx5_cache_list *list,\n-\t\t\t     struct mlx5_cache_entry *entry, void *ctx);\n-struct mlx5_cache_entry *flow_dv_matcher_create_cb(struct mlx5_cache_list *list,\n-\t\tstruct mlx5_cache_entry *entry, void *ctx);\n-void flow_dv_matcher_remove_cb(struct mlx5_cache_list *list,\n-\t\t\t       struct mlx5_cache_entry *entry);\n-\n-int flow_dv_port_id_match_cb(struct mlx5_cache_list *list,\n-\t\t\t     struct mlx5_cache_entry *entry, void *cb_ctx);\n-struct mlx5_cache_entry *flow_dv_port_id_create_cb(struct mlx5_cache_list *list,\n-\t\tstruct mlx5_cache_entry *entry, void *cb_ctx);\n-void flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,\n-\t\t\t       struct mlx5_cache_entry *entry);\n-\n-int flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list,\n-\t\t\t       struct mlx5_cache_entry *entry, void *cb_ctx);\n-struct mlx5_cache_entry *flow_dv_push_vlan_create_cb\n-\t\t\t\t(struct mlx5_cache_list *list,\n-\t\t\t\t struct mlx5_cache_entry *entry, void *cb_ctx);\n-void flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,\n-\t\t\t\t struct mlx5_cache_entry *entry);\n-\n-int flow_dv_sample_match_cb(struct mlx5_cache_list *list,\n-\t\t\t    struct mlx5_cache_entry *entry, void *cb_ctx);\n-struct mlx5_cache_entry *flow_dv_sample_create_cb\n-\t\t\t\t(struct mlx5_cache_list *list,\n-\t\t\t\t struct mlx5_cache_entry *entry, void *cb_ctx);\n-void flow_dv_sample_remove_cb(struct mlx5_cache_list *list,\n-\t\t\t      struct mlx5_cache_entry *entry);\n-\n-int flow_dv_dest_array_match_cb(struct mlx5_cache_list *list,\n-\t\t\t\tstruct mlx5_cache_entry *entry, void *cb_ctx);\n-struct mlx5_cache_entry *flow_dv_dest_array_create_cb\n-\t\t\t\t(struct mlx5_cache_list *list,\n-\t\t\t\t struct mlx5_cache_entry *entry, void *cb_ctx);\n-void flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list,\n-\t\t\t\t  struct mlx5_cache_entry *entry);\n+int flow_dv_matcher_match_cb(struct mlx5_list *list,\n+\t\t\t     struct mlx5_list_entry *entry, void *ctx);\n+struct mlx5_list_entry *flow_dv_matcher_create_cb(struct mlx5_list *list,\n+\t\t\t\t\t\t  struct mlx5_list_entry *entry,\n+\t\t\t\t\t\t  void *ctx);\n+void flow_dv_matcher_remove_cb(struct mlx5_list *list,\n+\t\t\t       struct mlx5_list_entry *entry);\n+\n+int flow_dv_port_id_match_cb(struct mlx5_list *list,\n+\t\t\t     struct mlx5_list_entry *entry, void *cb_ctx);\n+struct mlx5_list_entry *flow_dv_port_id_create_cb(struct mlx5_list *list,\n+\t\t\t\t\t\t  struct mlx5_list_entry *entry,\n+\t\t\t\t\t\t  void *cb_ctx);\n+void flow_dv_port_id_remove_cb(struct mlx5_list *list,\n+\t\t\t       struct mlx5_list_entry *entry);\n+\n+int flow_dv_push_vlan_match_cb(struct mlx5_list *list,\n+\t\t\t       struct mlx5_list_entry *entry, void *cb_ctx);\n+struct mlx5_list_entry *flow_dv_push_vlan_create_cb(struct mlx5_list *list,\n+\t\t\t\t\t\t  struct mlx5_list_entry *entry,\n+\t\t\t\t\t\t  void *cb_ctx);\n+void flow_dv_push_vlan_remove_cb(struct mlx5_list *list,\n+\t\t\t\t struct mlx5_list_entry *entry);\n+\n+int flow_dv_sample_match_cb(struct mlx5_list *list,\n+\t\t\t    struct mlx5_list_entry *entry, void *cb_ctx);\n+struct mlx5_list_entry *flow_dv_sample_create_cb(struct mlx5_list *list,\n+\t\t\t\t\t\t struct mlx5_list_entry *entry,\n+\t\t\t\t\t\t void *cb_ctx);\n+void flow_dv_sample_remove_cb(struct mlx5_list *list,\n+\t\t\t      struct mlx5_list_entry *entry);\n+\n+int flow_dv_dest_array_match_cb(struct mlx5_list *list,\n+\t\t\t\tstruct mlx5_list_entry *entry, void *cb_ctx);\n+struct mlx5_list_entry *flow_dv_dest_array_create_cb(struct mlx5_list *list,\n+\t\t\t\t\t\t  struct mlx5_list_entry *entry,\n+\t\t\t\t\t\t  void *cb_ctx);\n+void flow_dv_dest_array_remove_cb(struct mlx5_list *list,\n+\t\t\t\t  struct mlx5_list_entry *entry);\n struct mlx5_aso_age_action *flow_aso_age_get_by_idx(struct rte_eth_dev *dev,\n \t\t\t\t\t\t    uint32_t age_idx);\n int flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex bca8339361..d19b41c20a 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -3601,18 +3601,17 @@ flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,\n \t\t\t     uint64_t key __rte_unused, void *cb_ctx)\n {\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n-\tstruct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;\n-\tstruct mlx5_flow_dv_encap_decap_resource *cache_resource;\n-\n-\tcache_resource = container_of(entry,\n-\t\t\t\t      struct mlx5_flow_dv_encap_decap_resource,\n-\t\t\t\t      entry);\n-\tif (resource->reformat_type == cache_resource->reformat_type &&\n-\t    resource->ft_type == cache_resource->ft_type &&\n-\t    resource->flags == cache_resource->flags &&\n-\t    resource->size == cache_resource->size &&\n+\tstruct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;\n+\tstruct mlx5_flow_dv_encap_decap_resource *resource;\n+\n+\tresource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,\n+\t\t\t\tentry);\n+\tif (resource->reformat_type == ctx_resource->reformat_type &&\n+\t    resource->ft_type == ctx_resource->ft_type &&\n+\t    resource->flags == ctx_resource->flags &&\n+\t    resource->size == ctx_resource->size &&\n \t    !memcmp((const void *)resource->buf,\n-\t\t    (const void *)cache_resource->buf,\n+\t\t    (const void *)ctx_resource->buf,\n \t\t    resource->size))\n \t\treturn 0;\n \treturn -1;\n@@ -3639,31 +3638,30 @@ flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,\n \tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct mlx5dv_dr_domain *domain;\n-\tstruct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;\n-\tstruct mlx5_flow_dv_encap_decap_resource *cache_resource;\n+\tstruct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;\n+\tstruct mlx5_flow_dv_encap_decap_resource *resource;\n \tuint32_t idx;\n \tint ret;\n \n-\tif (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)\n+\tif (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)\n \t\tdomain = sh->fdb_domain;\n-\telse if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)\n+\telse if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)\n \t\tdomain = sh->rx_domain;\n \telse\n \t\tdomain = sh->tx_domain;\n \t/* Register new encap/decap resource. */\n-\tcache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],\n-\t\t\t\t       &idx);\n-\tif (!cache_resource) {\n+\tresource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);\n+\tif (!resource) {\n \t\trte_flow_error_set(ctx->error, ENOMEM,\n \t\t\t\t   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n \t\t\t\t   \"cannot allocate resource memory\");\n \t\treturn NULL;\n \t}\n-\t*cache_resource = *resource;\n-\tcache_resource->idx = idx;\n-\tret = mlx5_flow_os_create_flow_action_packet_reformat\n-\t\t\t\t\t(sh->ctx, domain, cache_resource,\n-\t\t\t\t\t &cache_resource->action);\n+\t*resource = *ctx_resource;\n+\tresource->idx = idx;\n+\tret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,\n+\t\t\t\t\t\t\t      resource,\n+\t\t\t\t\t\t\t     &resource->action);\n \tif (ret) {\n \t\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);\n \t\trte_flow_error_set(ctx->error, ENOMEM,\n@@ -3672,7 +3670,7 @@ flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,\n \t\treturn NULL;\n \t}\n \n-\treturn &cache_resource->entry;\n+\treturn &resource->entry;\n }\n \n /**\n@@ -3776,8 +3774,8 @@ flow_dv_jump_tbl_resource_register\n }\n \n int\n-flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t struct mlx5_cache_entry *entry, void *cb_ctx)\n+flow_dv_port_id_match_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t struct mlx5_list_entry *entry, void *cb_ctx)\n {\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;\n@@ -3787,30 +3785,30 @@ flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,\n \treturn ref->port_id != res->port_id;\n }\n \n-struct mlx5_cache_entry *\n-flow_dv_port_id_create_cb(struct mlx5_cache_list *list,\n-\t\t\t  struct mlx5_cache_entry *entry __rte_unused,\n+struct mlx5_list_entry *\n+flow_dv_port_id_create_cb(struct mlx5_list *list,\n+\t\t\t  struct mlx5_list_entry *entry __rte_unused,\n \t\t\t  void *cb_ctx)\n {\n \tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;\n-\tstruct mlx5_flow_dv_port_id_action_resource *cache;\n+\tstruct mlx5_flow_dv_port_id_action_resource *resource;\n \tuint32_t idx;\n \tint ret;\n \n \t/* Register new port id action resource. */\n-\tcache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);\n-\tif (!cache) {\n+\tresource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);\n+\tif (!resource) {\n \t\trte_flow_error_set(ctx->error, ENOMEM,\n \t\t\t\t   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n-\t\t\t\t   \"cannot allocate port_id action cache memory\");\n+\t\t\t\t   \"cannot allocate port_id action memory\");\n \t\treturn NULL;\n \t}\n-\t*cache = *ref;\n+\t*resource = *ref;\n \tret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,\n \t\t\t\t\t\t\tref->port_id,\n-\t\t\t\t\t\t\t&cache->action);\n+\t\t\t\t\t\t\t&resource->action);\n \tif (ret) {\n \t\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);\n \t\trte_flow_error_set(ctx->error, ENOMEM,\n@@ -3818,8 +3816,8 @@ flow_dv_port_id_create_cb(struct mlx5_cache_list *list,\n \t\t\t\t   \"cannot create action\");\n \t\treturn NULL;\n \t}\n-\tcache->idx = idx;\n-\treturn &cache->entry;\n+\tresource->idx = idx;\n+\treturn &resource->entry;\n }\n \n /**\n@@ -3827,8 +3825,8 @@ flow_dv_port_id_create_cb(struct mlx5_cache_list *list,\n  *\n  * @param[in, out] dev\n  *   Pointer to rte_eth_dev structure.\n- * @param[in, out] resource\n- *   Pointer to port ID action resource.\n+ * @param[in, out] ref\n+ *   Pointer to port ID action resource reference.\n  * @parm[in, out] dev_flow\n  *   Pointer to the dev_flow.\n  * @param[out] error\n@@ -3840,30 +3838,30 @@ flow_dv_port_id_create_cb(struct mlx5_cache_list *list,\n static int\n flow_dv_port_id_action_resource_register\n \t\t\t(struct rte_eth_dev *dev,\n-\t\t\t struct mlx5_flow_dv_port_id_action_resource *resource,\n+\t\t\t struct mlx5_flow_dv_port_id_action_resource *ref,\n \t\t\t struct mlx5_flow *dev_flow,\n \t\t\t struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_cache_entry *entry;\n-\tstruct mlx5_flow_dv_port_id_action_resource *cache;\n+\tstruct mlx5_list_entry *entry;\n+\tstruct mlx5_flow_dv_port_id_action_resource *resource;\n \tstruct mlx5_flow_cb_ctx ctx = {\n \t\t.error = error,\n-\t\t.data = resource,\n+\t\t.data = ref,\n \t};\n \n-\tentry = mlx5_cache_register(&priv->sh->port_id_action_list, &ctx);\n+\tentry = mlx5_list_register(&priv->sh->port_id_action_list, &ctx);\n \tif (!entry)\n \t\treturn -rte_errno;\n-\tcache = container_of(entry, typeof(*cache), entry);\n-\tdev_flow->dv.port_id_action = cache;\n-\tdev_flow->handle->rix_port_id_action = cache->idx;\n+\tresource = container_of(entry, typeof(*resource), entry);\n+\tdev_flow->dv.port_id_action = resource;\n+\tdev_flow->handle->rix_port_id_action = resource->idx;\n \treturn 0;\n }\n \n int\n-flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t struct mlx5_cache_entry *entry, void *cb_ctx)\n+flow_dv_push_vlan_match_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t struct mlx5_list_entry *entry, void *cb_ctx)\n {\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;\n@@ -3873,28 +3871,28 @@ flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,\n \treturn ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;\n }\n \n-struct mlx5_cache_entry *\n-flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,\n-\t\t\t  struct mlx5_cache_entry *entry __rte_unused,\n+struct mlx5_list_entry *\n+flow_dv_push_vlan_create_cb(struct mlx5_list *list,\n+\t\t\t  struct mlx5_list_entry *entry __rte_unused,\n \t\t\t  void *cb_ctx)\n {\n \tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;\n-\tstruct mlx5_flow_dv_push_vlan_action_resource *cache;\n+\tstruct mlx5_flow_dv_push_vlan_action_resource *resource;\n \tstruct mlx5dv_dr_domain *domain;\n \tuint32_t idx;\n \tint ret;\n \n \t/* Register new port id action resource. */\n-\tcache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);\n-\tif (!cache) {\n+\tresource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);\n+\tif (!resource) {\n \t\trte_flow_error_set(ctx->error, ENOMEM,\n \t\t\t\t   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n-\t\t\t\t   \"cannot allocate push_vlan action cache memory\");\n+\t\t\t\t   \"cannot allocate push_vlan action memory\");\n \t\treturn NULL;\n \t}\n-\t*cache = *ref;\n+\t*resource = *ref;\n \tif (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)\n \t\tdomain = sh->fdb_domain;\n \telse if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)\n@@ -3902,7 +3900,7 @@ flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,\n \telse\n \t\tdomain = sh->tx_domain;\n \tret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,\n-\t\t\t\t\t\t\t&cache->action);\n+\t\t\t\t\t\t\t&resource->action);\n \tif (ret) {\n \t\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);\n \t\trte_flow_error_set(ctx->error, ENOMEM,\n@@ -3910,8 +3908,8 @@ flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,\n \t\t\t\t   \"cannot create push vlan action\");\n \t\treturn NULL;\n \t}\n-\tcache->idx = idx;\n-\treturn &cache->entry;\n+\tresource->idx = idx;\n+\treturn &resource->entry;\n }\n \n /**\n@@ -3919,8 +3917,8 @@ flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,\n  *\n  * @param [in, out] dev\n  *   Pointer to rte_eth_dev structure.\n- * @param[in, out] resource\n- *   Pointer to port ID action resource.\n+ * @param[in, out] ref\n+ *   Pointer to port ID action resource reference.\n  * @parm[in, out] dev_flow\n  *   Pointer to the dev_flow.\n  * @param[out] error\n@@ -3932,25 +3930,25 @@ flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,\n static int\n flow_dv_push_vlan_action_resource_register\n \t\t       (struct rte_eth_dev *dev,\n-\t\t\tstruct mlx5_flow_dv_push_vlan_action_resource *resource,\n+\t\t\tstruct mlx5_flow_dv_push_vlan_action_resource *ref,\n \t\t\tstruct mlx5_flow *dev_flow,\n \t\t\tstruct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_flow_dv_push_vlan_action_resource *cache;\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_flow_dv_push_vlan_action_resource *resource;\n+\tstruct mlx5_list_entry *entry;\n \tstruct mlx5_flow_cb_ctx ctx = {\n \t\t.error = error,\n-\t\t.data = resource,\n+\t\t.data = ref,\n \t};\n \n-\tentry = mlx5_cache_register(&priv->sh->push_vlan_action_list, &ctx);\n+\tentry = mlx5_list_register(&priv->sh->push_vlan_action_list, &ctx);\n \tif (!entry)\n \t\treturn -rte_errno;\n-\tcache = container_of(entry, typeof(*cache), entry);\n+\tresource = container_of(entry, typeof(*resource), entry);\n \n-\tdev_flow->handle->dvh.rix_push_vlan = cache->idx;\n-\tdev_flow->dv.push_vlan_res = cache;\n+\tdev_flow->handle->dvh.rix_push_vlan = resource->idx;\n+\tdev_flow->dv.push_vlan_res = resource;\n \treturn 0;\n }\n \n@@ -9950,13 +9948,13 @@ flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)\n \t\t\treturn NULL;\n \t\t}\n \t}\n-\tMKSTR(matcher_name, \"%s_%s_%u_%u_matcher_cache\",\n+\tMKSTR(matcher_name, \"%s_%s_%u_%u_matcher_list\",\n \t      key.is_fdb ? \"FDB\" : \"NIC\", key.is_egress ? \"egress\" : \"ingress\",\n \t      key.level, key.id);\n-\tmlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,\n-\t\t\t     flow_dv_matcher_create_cb,\n-\t\t\t     flow_dv_matcher_match_cb,\n-\t\t\t     flow_dv_matcher_remove_cb);\n+\tmlx5_list_create(&tbl_data->matchers, matcher_name, 0, sh,\n+\t\t\t flow_dv_matcher_create_cb,\n+\t\t\t flow_dv_matcher_match_cb,\n+\t\t\t flow_dv_matcher_remove_cb);\n \treturn &tbl_data->entry;\n }\n \n@@ -10084,7 +10082,7 @@ flow_dv_tbl_remove_cb(struct mlx5_hlist *list,\n \t\t\ttbl_data->tunnel->tunnel_id : 0,\n \t\t\ttbl_data->group_id);\n \t}\n-\tmlx5_cache_list_destroy(&tbl_data->matchers);\n+\tmlx5_list_destroy(&tbl_data->matchers);\n \tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);\n }\n \n@@ -10112,8 +10110,8 @@ flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,\n }\n \n int\n-flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t struct mlx5_cache_entry *entry, void *cb_ctx)\n+flow_dv_matcher_match_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t struct mlx5_list_entry *entry, void *cb_ctx)\n {\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct mlx5_flow_dv_matcher *ref = ctx->data;\n@@ -10126,15 +10124,15 @@ flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,\n \t\t      (const void *)ref->mask.buf, ref->mask.size);\n }\n \n-struct mlx5_cache_entry *\n-flow_dv_matcher_create_cb(struct mlx5_cache_list *list,\n-\t\t\t  struct mlx5_cache_entry *entry __rte_unused,\n+struct mlx5_list_entry *\n+flow_dv_matcher_create_cb(struct mlx5_list *list,\n+\t\t\t  struct mlx5_list_entry *entry __rte_unused,\n \t\t\t  void *cb_ctx)\n {\n \tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct mlx5_flow_dv_matcher *ref = ctx->data;\n-\tstruct mlx5_flow_dv_matcher *cache;\n+\tstruct mlx5_flow_dv_matcher *resource;\n \tstruct mlx5dv_flow_matcher_attr dv_attr = {\n \t\t.type = IBV_FLOW_ATTR_NORMAL,\n \t\t.match_mask = (void *)&ref->mask,\n@@ -10143,29 +10141,30 @@ flow_dv_matcher_create_cb(struct mlx5_cache_list *list,\n \t\t\t\t\t\t\t    typeof(*tbl), tbl);\n \tint ret;\n \n-\tcache = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*cache), 0, SOCKET_ID_ANY);\n-\tif (!cache) {\n+\tresource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,\n+\t\t\t       SOCKET_ID_ANY);\n+\tif (!resource) {\n \t\trte_flow_error_set(ctx->error, ENOMEM,\n \t\t\t\t   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n \t\t\t\t   \"cannot create matcher\");\n \t\treturn NULL;\n \t}\n-\t*cache = *ref;\n+\t*resource = *ref;\n \tdv_attr.match_criteria_enable =\n-\t\tflow_dv_matcher_enable(cache->mask.buf);\n+\t\tflow_dv_matcher_enable(resource->mask.buf);\n \tdv_attr.priority = ref->priority;\n \tif (tbl->is_egress)\n \t\tdv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;\n \tret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,\n-\t\t\t\t\t       &cache->matcher_object);\n+\t\t\t\t\t       &resource->matcher_object);\n \tif (ret) {\n-\t\tmlx5_free(cache);\n+\t\tmlx5_free(resource);\n \t\trte_flow_error_set(ctx->error, ENOMEM,\n \t\t\t\t   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n \t\t\t\t   \"cannot create matcher\");\n \t\treturn NULL;\n \t}\n-\treturn &cache->entry;\n+\treturn &resource->entry;\n }\n \n /**\n@@ -10194,8 +10193,8 @@ flow_dv_matcher_register(struct rte_eth_dev *dev,\n \t\t\t uint32_t group_id,\n \t\t\t struct rte_flow_error *error)\n {\n-\tstruct mlx5_cache_entry *entry;\n-\tstruct mlx5_flow_dv_matcher *cache;\n+\tstruct mlx5_list_entry *entry;\n+\tstruct mlx5_flow_dv_matcher *resource;\n \tstruct mlx5_flow_tbl_resource *tbl;\n \tstruct mlx5_flow_tbl_data_entry *tbl_data;\n \tstruct mlx5_flow_cb_ctx ctx = {\n@@ -10215,15 +10214,15 @@ flow_dv_matcher_register(struct rte_eth_dev *dev,\n \t\treturn -rte_errno;\t/* No need to refill the error info */\n \ttbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);\n \tref->tbl = tbl;\n-\tentry = mlx5_cache_register(&tbl_data->matchers, &ctx);\n+\tentry = mlx5_list_register(&tbl_data->matchers, &ctx);\n \tif (!entry) {\n \t\tflow_dv_tbl_resource_release(MLX5_SH(dev), tbl);\n \t\treturn rte_flow_error_set(error, ENOMEM,\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,\n \t\t\t\t\t  \"cannot allocate ref memory\");\n \t}\n-\tcache = container_of(entry, typeof(*cache), entry);\n-\tdev_flow->handle->dvh.matcher = cache;\n+\tresource = container_of(entry, typeof(*resource), entry);\n+\tdev_flow->handle->dvh.matcher = resource;\n \treturn 0;\n }\n \n@@ -10291,15 +10290,15 @@ flow_dv_tag_resource_register\n \t\t\t struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_flow_dv_tag_resource *cache_resource;\n+\tstruct mlx5_flow_dv_tag_resource *resource;\n \tstruct mlx5_hlist_entry *entry;\n \n \tentry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);\n \tif (entry) {\n-\t\tcache_resource = container_of\n-\t\t\t(entry, struct mlx5_flow_dv_tag_resource, entry);\n-\t\tdev_flow->handle->dvh.rix_tag = cache_resource->idx;\n-\t\tdev_flow->dv.tag_resource = cache_resource;\n+\t\tresource = container_of(entry, struct mlx5_flow_dv_tag_resource,\n+\t\t\t\t\tentry);\n+\t\tdev_flow->handle->dvh.rix_tag = resource->idx;\n+\t\tdev_flow->dv.tag_resource = resource;\n \t\treturn 0;\n \t}\n \treturn -rte_errno;\n@@ -10626,68 +10625,69 @@ flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,\n }\n \n int\n-flow_dv_sample_match_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\tstruct mlx5_cache_entry *entry, void *cb_ctx)\n+flow_dv_sample_match_cb(struct mlx5_list *list __rte_unused,\n+\t\t\tstruct mlx5_list_entry *entry, void *cb_ctx)\n {\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct rte_eth_dev *dev = ctx->dev;\n-\tstruct mlx5_flow_dv_sample_resource *resource = ctx->data;\n-\tstruct mlx5_flow_dv_sample_resource *cache_resource =\n-\t\t\tcontainer_of(entry, typeof(*cache_resource), entry);\n-\n-\tif (resource->ratio == cache_resource->ratio &&\n-\t    resource->ft_type == cache_resource->ft_type &&\n-\t    resource->ft_id == cache_resource->ft_id &&\n-\t    resource->set_action == cache_resource->set_action &&\n-\t    !memcmp((void *)&resource->sample_act,\n-\t\t    (void *)&cache_resource->sample_act,\n+\tstruct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;\n+\tstruct mlx5_flow_dv_sample_resource *resource = container_of(entry,\n+\t\t\t\t\t\t\t      typeof(*resource),\n+\t\t\t\t\t\t\t      entry);\n+\n+\tif (ctx_resource->ratio == resource->ratio &&\n+\t    ctx_resource->ft_type == resource->ft_type &&\n+\t    ctx_resource->ft_id == resource->ft_id &&\n+\t    ctx_resource->set_action == resource->set_action &&\n+\t    !memcmp((void *)&ctx_resource->sample_act,\n+\t\t    (void *)&resource->sample_act,\n \t\t    sizeof(struct mlx5_flow_sub_actions_list))) {\n \t\t/*\n \t\t * Existing sample action should release the prepared\n \t\t * sub-actions reference counter.\n \t\t */\n \t\tflow_dv_sample_sub_actions_release(dev,\n-\t\t\t\t\t\t&resource->sample_idx);\n+\t\t\t\t\t\t   &ctx_resource->sample_idx);\n \t\treturn 0;\n \t}\n \treturn 1;\n }\n \n-struct mlx5_cache_entry *\n-flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t struct mlx5_cache_entry *entry __rte_unused,\n+struct mlx5_list_entry *\n+flow_dv_sample_create_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t struct mlx5_list_entry *entry __rte_unused,\n \t\t\t void *cb_ctx)\n {\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct rte_eth_dev *dev = ctx->dev;\n-\tstruct mlx5_flow_dv_sample_resource *resource = ctx->data;\n-\tvoid **sample_dv_actions = resource->sub_actions;\n-\tstruct mlx5_flow_dv_sample_resource *cache_resource;\n+\tstruct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;\n+\tvoid **sample_dv_actions = ctx_resource->sub_actions;\n+\tstruct mlx5_flow_dv_sample_resource *resource;\n \tstruct mlx5dv_dr_flow_sampler_attr sampler_attr;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_dev_ctx_shared *sh = priv->sh;\n \tstruct mlx5_flow_tbl_resource *tbl;\n \tuint32_t idx = 0;\n \tconst uint32_t next_ft_step = 1;\n-\tuint32_t next_ft_id = resource->ft_id +\tnext_ft_step;\n+\tuint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;\n \tuint8_t is_egress = 0;\n \tuint8_t is_transfer = 0;\n \tstruct rte_flow_error *error = ctx->error;\n \n \t/* Register new sample resource. */\n-\tcache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);\n-\tif (!cache_resource) {\n+\tresource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);\n+\tif (!resource) {\n \t\trte_flow_error_set(error, ENOMEM,\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n \t\t\t\t\t  NULL,\n \t\t\t\t\t  \"cannot allocate resource memory\");\n \t\treturn NULL;\n \t}\n-\t*cache_resource = *resource;\n+\t*resource = *ctx_resource;\n \t/* Create normal path table level */\n-\tif (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)\n+\tif (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)\n \t\tis_transfer = 1;\n-\telse if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)\n+\telse if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)\n \t\tis_egress = 1;\n \ttbl = flow_dv_tbl_resource_get(dev, next_ft_id,\n \t\t\t\t\tis_egress, is_transfer,\n@@ -10700,8 +10700,8 @@ flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,\n \t\t\t\t\t  \"for sample\");\n \t\tgoto error;\n \t}\n-\tcache_resource->normal_path_tbl = tbl;\n-\tif (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {\n+\tresource->normal_path_tbl = tbl;\n+\tif (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {\n \t\tif (!sh->default_miss_action) {\n \t\t\trte_flow_error_set(error, ENOMEM,\n \t\t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n@@ -10710,33 +10710,33 @@ flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,\n \t\t\t\t\t\t\"created\");\n \t\t\tgoto error;\n \t\t}\n-\t\tsample_dv_actions[resource->sample_act.actions_num++] =\n+\t\tsample_dv_actions[ctx_resource->sample_act.actions_num++] =\n \t\t\t\t\t\tsh->default_miss_action;\n \t}\n \t/* Create a DR sample action */\n-\tsampler_attr.sample_ratio = cache_resource->ratio;\n+\tsampler_attr.sample_ratio = resource->ratio;\n \tsampler_attr.default_next_table = tbl->obj;\n-\tsampler_attr.num_sample_actions = resource->sample_act.actions_num;\n+\tsampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;\n \tsampler_attr.sample_actions = (struct mlx5dv_dr_action **)\n \t\t\t\t\t\t\t&sample_dv_actions[0];\n-\tsampler_attr.action = cache_resource->set_action;\n+\tsampler_attr.action = resource->set_action;\n \tif (mlx5_os_flow_dr_create_flow_action_sampler\n-\t\t\t(&sampler_attr, &cache_resource->verbs_action)) {\n+\t\t\t(&sampler_attr, &resource->verbs_action)) {\n \t\trte_flow_error_set(error, ENOMEM,\n \t\t\t\t\tRTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n \t\t\t\t\tNULL, \"cannot create sample action\");\n \t\tgoto error;\n \t}\n-\tcache_resource->idx = idx;\n-\tcache_resource->dev = dev;\n-\treturn &cache_resource->entry;\n+\tresource->idx = idx;\n+\tresource->dev = dev;\n+\treturn &resource->entry;\n error:\n-\tif (cache_resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)\n+\tif (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)\n \t\tflow_dv_sample_sub_actions_release(dev,\n-\t\t\t\t\t\t   &cache_resource->sample_idx);\n-\tif (cache_resource->normal_path_tbl)\n+\t\t\t\t\t\t   &resource->sample_idx);\n+\tif (resource->normal_path_tbl)\n \t\tflow_dv_tbl_resource_release(MLX5_SH(dev),\n-\t\t\t\tcache_resource->normal_path_tbl);\n+\t\t\t\tresource->normal_path_tbl);\n \tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);\n \treturn NULL;\n \n@@ -10747,8 +10747,8 @@ flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,\n  *\n  * @param[in, out] dev\n  *   Pointer to rte_eth_dev structure.\n- * @param[in] resource\n- *   Pointer to sample resource.\n+ * @param[in] ref\n+ *   Pointer to sample resource reference.\n  * @parm[in, out] dev_flow\n  *   Pointer to the dev_flow.\n  * @param[out] error\n@@ -10759,66 +10759,66 @@ flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,\n  */\n static int\n flow_dv_sample_resource_register(struct rte_eth_dev *dev,\n-\t\t\t struct mlx5_flow_dv_sample_resource *resource,\n+\t\t\t struct mlx5_flow_dv_sample_resource *ref,\n \t\t\t struct mlx5_flow *dev_flow,\n \t\t\t struct rte_flow_error *error)\n {\n-\tstruct mlx5_flow_dv_sample_resource *cache_resource;\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_flow_dv_sample_resource *resource;\n+\tstruct mlx5_list_entry *entry;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_flow_cb_ctx ctx = {\n \t\t.dev = dev,\n \t\t.error = error,\n-\t\t.data = resource,\n+\t\t.data = ref,\n \t};\n \n-\tentry = mlx5_cache_register(&priv->sh->sample_action_list, &ctx);\n+\tentry = mlx5_list_register(&priv->sh->sample_action_list, &ctx);\n \tif (!entry)\n \t\treturn -rte_errno;\n-\tcache_resource = container_of(entry, typeof(*cache_resource), entry);\n-\tdev_flow->handle->dvh.rix_sample = cache_resource->idx;\n-\tdev_flow->dv.sample_res = cache_resource;\n+\tresource = container_of(entry, typeof(*resource), entry);\n+\tdev_flow->handle->dvh.rix_sample = resource->idx;\n+\tdev_flow->dv.sample_res = resource;\n \treturn 0;\n }\n \n int\n-flow_dv_dest_array_match_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t    struct mlx5_cache_entry *entry, void *cb_ctx)\n+flow_dv_dest_array_match_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t    struct mlx5_list_entry *entry, void *cb_ctx)\n {\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n-\tstruct mlx5_flow_dv_dest_array_resource *resource = ctx->data;\n+\tstruct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;\n \tstruct rte_eth_dev *dev = ctx->dev;\n-\tstruct mlx5_flow_dv_dest_array_resource *cache_resource =\n-\t\t\tcontainer_of(entry, typeof(*cache_resource), entry);\n+\tstruct mlx5_flow_dv_dest_array_resource *resource =\n+\t\t\tcontainer_of(entry, typeof(*resource), entry);\n \tuint32_t idx = 0;\n \n-\tif (resource->num_of_dest == cache_resource->num_of_dest &&\n-\t    resource->ft_type == cache_resource->ft_type &&\n-\t    !memcmp((void *)cache_resource->sample_act,\n-\t\t    (void *)resource->sample_act,\n-\t\t   (resource->num_of_dest *\n+\tif (ctx_resource->num_of_dest == resource->num_of_dest &&\n+\t    ctx_resource->ft_type == resource->ft_type &&\n+\t    !memcmp((void *)resource->sample_act,\n+\t\t    (void *)ctx_resource->sample_act,\n+\t\t   (ctx_resource->num_of_dest *\n \t\t   sizeof(struct mlx5_flow_sub_actions_list)))) {\n \t\t/*\n \t\t * Existing sample action should release the prepared\n \t\t * sub-actions reference counter.\n \t\t */\n-\t\tfor (idx = 0; idx < resource->num_of_dest; idx++)\n+\t\tfor (idx = 0; idx < ctx_resource->num_of_dest; idx++)\n \t\t\tflow_dv_sample_sub_actions_release(dev,\n-\t\t\t\t\t&resource->sample_idx[idx]);\n+\t\t\t\t\t&ctx_resource->sample_idx[idx]);\n \t\treturn 0;\n \t}\n \treturn 1;\n }\n \n-struct mlx5_cache_entry *\n-flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t struct mlx5_cache_entry *entry __rte_unused,\n+struct mlx5_list_entry *\n+flow_dv_dest_array_create_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t struct mlx5_list_entry *entry __rte_unused,\n \t\t\t void *cb_ctx)\n {\n \tstruct mlx5_flow_cb_ctx *ctx = cb_ctx;\n \tstruct rte_eth_dev *dev = ctx->dev;\n-\tstruct mlx5_flow_dv_dest_array_resource *cache_resource;\n-\tstruct mlx5_flow_dv_dest_array_resource *resource = ctx->data;\n+\tstruct mlx5_flow_dv_dest_array_resource *resource;\n+\tstruct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;\n \tstruct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };\n \tstruct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n@@ -10831,23 +10831,23 @@ flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,\n \tint ret;\n \n \t/* Register new destination array resource. */\n-\tcache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],\n+\tresource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],\n \t\t\t\t\t    &res_idx);\n-\tif (!cache_resource) {\n+\tif (!resource) {\n \t\trte_flow_error_set(error, ENOMEM,\n \t\t\t\t\t  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n \t\t\t\t\t  NULL,\n \t\t\t\t\t  \"cannot allocate resource memory\");\n \t\treturn NULL;\n \t}\n-\t*cache_resource = *resource;\n+\t*resource = *ctx_resource;\n \tif (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)\n \t\tdomain = sh->fdb_domain;\n \telse if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)\n \t\tdomain = sh->rx_domain;\n \telse\n \t\tdomain = sh->tx_domain;\n-\tfor (idx = 0; idx < resource->num_of_dest; idx++) {\n+\tfor (idx = 0; idx < ctx_resource->num_of_dest; idx++) {\n \t\tdest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)\n \t\t\t\t mlx5_malloc(MLX5_MEM_ZERO,\n \t\t\t\t sizeof(struct mlx5dv_dr_action_dest_attr),\n@@ -10860,7 +10860,7 @@ flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,\n \t\t\tgoto error;\n \t\t}\n \t\tdest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;\n-\t\tsample_act = &resource->sample_act[idx];\n+\t\tsample_act = &ctx_resource->sample_act[idx];\n \t\taction_flags = sample_act->action_flags;\n \t\tswitch (action_flags) {\n \t\tcase MLX5_FLOW_ACTION_QUEUE:\n@@ -10891,9 +10891,9 @@ flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,\n \t/* create a dest array actioin */\n \tret = mlx5_os_flow_dr_create_flow_action_dest_array\n \t\t\t\t\t\t(domain,\n-\t\t\t\t\t\t cache_resource->num_of_dest,\n+\t\t\t\t\t\t resource->num_of_dest,\n \t\t\t\t\t\t dest_attr,\n-\t\t\t\t\t\t &cache_resource->action);\n+\t\t\t\t\t\t &resource->action);\n \tif (ret) {\n \t\trte_flow_error_set(error, ENOMEM,\n \t\t\t\t   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n@@ -10901,19 +10901,18 @@ flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,\n \t\t\t\t   \"cannot create destination array action\");\n \t\tgoto error;\n \t}\n-\tcache_resource->idx = res_idx;\n-\tcache_resource->dev = dev;\n-\tfor (idx = 0; idx < resource->num_of_dest; idx++)\n+\tresource->idx = res_idx;\n+\tresource->dev = dev;\n+\tfor (idx = 0; idx < ctx_resource->num_of_dest; idx++)\n \t\tmlx5_free(dest_attr[idx]);\n-\treturn &cache_resource->entry;\n+\treturn &resource->entry;\n error:\n-\tfor (idx = 0; idx < resource->num_of_dest; idx++) {\n+\tfor (idx = 0; idx < ctx_resource->num_of_dest; idx++) {\n \t\tflow_dv_sample_sub_actions_release(dev,\n-\t\t\t\t&cache_resource->sample_idx[idx]);\n+\t\t\t\t\t\t   &resource->sample_idx[idx]);\n \t\tif (dest_attr[idx])\n \t\t\tmlx5_free(dest_attr[idx]);\n \t}\n-\n \tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);\n \treturn NULL;\n }\n@@ -10923,8 +10922,8 @@ flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,\n  *\n  * @param[in, out] dev\n  *   Pointer to rte_eth_dev structure.\n- * @param[in] resource\n- *   Pointer to destination array resource.\n+ * @param[in] ref\n+ *   Pointer to destination array resource reference.\n  * @parm[in, out] dev_flow\n  *   Pointer to the dev_flow.\n  * @param[out] error\n@@ -10935,25 +10934,25 @@ flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,\n  */\n static int\n flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,\n-\t\t\t struct mlx5_flow_dv_dest_array_resource *resource,\n+\t\t\t struct mlx5_flow_dv_dest_array_resource *ref,\n \t\t\t struct mlx5_flow *dev_flow,\n \t\t\t struct rte_flow_error *error)\n {\n-\tstruct mlx5_flow_dv_dest_array_resource *cache_resource;\n+\tstruct mlx5_flow_dv_dest_array_resource *resource;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_list_entry *entry;\n \tstruct mlx5_flow_cb_ctx ctx = {\n \t\t.dev = dev,\n \t\t.error = error,\n-\t\t.data = resource,\n+\t\t.data = ref,\n \t};\n \n-\tentry = mlx5_cache_register(&priv->sh->dest_array_list, &ctx);\n+\tentry = mlx5_list_register(&priv->sh->dest_array_list, &ctx);\n \tif (!entry)\n \t\treturn -rte_errno;\n-\tcache_resource = container_of(entry, typeof(*cache_resource), entry);\n-\tdev_flow->handle->dvh.rix_dest_array = cache_resource->idx;\n-\tdev_flow->dv.dest_array_res = cache_resource;\n+\tresource = container_of(entry, typeof(*resource), entry);\n+\tdev_flow->handle->dvh.rix_dest_array = resource->idx;\n+\tdev_flow->dv.dest_array_res = resource;\n \treturn 0;\n }\n \n@@ -13382,14 +13381,15 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,\n }\n \n void\n-flow_dv_matcher_remove_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t  struct mlx5_cache_entry *entry)\n+flow_dv_matcher_remove_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t  struct mlx5_list_entry *entry)\n {\n-\tstruct mlx5_flow_dv_matcher *cache = container_of(entry, typeof(*cache),\n-\t\t\t\t\t\t\t  entry);\n+\tstruct mlx5_flow_dv_matcher *resource = container_of(entry,\n+\t\t\t\t\t\t\t     typeof(*resource),\n+\t\t\t\t\t\t\t     entry);\n \n-\tclaim_zero(mlx5_flow_os_destroy_flow_matcher(cache->matcher_object));\n-\tmlx5_free(cache);\n+\tclaim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));\n+\tmlx5_free(resource);\n }\n \n /**\n@@ -13413,7 +13413,7 @@ flow_dv_matcher_release(struct rte_eth_dev *dev,\n \tint ret;\n \n \tMLX5_ASSERT(matcher->matcher_object);\n-\tret = mlx5_cache_unregister(&tbl->matchers, &matcher->entry);\n+\tret = mlx5_list_unregister(&tbl->matchers, &matcher->entry);\n \tflow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);\n \treturn ret;\n }\n@@ -13432,7 +13432,7 @@ flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,\n {\n \tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n \tstruct mlx5_flow_dv_encap_decap_resource *res =\n-\t\tcontainer_of(entry, typeof(*res), entry);\n+\t\t\t\t       container_of(entry, typeof(*res), entry);\n \n \tclaim_zero(mlx5_flow_os_destroy_flow_action(res->action));\n \tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);\n@@ -13454,15 +13454,14 @@ flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,\n \t\t\t\t     uint32_t encap_decap_idx)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_flow_dv_encap_decap_resource *cache_resource;\n+\tstruct mlx5_flow_dv_encap_decap_resource *resource;\n \n-\tcache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],\n-\t\t\t\t\tencap_decap_idx);\n-\tif (!cache_resource)\n+\tresource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],\n+\t\t\t\t  encap_decap_idx);\n+\tif (!resource)\n \t\treturn 0;\n-\tMLX5_ASSERT(cache_resource->action);\n-\treturn mlx5_hlist_unregister(priv->sh->encaps_decaps,\n-\t\t\t\t     &cache_resource->entry);\n+\tMLX5_ASSERT(resource->action);\n+\treturn mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);\n }\n \n /**\n@@ -13524,15 +13523,15 @@ flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,\n }\n \n void\n-flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,\n-\t\t\t  struct mlx5_cache_entry *entry)\n+flow_dv_port_id_remove_cb(struct mlx5_list *list,\n+\t\t\t  struct mlx5_list_entry *entry)\n {\n \tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n-\tstruct mlx5_flow_dv_port_id_action_resource *cache =\n-\t\t\tcontainer_of(entry, typeof(*cache), entry);\n+\tstruct mlx5_flow_dv_port_id_action_resource *resource =\n+\t\t\t\t  container_of(entry, typeof(*resource), entry);\n \n-\tclaim_zero(mlx5_flow_os_destroy_flow_action(cache->action));\n-\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], cache->idx);\n+\tclaim_zero(mlx5_flow_os_destroy_flow_action(resource->action));\n+\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);\n }\n \n /**\n@@ -13551,14 +13550,14 @@ flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,\n \t\t\t\t\tuint32_t port_id)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_flow_dv_port_id_action_resource *cache;\n+\tstruct mlx5_flow_dv_port_id_action_resource *resource;\n \n-\tcache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);\n-\tif (!cache)\n+\tresource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);\n+\tif (!resource)\n \t\treturn 0;\n-\tMLX5_ASSERT(cache->action);\n-\treturn mlx5_cache_unregister(&priv->sh->port_id_action_list,\n-\t\t\t\t     &cache->entry);\n+\tMLX5_ASSERT(resource->action);\n+\treturn mlx5_list_unregister(&priv->sh->port_id_action_list,\n+\t\t\t\t    &resource->entry);\n }\n \n /**\n@@ -13581,15 +13580,15 @@ flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)\n }\n \n void\n-flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,\n-\t\t\t    struct mlx5_cache_entry *entry)\n+flow_dv_push_vlan_remove_cb(struct mlx5_list *list,\n+\t\t\t    struct mlx5_list_entry *entry)\n {\n \tstruct mlx5_dev_ctx_shared *sh = list->ctx;\n-\tstruct mlx5_flow_dv_push_vlan_action_resource *cache =\n-\t\t\tcontainer_of(entry, typeof(*cache), entry);\n+\tstruct mlx5_flow_dv_push_vlan_action_resource *resource =\n+\t\t\tcontainer_of(entry, typeof(*resource), entry);\n \n-\tclaim_zero(mlx5_flow_os_destroy_flow_action(cache->action));\n-\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], cache->idx);\n+\tclaim_zero(mlx5_flow_os_destroy_flow_action(resource->action));\n+\tmlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);\n }\n \n /**\n@@ -13608,15 +13607,15 @@ flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,\n \t\t\t\t\t  struct mlx5_flow_handle *handle)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_flow_dv_push_vlan_action_resource *cache;\n+\tstruct mlx5_flow_dv_push_vlan_action_resource *resource;\n \tuint32_t idx = handle->dvh.rix_push_vlan;\n \n-\tcache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);\n-\tif (!cache)\n+\tresource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);\n+\tif (!resource)\n \t\treturn 0;\n-\tMLX5_ASSERT(cache->action);\n-\treturn mlx5_cache_unregister(&priv->sh->push_vlan_action_list,\n-\t\t\t\t     &cache->entry);\n+\tMLX5_ASSERT(resource->action);\n+\treturn mlx5_list_unregister(&priv->sh->push_vlan_action_list,\n+\t\t\t\t    &resource->entry);\n }\n \n /**\n@@ -13653,26 +13652,24 @@ flow_dv_fate_resource_release(struct rte_eth_dev *dev,\n }\n \n void\n-flow_dv_sample_remove_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t struct mlx5_cache_entry *entry)\n+flow_dv_sample_remove_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t struct mlx5_list_entry *entry)\n {\n-\tstruct mlx5_flow_dv_sample_resource *cache_resource =\n-\t\t\tcontainer_of(entry, typeof(*cache_resource), entry);\n-\tstruct rte_eth_dev *dev = cache_resource->dev;\n+\tstruct mlx5_flow_dv_sample_resource *resource = container_of(entry,\n+\t\t\t\t\t\t\t      typeof(*resource),\n+\t\t\t\t\t\t\t      entry);\n+\tstruct rte_eth_dev *dev = resource->dev;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \n-\tif (cache_resource->verbs_action)\n+\tif (resource->verbs_action)\n \t\tclaim_zero(mlx5_flow_os_destroy_flow_action\n-\t\t\t\t(cache_resource->verbs_action));\n-\tif (cache_resource->normal_path_tbl)\n+\t\t\t\t\t\t      (resource->verbs_action));\n+\tif (resource->normal_path_tbl)\n \t\tflow_dv_tbl_resource_release(MLX5_SH(dev),\n-\t\t\tcache_resource->normal_path_tbl);\n-\tflow_dv_sample_sub_actions_release(dev,\n-\t\t\t\t&cache_resource->sample_idx);\n-\tmlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],\n-\t\t\tcache_resource->idx);\n-\tDRV_LOG(DEBUG, \"sample resource %p: removed\",\n-\t\t(void *)cache_resource);\n+\t\t\t\t\t     resource->normal_path_tbl);\n+\tflow_dv_sample_sub_actions_release(dev, &resource->sample_idx);\n+\tmlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);\n+\tDRV_LOG(DEBUG, \"sample resource %p: removed\", (void *)resource);\n }\n \n /**\n@@ -13691,38 +13688,36 @@ flow_dv_sample_resource_release(struct rte_eth_dev *dev,\n \t\t\t\t     struct mlx5_flow_handle *handle)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_flow_dv_sample_resource *cache_resource;\n+\tstruct mlx5_flow_dv_sample_resource *resource;\n \n-\tcache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],\n-\t\t\t handle->dvh.rix_sample);\n-\tif (!cache_resource)\n+\tresource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],\n+\t\t\t\t  handle->dvh.rix_sample);\n+\tif (!resource)\n \t\treturn 0;\n-\tMLX5_ASSERT(cache_resource->verbs_action);\n-\treturn mlx5_cache_unregister(&priv->sh->sample_action_list,\n-\t\t\t\t     &cache_resource->entry);\n+\tMLX5_ASSERT(resource->verbs_action);\n+\treturn mlx5_list_unregister(&priv->sh->sample_action_list,\n+\t\t\t\t    &resource->entry);\n }\n \n void\n-flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t     struct mlx5_cache_entry *entry)\n+flow_dv_dest_array_remove_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t     struct mlx5_list_entry *entry)\n {\n-\tstruct mlx5_flow_dv_dest_array_resource *cache_resource =\n-\t\t\tcontainer_of(entry, typeof(*cache_resource), entry);\n-\tstruct rte_eth_dev *dev = cache_resource->dev;\n+\tstruct mlx5_flow_dv_dest_array_resource *resource =\n+\t\t\tcontainer_of(entry, typeof(*resource), entry);\n+\tstruct rte_eth_dev *dev = resource->dev;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tuint32_t i = 0;\n \n-\tMLX5_ASSERT(cache_resource->action);\n-\tif (cache_resource->action)\n-\t\tclaim_zero(mlx5_flow_os_destroy_flow_action\n-\t\t\t\t\t(cache_resource->action));\n-\tfor (; i < cache_resource->num_of_dest; i++)\n+\tMLX5_ASSERT(resource->action);\n+\tif (resource->action)\n+\t\tclaim_zero(mlx5_flow_os_destroy_flow_action(resource->action));\n+\tfor (; i < resource->num_of_dest; i++)\n \t\tflow_dv_sample_sub_actions_release(dev,\n-\t\t\t\t&cache_resource->sample_idx[i]);\n-\tmlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],\n-\t\t\tcache_resource->idx);\n+\t\t\t\t\t\t   &resource->sample_idx[i]);\n+\tmlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);\n \tDRV_LOG(DEBUG, \"destination array resource %p: removed\",\n-\t\t(void *)cache_resource);\n+\t\t(void *)resource);\n }\n \n /**\n@@ -13741,15 +13736,15 @@ flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,\n \t\t\t\t    struct mlx5_flow_handle *handle)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n-\tstruct mlx5_flow_dv_dest_array_resource *cache;\n+\tstruct mlx5_flow_dv_dest_array_resource *resource;\n \n-\tcache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],\n-\t\t\t       handle->dvh.rix_dest_array);\n-\tif (!cache)\n+\tresource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],\n+\t\t\t\t  handle->dvh.rix_dest_array);\n+\tif (!resource)\n \t\treturn 0;\n-\tMLX5_ASSERT(cache->action);\n-\treturn mlx5_cache_unregister(&priv->sh->dest_array_list,\n-\t\t\t\t     &cache->entry);\n+\tMLX5_ASSERT(resource->action);\n+\treturn mlx5_list_unregister(&priv->sh->dest_array_list,\n+\t\t\t\t    &resource->entry);\n }\n \n static void\n@@ -14592,7 +14587,7 @@ __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,\n \t\tif (sub_policy->color_matcher[i]) {\n \t\t\ttbl = container_of(sub_policy->color_matcher[i]->tbl,\n \t\t\t\ttypeof(*tbl), tbl);\n-\t\t\tmlx5_cache_unregister(&tbl->matchers,\n+\t\t\tmlx5_list_unregister(&tbl->matchers,\n \t\t\t\t      &sub_policy->color_matcher[i]->entry);\n \t\t\tsub_policy->color_matcher[i] = NULL;\n \t\t}\n@@ -15326,8 +15321,8 @@ flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)\n \t\tif (mtrmng->def_matcher[i]) {\n \t\t\ttbl = container_of(mtrmng->def_matcher[i]->tbl,\n \t\t\t\tstruct mlx5_flow_tbl_data_entry, tbl);\n-\t\t\tmlx5_cache_unregister(&tbl->matchers,\n-\t\t\t\t      &mtrmng->def_matcher[i]->entry);\n+\t\t\tmlx5_list_unregister(&tbl->matchers,\n+\t\t\t\t\t     &mtrmng->def_matcher[i]->entry);\n \t\t\tmtrmng->def_matcher[i] = NULL;\n \t\t}\n \t\tfor (j = 0; j < MLX5_REG_BITS; j++) {\n@@ -15336,8 +15331,8 @@ flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)\n \t\t\t\tcontainer_of(mtrmng->drop_matcher[i][j]->tbl,\n \t\t\t\t\t     struct mlx5_flow_tbl_data_entry,\n \t\t\t\t\t     tbl);\n-\t\t\t\tmlx5_cache_unregister(&tbl->matchers,\n-\t\t\t\t\t&mtrmng->drop_matcher[i][j]->entry);\n+\t\t\t\tmlx5_list_unregister(&tbl->matchers,\n+\t\t\t\t\t    &mtrmng->drop_matcher[i][j]->entry);\n \t\t\t\tmtrmng->drop_matcher[i][j] = NULL;\n \t\t\t}\n \t\t}\n@@ -15433,7 +15428,7 @@ __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,\n \t\t\tbool match_src_port,\n \t\t\tstruct rte_flow_error *error)\n {\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_list_entry *entry;\n \tstruct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;\n \tstruct mlx5_flow_dv_matcher matcher = {\n \t\t.mask = {\n@@ -15469,7 +15464,7 @@ __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,\n \tmatcher.priority = priority;\n \tmatcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,\n \t\t\t\t\tmatcher.mask.size);\n-\tentry = mlx5_cache_register(&tbl_data->matchers, &ctx);\n+\tentry = mlx5_list_register(&tbl_data->matchers, &ctx);\n \tif (!entry) {\n \t\tDRV_LOG(ERR, \"Failed to register meter drop matcher.\");\n \t\treturn -1;\n@@ -15835,7 +15830,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,\n \t\t\t\t\t\t     0, &error);\n \tuint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;\n \tuint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_list_entry *entry;\n \tstruct mlx5_flow_dv_matcher matcher = {\n \t\t.mask = {\n \t\t\t.size = sizeof(matcher.mask.buf) -\n@@ -15881,7 +15876,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,\n \t\t\tmatcher.crc = rte_raw_cksum\n \t\t\t\t\t((const void *)matcher.mask.buf,\n \t\t\t\t\tmatcher.mask.size);\n-\t\t\tentry = mlx5_cache_register(&tbl_data->matchers, &ctx);\n+\t\t\tentry = mlx5_list_register(&tbl_data->matchers, &ctx);\n \t\t\tif (!entry) {\n \t\t\t\tDRV_LOG(ERR, \"Failed to register meter \"\n \t\t\t\t\"drop default matcher.\");\n@@ -15918,7 +15913,7 @@ flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,\n \t\t\tmatcher.crc = rte_raw_cksum\n \t\t\t\t\t((const void *)matcher.mask.buf,\n \t\t\t\t\tmatcher.mask.size);\n-\t\t\tentry = mlx5_cache_register(&tbl_data->matchers, &ctx);\n+\t\t\tentry = mlx5_list_register(&tbl_data->matchers, &ctx);\n \t\t\tif (!entry) {\n \t\t\t\tDRV_LOG(ERR,\n \t\t\t\t\"Failed to register meter drop matcher.\");\n@@ -16104,7 +16099,6 @@ flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,\n \treturn NULL;\n }\n \n-\n /**\n  * Destroy the sub policy table with RX queue.\n  *\ndiff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h\nindex 1b264e5994..3dcc71d51d 100644\n--- a/drivers/net/mlx5/mlx5_rx.h\n+++ b/drivers/net/mlx5/mlx5_rx.h\n@@ -222,13 +222,13 @@ int mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,\n \t\t\t      struct mlx5_ind_table_obj *ind_tbl,\n \t\t\t      uint16_t *queues, const uint32_t queues_n,\n \t\t\t      bool standalone);\n-struct mlx5_cache_entry *mlx5_hrxq_create_cb(struct mlx5_cache_list *list,\n-\t\tstruct mlx5_cache_entry *entry __rte_unused, void *cb_ctx);\n-int mlx5_hrxq_match_cb(struct mlx5_cache_list *list,\n-\t\t       struct mlx5_cache_entry *entry,\n+struct mlx5_list_entry *mlx5_hrxq_create_cb(struct mlx5_list *list,\n+\t\tstruct mlx5_list_entry *entry __rte_unused, void *cb_ctx);\n+int mlx5_hrxq_match_cb(struct mlx5_list *list,\n+\t\t       struct mlx5_list_entry *entry,\n \t\t       void *cb_ctx);\n-void mlx5_hrxq_remove_cb(struct mlx5_cache_list *list,\n-\t\t\t struct mlx5_cache_entry *entry);\n+void mlx5_hrxq_remove_cb(struct mlx5_list *list,\n+\t\t\t struct mlx5_list_entry *entry);\n uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,\n \t\t       struct mlx5_flow_rss_desc *rss_desc);\n int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hxrq_idx);\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex bb9a908087..8395332507 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -2093,7 +2093,7 @@ mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,\n  * Match an Rx Hash queue.\n  *\n  * @param list\n- *   Cache list pointer.\n+ *   mlx5 list pointer.\n  * @param entry\n  *   Hash queue entry pointer.\n  * @param cb_ctx\n@@ -2103,8 +2103,8 @@ mlx5_ind_table_obj_modify(struct rte_eth_dev *dev,\n  *   0 if match, none zero if not match.\n  */\n int\n-mlx5_hrxq_match_cb(struct mlx5_cache_list *list,\n-\t\t   struct mlx5_cache_entry *entry,\n+mlx5_hrxq_match_cb(struct mlx5_list *list,\n+\t\t   struct mlx5_list_entry *entry,\n \t\t   void *cb_ctx)\n {\n \tstruct rte_eth_dev *dev = list->ctx;\n@@ -2242,13 +2242,13 @@ __mlx5_hrxq_remove(struct rte_eth_dev *dev, struct mlx5_hrxq *hrxq)\n  *   Index to Hash Rx queue to release.\n  *\n  * @param list\n- *   Cache list pointer.\n+ *   mlx5 list pointer.\n  * @param entry\n  *   Hash queue entry pointer.\n  */\n void\n-mlx5_hrxq_remove_cb(struct mlx5_cache_list *list,\n-\t\t    struct mlx5_cache_entry *entry)\n+mlx5_hrxq_remove_cb(struct mlx5_list *list,\n+\t\t    struct mlx5_list_entry *entry)\n {\n \tstruct rte_eth_dev *dev = list->ctx;\n \tstruct mlx5_hrxq *hrxq = container_of(entry, typeof(*hrxq), entry);\n@@ -2305,7 +2305,7 @@ __mlx5_hrxq_create(struct rte_eth_dev *dev,\n  * Create an Rx Hash queue.\n  *\n  * @param list\n- *   Cache list pointer.\n+ *   mlx5 list pointer.\n  * @param entry\n  *   Hash queue entry pointer.\n  * @param cb_ctx\n@@ -2314,9 +2314,9 @@ __mlx5_hrxq_create(struct rte_eth_dev *dev,\n  * @return\n  *   queue entry on success, NULL otherwise.\n  */\n-struct mlx5_cache_entry *\n-mlx5_hrxq_create_cb(struct mlx5_cache_list *list,\n-\t\t    struct mlx5_cache_entry *entry __rte_unused,\n+struct mlx5_list_entry *\n+mlx5_hrxq_create_cb(struct mlx5_list *list,\n+\t\t    struct mlx5_list_entry *entry __rte_unused,\n \t\t    void *cb_ctx)\n {\n \tstruct rte_eth_dev *dev = list->ctx;\n@@ -2344,7 +2344,7 @@ uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_hrxq *hrxq;\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_list_entry *entry;\n \tstruct mlx5_flow_cb_ctx ctx = {\n \t\t.data = rss_desc,\n \t};\n@@ -2352,7 +2352,7 @@ uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,\n \tif (rss_desc->shared_rss) {\n \t\thrxq = __mlx5_hrxq_create(dev, rss_desc);\n \t} else {\n-\t\tentry = mlx5_cache_register(&priv->hrxqs, &ctx);\n+\t\tentry = mlx5_list_register(&priv->hrxqs, &ctx);\n \t\tif (!entry)\n \t\t\treturn 0;\n \t\thrxq = container_of(entry, typeof(*hrxq), entry);\n@@ -2382,7 +2382,7 @@ int mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hrxq_idx)\n \tif (!hrxq)\n \t\treturn 0;\n \tif (!hrxq->standalone)\n-\t\treturn mlx5_cache_unregister(&priv->hrxqs, &hrxq->entry);\n+\t\treturn mlx5_list_unregister(&priv->hrxqs, &hrxq->entry);\n \t__mlx5_hrxq_remove(dev, hrxq);\n \treturn 0;\n }\n@@ -2470,7 +2470,7 @@ mlx5_hrxq_verify(struct rte_eth_dev *dev)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \n-\treturn mlx5_cache_list_get_entry_num(&priv->hrxqs);\n+\treturn mlx5_list_get_entry_num(&priv->hrxqs);\n }\n \n /**\ndiff --git a/drivers/net/mlx5/mlx5_utils.c b/drivers/net/mlx5/mlx5_utils.c\nindex f9557c09ff..4536ca807d 100644\n--- a/drivers/net/mlx5/mlx5_utils.c\n+++ b/drivers/net/mlx5/mlx5_utils.c\n@@ -9,29 +9,29 @@\n #include \"mlx5_utils.h\"\n \n \n-/********************* Cache list ************************/\n+/********************* MLX5 list ************************/\n \n-static struct mlx5_cache_entry *\n-mlx5_clist_default_create_cb(struct mlx5_cache_list *list,\n-\t\t\t     struct mlx5_cache_entry *entry __rte_unused,\n+static struct mlx5_list_entry *\n+mlx5_list_default_create_cb(struct mlx5_list *list,\n+\t\t\t     struct mlx5_list_entry *entry __rte_unused,\n \t\t\t     void *ctx __rte_unused)\n {\n \treturn mlx5_malloc(MLX5_MEM_ZERO, list->entry_sz, 0, SOCKET_ID_ANY);\n }\n \n static void\n-mlx5_clist_default_remove_cb(struct mlx5_cache_list *list __rte_unused,\n-\t\t\t     struct mlx5_cache_entry *entry)\n+mlx5_list_default_remove_cb(struct mlx5_list *list __rte_unused,\n+\t\t\t     struct mlx5_list_entry *entry)\n {\n \tmlx5_free(entry);\n }\n \n int\n-mlx5_cache_list_init(struct mlx5_cache_list *list, const char *name,\n+mlx5_list_create(struct mlx5_list *list, const char *name,\n \t\t     uint32_t entry_size, void *ctx,\n-\t\t     mlx5_cache_create_cb cb_create,\n-\t\t     mlx5_cache_match_cb cb_match,\n-\t\t     mlx5_cache_remove_cb cb_remove)\n+\t\t     mlx5_list_create_cb cb_create,\n+\t\t     mlx5_list_match_cb cb_match,\n+\t\t     mlx5_list_remove_cb cb_remove)\n {\n \tMLX5_ASSERT(list);\n \tif (!cb_match || (!cb_create ^ !cb_remove))\n@@ -40,19 +40,19 @@ mlx5_cache_list_init(struct mlx5_cache_list *list, const char *name,\n \t\tsnprintf(list->name, sizeof(list->name), \"%s\", name);\n \tlist->entry_sz = entry_size;\n \tlist->ctx = ctx;\n-\tlist->cb_create = cb_create ? cb_create : mlx5_clist_default_create_cb;\n+\tlist->cb_create = cb_create ? cb_create : mlx5_list_default_create_cb;\n \tlist->cb_match = cb_match;\n-\tlist->cb_remove = cb_remove ? cb_remove : mlx5_clist_default_remove_cb;\n+\tlist->cb_remove = cb_remove ? cb_remove : mlx5_list_default_remove_cb;\n \trte_rwlock_init(&list->lock);\n-\tDRV_LOG(DEBUG, \"Cache list %s initialized.\", list->name);\n+\tDRV_LOG(DEBUG, \"mlx5 list %s initialized.\", list->name);\n \tLIST_INIT(&list->head);\n \treturn 0;\n }\n \n-static struct mlx5_cache_entry *\n-__cache_lookup(struct mlx5_cache_list *list, void *ctx, bool reuse)\n+static struct mlx5_list_entry *\n+__list_lookup(struct mlx5_list *list, void *ctx, bool reuse)\n {\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_list_entry *entry;\n \n \tLIST_FOREACH(entry, &list->head, next) {\n \t\tif (list->cb_match(list, entry, ctx))\n@@ -60,7 +60,7 @@ __cache_lookup(struct mlx5_cache_list *list, void *ctx, bool reuse)\n \t\tif (reuse) {\n \t\t\t__atomic_add_fetch(&entry->ref_cnt, 1,\n \t\t\t\t\t   __ATOMIC_RELAXED);\n-\t\t\tDRV_LOG(DEBUG, \"Cache list %s entry %p ref++: %u.\",\n+\t\t\tDRV_LOG(DEBUG, \"mlx5 list %s entry %p ref++: %u.\",\n \t\t\t\tlist->name, (void *)entry, entry->ref_cnt);\n \t\t}\n \t\tbreak;\n@@ -68,33 +68,33 @@ __cache_lookup(struct mlx5_cache_list *list, void *ctx, bool reuse)\n \treturn entry;\n }\n \n-static struct mlx5_cache_entry *\n-cache_lookup(struct mlx5_cache_list *list, void *ctx, bool reuse)\n+static struct mlx5_list_entry *\n+list_lookup(struct mlx5_list *list, void *ctx, bool reuse)\n {\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_list_entry *entry;\n \n \trte_rwlock_read_lock(&list->lock);\n-\tentry = __cache_lookup(list, ctx, reuse);\n+\tentry = __list_lookup(list, ctx, reuse);\n \trte_rwlock_read_unlock(&list->lock);\n \treturn entry;\n }\n \n-struct mlx5_cache_entry *\n-mlx5_cache_lookup(struct mlx5_cache_list *list, void *ctx)\n+struct mlx5_list_entry *\n+mlx5_list_lookup(struct mlx5_list *list, void *ctx)\n {\n-\treturn cache_lookup(list, ctx, false);\n+\treturn list_lookup(list, ctx, false);\n }\n \n-struct mlx5_cache_entry *\n-mlx5_cache_register(struct mlx5_cache_list *list, void *ctx)\n+struct mlx5_list_entry *\n+mlx5_list_register(struct mlx5_list *list, void *ctx)\n {\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_list_entry *entry;\n \tuint32_t prev_gen_cnt = 0;\n \n \tMLX5_ASSERT(list);\n \tprev_gen_cnt = __atomic_load_n(&list->gen_cnt, __ATOMIC_ACQUIRE);\n \t/* Lookup with read lock, reuse if found. */\n-\tentry = cache_lookup(list, ctx, true);\n+\tentry = list_lookup(list, ctx, true);\n \tif (entry)\n \t\treturn entry;\n \t/* Not found, append with write lock - block read from other threads. */\n@@ -102,13 +102,13 @@ mlx5_cache_register(struct mlx5_cache_list *list, void *ctx)\n \t/* If list changed by other threads before lock, search again. */\n \tif (prev_gen_cnt != __atomic_load_n(&list->gen_cnt, __ATOMIC_ACQUIRE)) {\n \t\t/* Lookup and reuse w/o read lock. */\n-\t\tentry = __cache_lookup(list, ctx, true);\n+\t\tentry = __list_lookup(list, ctx, true);\n \t\tif (entry)\n \t\t\tgoto done;\n \t}\n \tentry = list->cb_create(list, entry, ctx);\n \tif (!entry) {\n-\t\tDRV_LOG(ERR, \"Failed to init cache list %s entry %p.\",\n+\t\tDRV_LOG(ERR, \"Failed to init mlx5 list %s entry %p.\",\n \t\t\tlist->name, (void *)entry);\n \t\tgoto done;\n \t}\n@@ -116,7 +116,7 @@ mlx5_cache_register(struct mlx5_cache_list *list, void *ctx)\n \tLIST_INSERT_HEAD(&list->head, entry, next);\n \t__atomic_add_fetch(&list->gen_cnt, 1, __ATOMIC_RELEASE);\n \t__atomic_add_fetch(&list->count, 1, __ATOMIC_ACQUIRE);\n-\tDRV_LOG(DEBUG, \"Cache list %s entry %p new: %u.\",\n+\tDRV_LOG(DEBUG, \"mlx5 list %s entry %p new: %u.\",\n \t\tlist->name, (void *)entry, entry->ref_cnt);\n done:\n \trte_rwlock_write_unlock(&list->lock);\n@@ -124,12 +124,12 @@ mlx5_cache_register(struct mlx5_cache_list *list, void *ctx)\n }\n \n int\n-mlx5_cache_unregister(struct mlx5_cache_list *list,\n-\t\t      struct mlx5_cache_entry *entry)\n+mlx5_list_unregister(struct mlx5_list *list,\n+\t\t      struct mlx5_list_entry *entry)\n {\n \trte_rwlock_write_lock(&list->lock);\n \tMLX5_ASSERT(entry && entry->next.le_prev);\n-\tDRV_LOG(DEBUG, \"Cache list %s entry %p ref--: %u.\",\n+\tDRV_LOG(DEBUG, \"mlx5 list %s entry %p ref--: %u.\",\n \t\tlist->name, (void *)entry, entry->ref_cnt);\n \tif (--entry->ref_cnt) {\n \t\trte_rwlock_write_unlock(&list->lock);\n@@ -140,15 +140,15 @@ mlx5_cache_unregister(struct mlx5_cache_list *list,\n \tLIST_REMOVE(entry, next);\n \tlist->cb_remove(list, entry);\n \trte_rwlock_write_unlock(&list->lock);\n-\tDRV_LOG(DEBUG, \"Cache list %s entry %p removed.\",\n+\tDRV_LOG(DEBUG, \"mlx5 list %s entry %p removed.\",\n \t\tlist->name, (void *)entry);\n \treturn 0;\n }\n \n void\n-mlx5_cache_list_destroy(struct mlx5_cache_list *list)\n+mlx5_list_destroy(struct mlx5_list *list)\n {\n-\tstruct mlx5_cache_entry *entry;\n+\tstruct mlx5_list_entry *entry;\n \n \tMLX5_ASSERT(list);\n \t/* no LIST_FOREACH_SAFE, using while instead */\n@@ -156,14 +156,14 @@ mlx5_cache_list_destroy(struct mlx5_cache_list *list)\n \t\tentry = LIST_FIRST(&list->head);\n \t\tLIST_REMOVE(entry, next);\n \t\tlist->cb_remove(list, entry);\n-\t\tDRV_LOG(DEBUG, \"Cache list %s entry %p destroyed.\",\n+\t\tDRV_LOG(DEBUG, \"mlx5 list %s entry %p destroyed.\",\n \t\t\tlist->name, (void *)entry);\n \t}\n \tmemset(list, 0, sizeof(*list));\n }\n \n uint32_t\n-mlx5_cache_list_get_entry_num(struct mlx5_cache_list *list)\n+mlx5_list_get_entry_num(struct mlx5_list *list)\n {\n \tMLX5_ASSERT(list);\n \treturn __atomic_load_n(&list->count, __ATOMIC_RELAXED);\ndiff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h\nindex a509b0a4eb..cfb3cb6180 100644\n--- a/drivers/net/mlx5/mlx5_utils.h\n+++ b/drivers/net/mlx5/mlx5_utils.h\n@@ -297,19 +297,19 @@ log2above(unsigned int v)\n \treturn l + r;\n }\n \n-/************************ cache list *****************************/\n+/************************ mlx5 list *****************************/\n \n /** Maximum size of string for naming. */\n #define MLX5_NAME_SIZE\t\t\t32\n \n-struct mlx5_cache_list;\n+struct mlx5_list;\n \n /**\n- * Structure of the entry in the cache list, user should define its own struct\n+ * Structure of the entry in the mlx5 list, user should define its own struct\n  * that contains this in order to store the data.\n  */\n-struct mlx5_cache_entry {\n-\tLIST_ENTRY(mlx5_cache_entry) next; /* Entry pointers in the list. */\n+struct mlx5_list_entry {\n+\tLIST_ENTRY(mlx5_list_entry) next; /* Entry pointers in the list. */\n \tuint32_t ref_cnt; /* Reference count. */\n };\n \n@@ -317,18 +317,18 @@ struct mlx5_cache_entry {\n  * Type of callback function for entry removal.\n  *\n  * @param list\n- *   The cache list.\n+ *   The mlx5 list.\n  * @param entry\n  *   The entry in the list.\n  */\n-typedef void (*mlx5_cache_remove_cb)(struct mlx5_cache_list *list,\n-\t\t\t\t     struct mlx5_cache_entry *entry);\n+typedef void (*mlx5_list_remove_cb)(struct mlx5_list *list,\n+\t\t\t\t     struct mlx5_list_entry *entry);\n \n /**\n  * Type of function for user defined matching.\n  *\n  * @param list\n- *   The cache list.\n+ *   The mlx5 list.\n  * @param entry\n  *   The entry in the list.\n  * @param ctx\n@@ -337,14 +337,14 @@ typedef void (*mlx5_cache_remove_cb)(struct mlx5_cache_list *list,\n  * @return\n  *   0 if matching, non-zero number otherwise.\n  */\n-typedef int (*mlx5_cache_match_cb)(struct mlx5_cache_list *list,\n-\t\t\t\t   struct mlx5_cache_entry *entry, void *ctx);\n+typedef int (*mlx5_list_match_cb)(struct mlx5_list *list,\n+\t\t\t\t   struct mlx5_list_entry *entry, void *ctx);\n \n /**\n- * Type of function for user defined cache list entry creation.\n+ * Type of function for user defined mlx5 list entry creation.\n  *\n  * @param list\n- *   The cache list.\n+ *   The mlx5 list.\n  * @param entry\n  *   The new allocated entry, NULL if list entry size unspecified,\n  *   New entry has to be allocated in callback and return.\n@@ -354,46 +354,46 @@ typedef int (*mlx5_cache_match_cb)(struct mlx5_cache_list *list,\n  * @return\n  *   Pointer of entry on success, NULL otherwise.\n  */\n-typedef struct mlx5_cache_entry *(*mlx5_cache_create_cb)\n-\t\t\t\t (struct mlx5_cache_list *list,\n-\t\t\t\t  struct mlx5_cache_entry *entry,\n+typedef struct mlx5_list_entry *(*mlx5_list_create_cb)\n+\t\t\t\t (struct mlx5_list *list,\n+\t\t\t\t  struct mlx5_list_entry *entry,\n \t\t\t\t  void *ctx);\n \n /**\n- * Linked cache list structure.\n+ * Linked mlx5 list structure.\n  *\n- * Entry in cache list could be reused if entry already exists,\n+ * Entry in mlx5 list could be reused if entry already exists,\n  * reference count will increase and the existing entry returns.\n  *\n  * When destroy an entry from list, decrease reference count and only\n  * destroy when no further reference.\n  *\n- * Linked list cache is designed for limited number of entries cache,\n+ * Linked list is designed for limited number of entries,\n  * read mostly, less modification.\n  *\n- * For huge amount of entries cache, please consider hash list cache.\n+ * For huge amount of entries, please consider hash list.\n  *\n  */\n-struct mlx5_cache_list {\n-\tchar name[MLX5_NAME_SIZE]; /**< Name of the cache list. */\n+struct mlx5_list {\n+\tchar name[MLX5_NAME_SIZE]; /**< Name of the mlx5 list. */\n \tuint32_t entry_sz; /**< Entry size, 0: use create callback. */\n \trte_rwlock_t lock; /* read/write lock. */\n \tuint32_t gen_cnt; /* List modification will update generation count. */\n \tuint32_t count; /* number of entries in list. */\n \tvoid *ctx; /* user objects target to callback. */\n-\tmlx5_cache_create_cb cb_create; /**< entry create callback. */\n-\tmlx5_cache_match_cb cb_match; /**< entry match callback. */\n-\tmlx5_cache_remove_cb cb_remove; /**< entry remove callback. */\n-\tLIST_HEAD(mlx5_cache_head, mlx5_cache_entry) head;\n+\tmlx5_list_create_cb cb_create; /**< entry create callback. */\n+\tmlx5_list_match_cb cb_match; /**< entry match callback. */\n+\tmlx5_list_remove_cb cb_remove; /**< entry remove callback. */\n+\tLIST_HEAD(mlx5_list_head, mlx5_list_entry) head;\n };\n \n /**\n- * Initialize a cache list.\n+ * Create a mlx5 list.\n  *\n  * @param list\n  *   Pointer to the hast list table.\n  * @param name\n- *   Name of the cache list.\n+ *   Name of the mlx5 list.\n  * @param entry_size\n  *   Entry size to allocate, 0 to allocate by creation callback.\n  * @param ctx\n@@ -407,11 +407,11 @@ struct mlx5_cache_list {\n  * @return\n  *   0 on success, otherwise failure.\n  */\n-int mlx5_cache_list_init(struct mlx5_cache_list *list,\n+int mlx5_list_create(struct mlx5_list *list,\n \t\t\t const char *name, uint32_t entry_size, void *ctx,\n-\t\t\t mlx5_cache_create_cb cb_create,\n-\t\t\t mlx5_cache_match_cb cb_match,\n-\t\t\t mlx5_cache_remove_cb cb_remove);\n+\t\t\t mlx5_list_create_cb cb_create,\n+\t\t\t mlx5_list_match_cb cb_match,\n+\t\t\t mlx5_list_remove_cb cb_remove);\n \n /**\n  * Search an entry matching the key.\n@@ -420,18 +420,18 @@ int mlx5_cache_list_init(struct mlx5_cache_list *list,\n  * this function only in main thread.\n  *\n  * @param list\n- *   Pointer to the cache list.\n+ *   Pointer to the mlx5 list.\n  * @param ctx\n  *   Common context parameter used by entry callback function.\n  *\n  * @return\n- *   Pointer of the cache entry if found, NULL otherwise.\n+ *   Pointer of the list entry if found, NULL otherwise.\n  */\n-struct mlx5_cache_entry *mlx5_cache_lookup(struct mlx5_cache_list *list,\n+struct mlx5_list_entry *mlx5_list_lookup(struct mlx5_list *list,\n \t\t\t\t\t   void *ctx);\n \n /**\n- * Reuse or create an entry to the cache list.\n+ * Reuse or create an entry to the mlx5 list.\n  *\n  * @param list\n  *   Pointer to the hast list table.\n@@ -441,42 +441,42 @@ struct mlx5_cache_entry *mlx5_cache_lookup(struct mlx5_cache_list *list,\n  * @return\n  *   registered entry on success, NULL otherwise\n  */\n-struct mlx5_cache_entry *mlx5_cache_register(struct mlx5_cache_list *list,\n+struct mlx5_list_entry *mlx5_list_register(struct mlx5_list *list,\n \t\t\t\t\t     void *ctx);\n \n /**\n- * Remove an entry from the cache list.\n+ * Remove an entry from the mlx5 list.\n  *\n  * User should guarantee the validity of the entry.\n  *\n  * @param list\n  *   Pointer to the hast list.\n  * @param entry\n- *   Entry to be removed from the cache list table.\n+ *   Entry to be removed from the mlx5 list table.\n  * @return\n  *   0 on entry removed, 1 on entry still referenced.\n  */\n-int mlx5_cache_unregister(struct mlx5_cache_list *list,\n-\t\t\t  struct mlx5_cache_entry *entry);\n+int mlx5_list_unregister(struct mlx5_list *list,\n+\t\t\t  struct mlx5_list_entry *entry);\n \n /**\n- * Destroy the cache list.\n+ * Destroy the mlx5 list.\n  *\n  * @param list\n- *   Pointer to the cache list.\n+ *   Pointer to the mlx5 list.\n  */\n-void mlx5_cache_list_destroy(struct mlx5_cache_list *list);\n+void mlx5_list_destroy(struct mlx5_list *list);\n \n /**\n- * Get entry number from the cache list.\n+ * Get entry number from the mlx5 list.\n  *\n  * @param list\n  *   Pointer to the hast list.\n  * @return\n- *   Cache list entry number.\n+ *   mlx5 list entry number.\n  */\n uint32_t\n-mlx5_cache_list_get_entry_num(struct mlx5_cache_list *list);\n+mlx5_list_get_entry_num(struct mlx5_list *list);\n \n /********************************* indexed pool *************************/\n \ndiff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nindex 17716b66c9..bcf72dc6db 100644\n--- a/drivers/net/mlx5/windows/mlx5_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -610,10 +610,9 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\terr = ENOTSUP;\n \t\t\tgoto error;\n \t}\n-\tmlx5_cache_list_init(&priv->hrxqs, \"hrxq\", 0, eth_dev,\n-\t\t\t     mlx5_hrxq_create_cb,\n-\t\t\t     mlx5_hrxq_match_cb,\n-\t\t\t     mlx5_hrxq_remove_cb);\n+\tmlx5_list_create(&priv->hrxqs, \"hrxq\", 0, eth_dev,\n+\t\tmlx5_hrxq_create_cb, mlx5_hrxq_match_cb,\n+\t\tmlx5_hrxq_remove_cb);\n \t/* Query availability of metadata reg_c's. */\n \terr = mlx5_flow_discover_mreg_c(eth_dev);\n \tif (err < 0) {\n",
    "prefixes": [
        "v4",
        "07/26"
    ]
}