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GET /api/patches/95180/?format=api
{ "id": 95180, "url": "https://patches.dpdk.org/api/patches/95180/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/3b4a9e1bef1e4465f59ed785e6f25a19a40acdd6.1625213344.git.jackmin@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<3b4a9e1bef1e4465f59ed785e6f25a19a40acdd6.1625213344.git.jackmin@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/3b4a9e1bef1e4465f59ed785e6f25a19a40acdd6.1625213344.git.jackmin@nvidia.com", "date": "2021-07-02T08:34:46", "name": "[1/3] net/mlx5: fix MPLS over IP", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "9cf24f23533671bb3eb2713eeaf0f8db410e2a7f", "submitter": { "id": 1971, "url": "https://patches.dpdk.org/api/people/1971/?format=api", "name": "Jack Min", "email": "jackmin@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/3b4a9e1bef1e4465f59ed785e6f25a19a40acdd6.1625213344.git.jackmin@nvidia.com/mbox/", "series": [ { "id": 17589, "url": "https://patches.dpdk.org/api/series/17589/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17589", "date": "2021-07-02T08:34:45", "name": "MPLS RSS fixs", "version": 1, "mbox": "https://patches.dpdk.org/series/17589/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/95180/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/95180/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DE637A0A0F;\n\tFri, 2 Jul 2021 10:35:15 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9618C41353;\n\tFri, 2 Jul 2021 10:35:14 +0200 (CEST)", "from NAM04-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam08on2082.outbound.protection.outlook.com [40.107.102.82])\n by mails.dpdk.org (Postfix) with ESMTP id A76FC41352;\n Fri, 2 Jul 2021 10:35:12 +0200 (CEST)", "from DM6PR04CA0007.namprd04.prod.outlook.com (2603:10b6:5:334::12)\n by BN9PR12MB5052.namprd12.prod.outlook.com (2603:10b6:408:135::19) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4264.23; 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dpdk.org; dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Xiaoyu Min <jackmin@nvidia.com>", "To": "Matan Azrad <matan@nvidia.com>, Shahaf Shuler <shahafs@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Dekel Peled\n <dekelp@mellanox.com>", "CC": "<dev@dpdk.org>, <stable@dpdk.org>", "Date": "Fri, 2 Jul 2021 16:34:46 +0800", "Message-ID": "\n <3b4a9e1bef1e4465f59ed785e6f25a19a40acdd6.1625213344.git.jackmin@nvidia.com>", "X-Mailer": "git-send-email 2.32.0", "In-Reply-To": "<cover.1625213344.git.jackmin@nvidia.com>", "References": "<cover.1625213344.git.jackmin@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "3124e52e-29e6-4df6-6b02-08d93d344e1b", "X-MS-TrafficTypeDiagnostic": "BN9PR12MB5052:", "X-Microsoft-Antispam-PRVS": "\n <BN9PR12MB50523722980A5457E62692A4C11F9@BN9PR12MB5052.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:3513;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n GJ14FiOANFcjJyp16fClWcWGL8DwdbBqQz4RrEgsK68et9K6wqc9WU8yymq0qEZuZvCfvgX67eC734/326uBe/9hs/7Frhn1faU02c21pUL/LGSwtJ6TVMSy0sSXZ/N5Y+5ni/LirroXznSN0Yt4ywmVCromHqmVS3JT0DgzEyi4LGR/k9SXZem0t+5MhZ/yP10XKMEOdlfDkb5Z0/VX2WXNRyDCVaBwjpx+09EeqXF4tsFWs7JSelNsmuGOfONrrMMnE+6+Oaxo+4GYyD0of6ksAcctFMkPUZsXkFhGacl3dtlt0zPxTFXfJ3TRfKeU6eyo1cW6dKRHuVg6KCCIP7jyY75h26rsf+BMgZlFaRpXJgJivm7oGX6OshI0Ny6v6LsAAhfNnQaThXBVem7wXboDH7+i0l8UGVxvn7XjWVi1scZp8AY8LgqkVj3QL4hZqhkQmvYxp0XWcqCg8tMpXImGnsuUUYDdTCdZS/4O/dmzjccbiKPCnyAJvx/aK65wKqzLJ80l7WloGNp/l270ZGDNq+6Ru8Zv34sPpWLXfDFrRdSHP0P0HdcRXxVWb8YAcW4NVxvRm0+zWsms8rWJP5bY5qn+mdboChNEoPiQCHwnWajuPUH4LFDW70+RJ4NQiWE13cw3CjvjcKjo3Fx652fYyIM/ZoxWEO8a7yULEyCnt6aK/+UfgEnurd+R0xLapbf7oxcg7mGzPUsZrVBIHw==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(376002)(346002)(136003)(39860400002)(396003)(46966006)(36840700001)(47076005)(36860700001)(478600001)(450100002)(5660300002)(82310400003)(26005)(6666004)(83380400001)(86362001)(8676002)(2616005)(336012)(316002)(4326008)(426003)(2906002)(110136005)(8936002)(82740400003)(356005)(7636003)(7696005)(70206006)(186003)(70586007)(54906003)(55016002)(6286002)(36756003)(16526019)(36906005);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "02 Jul 2021 08:35:10.6539 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 3124e52e-29e6-4df6-6b02-08d93d344e1b", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT030.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN9PR12MB5052", "Subject": "[dpdk-dev] [PATCH 1/3] net/mlx5: fix MPLS over IP", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "HW doesn't support match MPLS over IP traffic.\n\nRemove related code.\n\nFixes: d1abe664ddde (\"net/mlx5: add MPLS to Direct Verbs flow engine\")\nCc: stable@dpdk.org\n\nSigned-off-by: Xiaoyu Min <jackmin@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow.c | 5 ++---\n drivers/net/mlx5/mlx5_flow_dv.c | 3 ---\n 2 files changed, 2 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex 3b7c94d92f..21032a29a3 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -2920,9 +2920,8 @@ mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,\n \t\t\t\t\t \"MPLS not supported or\"\n \t\t\t\t\t \" disabled in firmware\"\n \t\t\t\t\t \" configuration.\");\n-\t/* MPLS over IP, UDP, GRE is allowed */\n-\tif (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |\n-\t\t\t MLX5_FLOW_LAYER_OUTER_L4_UDP |\n+\t/* MPLS over UDP, GRE is allowed */\n+\tif (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |\n \t\t\t MLX5_FLOW_LAYER_GRE |\n \t\t\t MLX5_FLOW_LAYER_GRE_KEY)))\n \t\treturn rte_flow_error_set(error, EINVAL,\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex a04a3c2bb8..86ba9ffde3 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -9032,9 +9032,6 @@ flow_dv_translate_item_mpls(void *matcher, void *key,\n \t\t\t RTE_ETHER_TYPE_MPLS);\n \t\tbreak;\n \tdefault:\n-\t\tMLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);\n-\t\tMLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,\n-\t\t\t IPPROTO_MPLS);\n \t\tbreak;\n \t}\n \tif (!in_mpls_v)\n", "prefixes": [ "1/3" ] }