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GET /api/patches/95055/?format=api
{ "id": 95055, "url": "https://patches.dpdk.org/api/patches/95055/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210630124609.8711-2-suanmingm@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210630124609.8711-2-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210630124609.8711-2-suanmingm@nvidia.com", "date": "2021-06-30T12:45:48", "name": "[v2,01/22] net/mlx5: allow limiting the index pool maximum index", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5e33fe43fefdb55528c523591e2d2b0cc2cf6778", "submitter": { "id": 1887, "url": "https://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210630124609.8711-2-suanmingm@nvidia.com/mbox/", "series": [ { "id": 17549, "url": "https://patches.dpdk.org/api/series/17549/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17549", "date": "2021-06-30T12:45:47", "name": "net/mlx5: insertion rate optimization", "version": 2, "mbox": "https://patches.dpdk.org/series/17549/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/95055/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/95055/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9A87BA0A0F;\n\tWed, 30 Jun 2021 14:46:38 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BE6AB4126A;\n\tWed, 30 Jun 2021 14:46:33 +0200 (CEST)", "from NAM12-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam12on2070.outbound.protection.outlook.com [40.107.244.70])\n by mails.dpdk.org (Postfix) with ESMTP id A49CB40040\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>", "CC": "<rasland@nvidia.com>, <orika@nvidia.com>, <dev@dpdk.org>", "Date": "Wed, 30 Jun 2021 15:45:48 +0300", "Message-ID": "<20210630124609.8711-2-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20210630124609.8711-1-suanmingm@nvidia.com>", "References": "<20210527093403.1153127-1-suanmingm@nvidia.com>\n <20210630124609.8711-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "597f1ca6-3a44-4642-3fb0-08d93bc51575", "X-MS-TrafficTypeDiagnostic": "BN7PR12MB2740:", "X-Microsoft-Antispam-PRVS": "\n <BN7PR12MB27400E2C0104A36548494192C1019@BN7PR12MB2740.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:6430;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n tGsW3V27SgQDsb53M+c91WyneKxJnlfJx2UtY9md3lQG1arO1UvfGhUbxQhmpRGXnX8p2jKIoPorlZMrTbJil6aca5OG6tQ8jvzNLkWy1gz4u6ETyj2Wr6SEWoNcNEiTgIPmrveAe4L6cRmj3pRZY7ypCsbNMcgonj3jQV8hEEX2qbl2a5BXO0em/bG8K6N9AsPjCt/twVhhBfEps/fH9xmi6vCMcWn9vcwkqwvXrGpg5GEosee+58SaLo5SdU+Yf4FEIOTZLyGKkgDhhZdG/K42ARjAumZlmj8/CZYux5xR/cSYWzDyVP/4faGH7OYg9yALOL8G6AGbhO6S7yqTdjcQ3AWVJpk9ivyRTli0Xs8fviYNHg8lpq/88N63XXCyBeJ4zhxrB/bvoQ0uBxpCqvrGN4WGdCNEqnA34KOtUsNefl6sgXEHPCzzfgZEvzsj4EIGQU8SMV2EHCND+naX2eqyefCst3aA6rBFocc7JvOIA7+yxppf8eVfq9Zjp8B6UaxR7WGy0dV4K/aTNR19ykTV4692aMCja87KZ8RJ6rDstwPC5bQmFkY2kAEwXwYQRS3XUNy/s7NO1+kNeXWahd2vh0f+ec1q1TUdhT0IQDOw/jg1WJCh1XP6NCZAhFOJUIyRpBB7nARKUqYPB/jjh6pI/LjNOTMV0NOLXQ9tfRJNSSzmy51sTa3RJMXMTgYh/GDagK3tjKcARLWc+tg6tQ==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(136003)(39860400002)(396003)(346002)(376002)(46966006)(36840700001)(26005)(356005)(55016002)(426003)(36756003)(186003)(16526019)(83380400001)(2616005)(6636002)(6286002)(6666004)(5660300002)(336012)(7696005)(54906003)(36860700001)(1076003)(70586007)(70206006)(8676002)(47076005)(7636003)(478600001)(86362001)(110136005)(2906002)(4326008)(316002)(8936002)(82740400003)(82310400003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Jun 2021 12:46:30.2458 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 597f1ca6-3a44-4642-3fb0-08d93bc51575", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT042.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN7PR12MB2740", "Subject": "[dpdk-dev] [PATCH v2 01/22] net/mlx5: allow limiting the index pool\n maximum index", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Some ipool instances in the driver are used as ID\\index allocator and\nadded other logic in order to work with limited index values.\n\nAdd a new configuration for ipool specify the maximum index value.\nThe ipool will ensure that no index bigger than the maximum value is\nprovided.\n\nUse this configuration in ID allocator cases instead of the current\nlogics. This patch add the maximum ID configurable for the index pool.\n\nSigned-off-by: Suanming Mou <suanmingm@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5_utils.c | 14 ++++++++++++--\n drivers/net/mlx5/mlx5_utils.h | 1 +\n 2 files changed, 13 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_utils.c b/drivers/net/mlx5/mlx5_utils.c\nindex 18fe23e4fb..bf2b2ebc72 100644\n--- a/drivers/net/mlx5/mlx5_utils.c\n+++ b/drivers/net/mlx5/mlx5_utils.c\n@@ -270,6 +270,9 @@ mlx5_ipool_create(struct mlx5_indexed_pool_config *cfg)\n \t\tif (i > 0)\n \t\t\tpool->grow_tbl[i] += pool->grow_tbl[i - 1];\n \t}\n+\tif (!pool->cfg.max_idx)\n+\t\tpool->cfg.max_idx =\n+\t\t\tmlx5_trunk_idx_offset_get(pool, TRUNK_MAX_IDX + 1);\n \treturn pool;\n }\n \n@@ -282,9 +285,11 @@ mlx5_ipool_grow(struct mlx5_indexed_pool *pool)\n \tsize_t trunk_size = 0;\n \tsize_t data_size;\n \tsize_t bmp_size;\n-\tuint32_t idx;\n+\tuint32_t idx, cur_max_idx, i;\n \n-\tif (pool->n_trunk_valid == TRUNK_MAX_IDX)\n+\tcur_max_idx = mlx5_trunk_idx_offset_get(pool, pool->n_trunk_valid);\n+\tif (pool->n_trunk_valid == TRUNK_MAX_IDX ||\n+\t cur_max_idx >= pool->cfg.max_idx)\n \t\treturn -ENOMEM;\n \tif (pool->n_trunk_valid == pool->n_trunk) {\n \t\t/* No free trunk flags, expand trunk list. */\n@@ -336,6 +341,11 @@ mlx5_ipool_grow(struct mlx5_indexed_pool *pool)\n \ttrunk->bmp = rte_bitmap_init_with_all_set(data_size, &trunk->data\n \t\t [RTE_CACHE_LINE_ROUNDUP(data_size * pool->cfg.size)],\n \t\t bmp_size);\n+\t/* Clear the overhead bits in the trunk if it happens. */\n+\tif (cur_max_idx + data_size > pool->cfg.max_idx) {\n+\t\tfor (i = pool->cfg.max_idx - cur_max_idx; i < data_size; i++)\n+\t\t\trte_bitmap_clear(trunk->bmp, i);\n+\t}\n \tMLX5_ASSERT(trunk->bmp);\n \tpool->n_trunk_valid++;\n #ifdef POOL_DEBUG\ndiff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h\nindex b54517c6df..15870e14c2 100644\n--- a/drivers/net/mlx5/mlx5_utils.h\n+++ b/drivers/net/mlx5/mlx5_utils.h\n@@ -208,6 +208,7 @@ struct mlx5_indexed_pool_config {\n \tuint32_t need_lock:1;\n \t/* Lock is needed for multiple thread usage. */\n \tuint32_t release_mem_en:1; /* Rlease trunk when it is free. */\n+\tuint32_t max_idx; /* The maximum index can be allocated. */\n \tconst char *type; /* Memory allocate type name. */\n \tvoid *(*malloc)(uint32_t flags, size_t size, unsigned int align,\n \t\t\tint socket);\n", "prefixes": [ "v2", "01/22" ] }