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GET /api/patches/94911/?format=api
{ "id": 94911, "url": "https://patches.dpdk.org/api/patches/94911/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210628163434.77741-4-arkadiuszx.kusztal@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210628163434.77741-4-arkadiuszx.kusztal@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210628163434.77741-4-arkadiuszx.kusztal@intel.com", "date": "2021-06-28T16:34:21", "name": "[v2,03/16] crypto/qat: enable gen4 legacy algorithms", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "61ca7c69c8281739b4f188361a9579d684cc86cb", "submitter": { "id": 452, "url": "https://patches.dpdk.org/api/people/452/?format=api", "name": "Arkadiusz Kusztal", "email": "arkadiuszx.kusztal@intel.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210628163434.77741-4-arkadiuszx.kusztal@intel.com/mbox/", "series": [ { "id": 17505, "url": "https://patches.dpdk.org/api/series/17505/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17505", "date": "2021-06-28T16:34:18", "name": "Add support for fourth generation of Intel QuickAssist Technology devices", "version": 2, "mbox": "https://patches.dpdk.org/series/17505/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94911/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/94911/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 14EC9A0A0C;\n\tMon, 28 Jun 2021 18:35:00 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BD93F41165;\n\tMon, 28 Jun 2021 18:34:43 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by mails.dpdk.org (Postfix) with ESMTP id 152AB41148\n for <dev@dpdk.org>; Mon, 28 Jun 2021 18:34:38 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 28 Jun 2021 09:34:37 -0700", "from silpixa00399302.ir.intel.com ([10.237.214.136])\n by fmsmga008.fm.intel.com with ESMTP; 28 Jun 2021 09:34:32 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10029\"; a=\"206165855\"", "E=Sophos;i=\"5.83,306,1616482800\"; d=\"scan'208\";a=\"206165855\"", "E=Sophos;i=\"5.83,306,1616482800\"; d=\"scan'208\";a=\"456395545\"" ], "X-ExtLoop1": "1", "From": "Arek Kusztal <arkadiuszx.kusztal@intel.com>", "To": "dev@dpdk.org", "Cc": "gakhil@marvell.com, fiona.trahe@intel.com, roy.fan.zhang@intel.com,\n Arek Kusztal <arkadiuszx.kusztal@intel.com>", "Date": "Mon, 28 Jun 2021 17:34:21 +0100", "Message-Id": "<20210628163434.77741-4-arkadiuszx.kusztal@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20210628163434.77741-1-arkadiuszx.kusztal@intel.com>", "References": "<20210628163434.77741-1-arkadiuszx.kusztal@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 03/16] crypto/qat: enable gen4 legacy\n algorithms", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This commit enables algorithms labeled as 'legacy'\non QAT generation 4 devices.\nFollowing algorithms were enabled:\n* AES-CBC\n* AES-CMAC\n* AES-XCBC MAC\n* NULL (auth, cipher)\n* SHA1-HMAC\n* SHA2-HMAC (224, 256, 384, 512)\n\nSigned-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>\n---\n drivers/crypto/qat/qat_sym_capabilities.h | 337 ++++++++++++++++++++++\n drivers/crypto/qat/qat_sym_pmd.c | 9 +-\n 2 files changed, 344 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/crypto/qat/qat_sym_capabilities.h b/drivers/crypto/qat/qat_sym_capabilities.h\nindex f7cab2f471..21c817bccc 100644\n--- a/drivers/crypto/qat/qat_sym_capabilities.h\n+++ b/drivers/crypto/qat/qat_sym_capabilities.h\n@@ -731,6 +731,343 @@\n \t\t}, }\t\t\t\t\t\t\t\\\n \t}\n \n+#define QAT_BASE_GEN4_SYM_CAPABILITIES\t\t\t\t\t\\\n+\t{\t/* AES CBC */\t\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\t\\\n+\t\t\t{.cipher = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CBC,\t\\\n+\t\t\t\t.block_size = 16,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 16,\t\t\t\\\n+\t\t\t\t\t.max = 32,\t\t\t\\\n+\t\t\t\t\t.increment = 8\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 16,\t\t\t\\\n+\t\t\t\t\t.max = 16,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t}\t\t\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA1 HMAC */\t\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA1_HMAC,\t\\\n+\t\t\t\t.block_size = 64,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 64,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 20,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA224 HMAC */\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA224_HMAC,\t\\\n+\t\t\t\t.block_size = 64,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 64,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 28,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA256 HMAC */\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA256_HMAC,\t\\\n+\t\t\t\t.block_size = 64,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 64,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 32,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA384 HMAC */\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA384_HMAC,\t\\\n+\t\t\t\t.block_size = 128,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 128,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 48,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA512 HMAC */\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA512_HMAC,\t\\\n+\t\t\t\t.block_size = 128,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 128,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 64,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* AES XCBC MAC */\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,\t\\\n+\t\t\t\t.block_size = 16,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 16,\t\t\t\\\n+\t\t\t\t\t.max = 16,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 12,\t\t\t\\\n+\t\t\t\t\t.max = 12,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.aad_size = { 0 },\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* AES CMAC */\t\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_AES_CMAC,\t\\\n+\t\t\t\t.block_size = 16,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 16,\t\t\t\\\n+\t\t\t\t\t.max = 16,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 4,\t\t\t\\\n+\t\t\t\t\t.max = 16,\t\t\t\\\n+\t\t\t\t\t.increment = 4\t\t\t\\\n+\t\t\t\t}\t\t\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* AES DOCSIS BPI */\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\t\\\n+\t\t\t{.cipher = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_DOCSISBPI,\\\n+\t\t\t\t.block_size = 16,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 16,\t\t\t\\\n+\t\t\t\t\t.max = 32,\t\t\t\\\n+\t\t\t\t\t.increment = 16\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 16,\t\t\t\\\n+\t\t\t\t\t.max = 16,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t}\t\t\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* NULL (AUTH) */\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_NULL,\t\t\\\n+\t\t\t\t.block_size = 1,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, },\t\t\t\t\t\t\\\n+\t\t}, },\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* NULL (CIPHER) */\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\t\\\n+\t\t\t{.cipher = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_CIPHER_NULL,\t\t\\\n+\t\t\t\t.block_size = 1,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t}\t\t\t\t\t\\\n+\t\t\t}, },\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA1 */\t\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA1,\t\t\\\n+\t\t\t\t.block_size = 64,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 20,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA224 */\t\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA224,\t\t\\\n+\t\t\t\t.block_size = 64,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 28,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA256 */\t\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA256,\t\t\\\n+\t\t\t\t.block_size = 64,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 32,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA384 */\t\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA384,\t\t\\\n+\t\t\t\t.block_size = 128,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 48,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t},\t\t\t\t\t\t\t\t\\\n+\t{\t/* SHA512 */\t\t\t\t\t\t\\\n+\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\t\t\t\\\n+\t\t{.sym = {\t\t\t\t\t\t\\\n+\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\t\\\n+\t\t\t{.auth = {\t\t\t\t\t\\\n+\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA512,\t\t\\\n+\t\t\t\t.block_size = 128,\t\t\t\\\n+\t\t\t\t.key_size = {\t\t\t\t\\\n+\t\t\t\t\t.min = 0,\t\t\t\\\n+\t\t\t\t\t.max = 0,\t\t\t\\\n+\t\t\t\t\t.increment = 0\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.digest_size = {\t\t\t\\\n+\t\t\t\t\t.min = 1,\t\t\t\\\n+\t\t\t\t\t.max = 64,\t\t\t\\\n+\t\t\t\t\t.increment = 1\t\t\t\\\n+\t\t\t\t},\t\t\t\t\t\\\n+\t\t\t\t.iv_size = { 0 }\t\t\t\\\n+\t\t\t}, }\t\t\t\t\t\t\\\n+\t\t}, }\t\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\n+\n+\n #ifdef RTE_LIB_SECURITY\n #define QAT_SECURITY_SYM_CAPABILITIES\t\t\t\t\t\\\n \t{\t/* AES DOCSIS BPI */\t\t\t\t\t\\\ndiff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c\nindex e15722ad66..0097ee210f 100644\n--- a/drivers/crypto/qat/qat_sym_pmd.c\n+++ b/drivers/crypto/qat/qat_sym_pmd.c\n@@ -39,6 +39,11 @@ static const struct rte_cryptodev_capabilities qat_gen3_sym_capabilities[] = {\n \tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n };\n \n+static const struct rte_cryptodev_capabilities qat_gen4_sym_capabilities[] = {\n+\tQAT_BASE_GEN4_SYM_CAPABILITIES,\n+\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n+};\n+\n #ifdef RTE_LIB_SECURITY\n static const struct rte_cryptodev_capabilities\n \t\t\t\t\tqat_security_sym_capabilities[] = {\n@@ -450,8 +455,8 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,\n \t\tcapa_size = sizeof(qat_gen3_sym_capabilities);\n \t\tbreak;\n \tcase QAT_GEN4:\n-\t\tcapabilities = NULL;\n-\t\tcapa_size = 0;\n+\t\tcapabilities = qat_gen4_sym_capabilities;\n+\t\tcapa_size = sizeof(qat_gen4_sym_capabilities);\n \t\tbreak;\n \tdefault:\n \t\tQAT_LOG(DEBUG,\n", "prefixes": [ "v2", "03/16" ] }