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GET /api/patches/94880/?format=api
{ "id": 94880, "url": "https://patches.dpdk.org/api/patches/94880/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624849071-56826-3-git-send-email-fengchengwen@huawei.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1624849071-56826-3-git-send-email-fengchengwen@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1624849071-56826-3-git-send-email-fengchengwen@huawei.com", "date": "2021-06-28T02:57:51", "name": "[2/2] net/hns3: fix SVE code compile error with gcc8.3", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "a12322f6e1930121365cee90dbbb142548d94204", "submitter": { "id": 2146, "url": "https://patches.dpdk.org/api/people/2146/?format=api", "name": "fengchengwen", "email": "fengchengwen@huawei.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624849071-56826-3-git-send-email-fengchengwen@huawei.com/mbox/", "series": [ { "id": 17496, "url": "https://patches.dpdk.org/api/series/17496/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17496", "date": "2021-06-28T02:57:51", "name": "bugfix for SVE compile", "version": 1, "mbox": "https://patches.dpdk.org/series/17496/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94880/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/94880/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AE9ADA0C40;\n\tMon, 28 Jun 2021 05:01:27 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2A47040692;\n\tMon, 28 Jun 2021 05:01:27 +0200 (CEST)", "from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188])\n by mails.dpdk.org (Postfix) with ESMTP id A9F714068A\n for <dev@dpdk.org>; Mon, 28 Jun 2021 05:01:25 +0200 (CEST)", "from dggemv703-chm.china.huawei.com (unknown [172.30.72.55])\n by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4GCsk06ChLzZnFG;\n Mon, 28 Jun 2021 10:58:16 +0800 (CST)", "from dggpeml500024.china.huawei.com (7.185.36.10) by\n dggemv703-chm.china.huawei.com (10.3.19.46) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.1.2176.2; Mon, 28 Jun 2021 11:01:19 +0800", "from localhost.localdomain (10.67.165.24) by\n dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.1.2176.2; Mon, 28 Jun 2021 11:01:17 +0800" ], "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<thomas@monjalon.net>, <ferruh.yigit@intel.com>, <ruifeng.wang@arm.com>", "CC": "<dev@dpdk.org>, <bruce.richardson@intel.com>,\n <vladimir.medvedkin@intel.com>, <viktorin@rehivetech.com>,\n <jerinj@marvell.com>, <Honnappa.Nagarahalli@arm.com>,\n <jerinjacobk@gmail.com>, <juraj.linkes@pantheon.tech>", "Date": "Mon, 28 Jun 2021 10:57:51 +0800", "Message-ID": "<1624849071-56826-3-git-send-email-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.8.1", "In-Reply-To": "<1624849071-56826-1-git-send-email-fengchengwen@huawei.com>", "References": "<1624849071-56826-1-git-send-email-fengchengwen@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.67.165.24]", "X-ClientProxiedBy": "dggems703-chm.china.huawei.com (10.3.19.180) To\n dggpeml500024.china.huawei.com (7.185.36.10)", "X-CFilter-Loop": "Reflected", "Subject": "[dpdk-dev] [PATCH 2/2] net/hns3: fix SVE code compile error with\n gcc8.3", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "If the target machine has SVE feature (e.g. '-march=armv8.2-a+sve'),\nand compiler are gcc8.3, it will compile error, the error is arm_sve.h\nno such file or directory.\n\nThe solution:\na. If RTE_HAS_SVE_ACLE defined (it means the minimum instruction set\nsupport SVE ACLE) then compiles it.\nb. Else if the compiler support SVE ACLE then compiles it.\nc. Otherwise don't compile it.\n\nFixes: 8c25b02b082a (\"net/hns3: fix enabling SVE Rx/Tx\")\nFixes: 952ebacce4f2 (\"net/hns3: support SVE Rx\")\nCc: stable@dpdk.org\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\nAcked-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n drivers/net/hns3/hns3_rxtx.c | 2 +-\n drivers/net/hns3/meson.build | 20 +++++++++++++++++++-\n 2 files changed, 20 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c\nindex cb9eccf..a86e105 100644\n--- a/drivers/net/hns3/hns3_rxtx.c\n+++ b/drivers/net/hns3/hns3_rxtx.c\n@@ -2811,7 +2811,7 @@ hns3_get_default_vec_support(void)\n static bool\n hns3_get_sve_support(void)\n {\n-#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_SVE)\n+#if defined(RTE_HAS_SVE_ACLE)\n \tif (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_256)\n \t\treturn false;\n \tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SVE))\ndiff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build\nindex 53c7df7..a99e0db 100644\n--- a/drivers/net/hns3/meson.build\n+++ b/drivers/net/hns3/meson.build\n@@ -35,7 +35,25 @@ deps += ['hash']\n \n if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')\n sources += files('hns3_rxtx_vec.c')\n- if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''\n+\n+ # compile SVE when:\n+ # a. support SVE in minimum instruction set baseline\n+ # b. it's not minimum instruction set, but compiler support\n+ if dpdk_conf.has('RTE_HAS_SVE_ACLE')\n sources += files('hns3_rxtx_vec_sve.c')\n+ elif cc.has_argument('-march=armv8.2-a+sve') and cc.check_header('arm_sve.h')\n+ cflags += ['-DRTE_HAS_SVE_ACLE=1']\n+ sve_cflags = []\n+ foreach flag: cflags\n+ if not (flag.startswith('-march=') or flag.startswith('-mcpu=') or flag.startswith('-mtune='))\n+ sve_cflags += flag\n+ endif\n+ endforeach\n+ hns3_sve_lib = static_library('hns3_sve_lib',\n+ 'hns3_rxtx_vec_sve.c',\n+ dependencies: [static_rte_ethdev],\n+ include_directories: includes,\n+ c_args: [sve_cflags, '-march=armv8.2-a+sve'])\n+ objs += hns3_sve_lib.extract_objects('hns3_rxtx_vec_sve.c')\n endif\n endif\n", "prefixes": [ "2/2" ] }