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GET /api/patches/94866/?format=api
{ "id": 94866, "url": "https://patches.dpdk.org/api/patches/94866/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/791375007363a5fdb859a00407352e324e5063ed.1624629506.git.anatoly.burakov@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<791375007363a5fdb859a00407352e324e5063ed.1624629506.git.anatoly.burakov@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/791375007363a5fdb859a00407352e324e5063ed.1624629506.git.anatoly.burakov@intel.com", "date": "2021-06-25T14:00:04", "name": "[v2,1/7] power_intrinsics: use callbacks for comparison", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9e0f22ccbc6550cfb32b0a8f62b6acce03d94bc6", "submitter": { "id": 4, "url": "https://patches.dpdk.org/api/people/4/?format=api", "name": "Anatoly Burakov", "email": "anatoly.burakov@intel.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/791375007363a5fdb859a00407352e324e5063ed.1624629506.git.anatoly.burakov@intel.com/mbox/", "series": [ { "id": 17490, "url": "https://patches.dpdk.org/api/series/17490/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17490", "date": "2021-06-25T14:00:03", "name": "Enhancements for PMD power management", "version": 2, "mbox": "https://patches.dpdk.org/series/17490/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94866/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/94866/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5D4DCA0547;\n\tFri, 25 Jun 2021 16:00:45 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 412A140E25;\n\tFri, 25 Jun 2021 16:00:45 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by mails.dpdk.org (Postfix) with ESMTP id AEBAD4068A\n for <dev@dpdk.org>; Fri, 25 Jun 2021 16:00:43 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 25 Jun 2021 07:00:16 -0700", "from silpixa00399498.ir.intel.com (HELO\n silpixa00399498.ger.corp.intel.com) ([10.237.223.53])\n by FMSMGA003.fm.intel.com with ESMTP; 25 Jun 2021 07:00:13 -0700" ], "IronPort-SDR": [ "\n TAf/lWUYKY7b3GpxaTyBDg1GtIOaHs8voMn9aTFz/UVHHXqONml6noyQOGR3YmYqTZvi8JHCIx\n 8r3LiTi5Yrlg==", "\n GfCDc0BI7PtxxQgMK+LxT2lJs5MFF7NRR18qY7ARiyDfyspIwLQbd8oAjp4Jhr9CENWZg/vyg9\n d4BZehhGH4gg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10026\"; a=\"204664474\"", "E=Sophos;i=\"5.83,298,1616482800\"; d=\"scan'208\";a=\"204664474\"", "E=Sophos;i=\"5.83,298,1616482800\"; d=\"scan'208\";a=\"481858662\"" ], "X-ExtLoop1": "1", "From": "Anatoly Burakov <anatoly.burakov@intel.com>", "To": "dev@dpdk.org, Timothy McDaniel <timothy.mcdaniel@intel.com>,\n Beilei Xing <beilei.xing@intel.com>, Jingjing Wu <jingjing.wu@intel.com>,\n Qiming Yang <qiming.yang@intel.com>, Qi Zhang <qi.z.zhang@intel.com>,\n Haiyue Wang <haiyue.wang@intel.com>, Matan Azrad <matan@nvidia.com>,\n Shahaf Shuler <shahafs@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>", "Cc": "david.hunt@intel.com,\n\tciara.loftus@intel.com", "Date": "Fri, 25 Jun 2021 14:00:04 +0000", "Message-Id": "\n <791375007363a5fdb859a00407352e324e5063ed.1624629506.git.anatoly.burakov@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<cover.1624629506.git.anatoly.burakov@intel.com>", "References": "<cover.1622548381.git.anatoly.burakov@intel.com>\n <cover.1624629506.git.anatoly.burakov@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v2 1/7] power_intrinsics: use callbacks for\n comparison", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Previously, the semantics of power monitor were such that we were\nchecking current value against the expected value, and if they matched,\nthen the sleep was aborted. This is somewhat inflexible, because it only\nallowed us to check for a specific value.\n\nThis commit replaces the comparison with a user callback mechanism, so\nthat any PMD (or other code) using `rte_power_monitor()` can define\ntheir own comparison semantics and decision making on how to detect the\nneed to abort the entering of power optimized state.\n\nExisting implementations are adjusted to follow the new semantics.\n\nSuggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\nSigned-off-by: Anatoly Burakov <anatoly.burakov@intel.com>\n---\n\nNotes:\n v2:\n - Use callback mechanism for more flexibility\n - Address feedback from Konstantin\n\n doc/guides/rel_notes/release_21_08.rst | 1 +\n drivers/event/dlb2/dlb2.c | 16 ++++++++--\n drivers/net/i40e/i40e_rxtx.c | 19 ++++++++----\n drivers/net/iavf/iavf_rxtx.c | 19 ++++++++----\n drivers/net/ice/ice_rxtx.c | 19 ++++++++----\n drivers/net/ixgbe/ixgbe_rxtx.c | 19 ++++++++----\n drivers/net/mlx5/mlx5_rx.c | 16 ++++++++--\n .../include/generic/rte_power_intrinsics.h | 29 ++++++++++++++-----\n lib/eal/x86/rte_power_intrinsics.c | 9 ++----\n 9 files changed, 106 insertions(+), 41 deletions(-)", "diff": "diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst\nindex a6ecfdf3ce..c84ac280f5 100644\n--- a/doc/guides/rel_notes/release_21_08.rst\n+++ b/doc/guides/rel_notes/release_21_08.rst\n@@ -84,6 +84,7 @@ API Changes\n Also, make sure to start the actual text at the margin.\n =======================================================\n \n+* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.\n \n ABI Changes\n -----------\ndiff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c\nindex eca183753f..14dfac257c 100644\n--- a/drivers/event/dlb2/dlb2.c\n+++ b/drivers/event/dlb2/dlb2.c\n@@ -3154,6 +3154,15 @@ dlb2_port_credits_inc(struct dlb2_port *qm_port, int num)\n \t}\n }\n \n+#define CLB_MASK_IDX 0\n+#define CLB_VAL_IDX 1\n+static int\n+dlb2_monitor_callback(const uint64_t val, const uint64_t opaque[4])\n+{\n+\t/* abort if the value matches */\n+\treturn (val & opaque[CLB_MASK_IDX]) == opaque[CLB_VAL_IDX] ? -1 : 0;\n+}\n+\n static inline int\n dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,\n \t\t struct dlb2_eventdev_port *ev_port,\n@@ -3194,8 +3203,11 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,\n \t\t\texpected_value = 0;\n \n \t\tpmc.addr = monitor_addr;\n-\t\tpmc.val = expected_value;\n-\t\tpmc.mask = qe_mask.raw_qe[1];\n+\t\t/* store expected value and comparison mask in opaque data */\n+\t\tpmc.opaque[CLB_VAL_IDX] = expected_value;\n+\t\tpmc.opaque[CLB_MASK_IDX] = qe_mask.raw_qe[1];\n+\t\t/* set up callback */\n+\t\tpmc.fn = dlb2_monitor_callback;\n \t\tpmc.size = sizeof(uint64_t);\n \n \t\trte_power_monitor(&pmc, timeout + start_ticks);\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 6c58decece..45f3fbf4ec 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -81,6 +81,17 @@\n #define I40E_TX_OFFLOAD_SIMPLE_NOTSUP_MASK \\\n \t\t(PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_SIMPLE_SUP_MASK)\n \n+static int\n+i40e_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)\n+{\n+\tconst uint64_t m = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);\n+\t/*\n+\t * we expect the DD bit to be set to 1 if this descriptor was already\n+\t * written to.\n+\t */\n+\treturn (value & m) == m ? -1 : 0;\n+}\n+\n int\n i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n {\n@@ -93,12 +104,8 @@ i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t/* watch for changes in status bit */\n \tpmc->addr = &rxdp->wb.qword1.status_error_len;\n \n-\t/*\n-\t * we expect the DD bit to be set to 1 if this descriptor was already\n-\t * written to.\n-\t */\n-\tpmc->val = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);\n-\tpmc->mask = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);\n+\t/* comparison callback */\n+\tpmc->fn = i40e_monitor_callback;\n \n \t/* registers are 64-bit */\n \tpmc->size = sizeof(uint64_t);\ndiff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c\nindex 0361af0d85..6e12ecce07 100644\n--- a/drivers/net/iavf/iavf_rxtx.c\n+++ b/drivers/net/iavf/iavf_rxtx.c\n@@ -57,6 +57,17 @@ iavf_proto_xtr_type_to_rxdid(uint8_t flex_type)\n \t\t\t\trxdid_map[flex_type] : IAVF_RXDID_COMMS_OVS_1;\n }\n \n+static int\n+iavf_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)\n+{\n+\tconst uint64_t m = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);\n+\t/*\n+\t * we expect the DD bit to be set to 1 if this descriptor was already\n+\t * written to.\n+\t */\n+\treturn (value & m) == m ? -1 : 0;\n+}\n+\n int\n iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n {\n@@ -69,12 +80,8 @@ iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t/* watch for changes in status bit */\n \tpmc->addr = &rxdp->wb.qword1.status_error_len;\n \n-\t/*\n-\t * we expect the DD bit to be set to 1 if this descriptor was already\n-\t * written to.\n-\t */\n-\tpmc->val = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);\n-\tpmc->mask = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);\n+\t/* comparison callback */\n+\tpmc->fn = iavf_monitor_callback;\n \n \t/* registers are 64-bit */\n \tpmc->size = sizeof(uint64_t);\ndiff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex fc9bb5a3e7..278eb4b9a1 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -27,6 +27,17 @@ uint64_t rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask;\n uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask;\n uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask;\n \n+static int\n+ice_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)\n+{\n+\tconst uint64_t m = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);\n+\t/*\n+\t * we expect the DD bit to be set to 1 if this descriptor was already\n+\t * written to.\n+\t */\n+\treturn (value & m) == m ? -1 : 0;\n+}\n+\n int\n ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n {\n@@ -39,12 +50,8 @@ ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t/* watch for changes in status bit */\n \tpmc->addr = &rxdp->wb.status_error0;\n \n-\t/*\n-\t * we expect the DD bit to be set to 1 if this descriptor was already\n-\t * written to.\n-\t */\n-\tpmc->val = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);\n-\tpmc->mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);\n+\t/* comparison callback */\n+\tpmc->fn = ice_monitor_callback;\n \n \t/* register is 16-bit */\n \tpmc->size = sizeof(uint16_t);\ndiff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c\nindex d69f36e977..0c5045d9dc 100644\n--- a/drivers/net/ixgbe/ixgbe_rxtx.c\n+++ b/drivers/net/ixgbe/ixgbe_rxtx.c\n@@ -1369,6 +1369,17 @@ const uint32_t\n \t\tRTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,\n };\n \n+static int\n+ixgbe_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)\n+{\n+\tconst uint64_t m = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);\n+\t/*\n+\t * we expect the DD bit to be set to 1 if this descriptor was already\n+\t * written to.\n+\t */\n+\treturn (value & m) == m ? -1 : 0;\n+}\n+\n int\n ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n {\n@@ -1381,12 +1392,8 @@ ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t/* watch for changes in status bit */\n \tpmc->addr = &rxdp->wb.upper.status_error;\n \n-\t/*\n-\t * we expect the DD bit to be set to 1 if this descriptor was already\n-\t * written to.\n-\t */\n-\tpmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);\n-\tpmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);\n+\t/* comparison callback */\n+\tpmc->fn = ixgbe_monitor_callback;\n \n \t/* the registers are 32-bit */\n \tpmc->size = sizeof(uint32_t);\ndiff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c\nindex 6cd71a44eb..f31a1ec839 100644\n--- a/drivers/net/mlx5/mlx5_rx.c\n+++ b/drivers/net/mlx5/mlx5_rx.c\n@@ -269,6 +269,17 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n \treturn rx_queue_count(rxq);\n }\n \n+#define CLB_VAL_IDX 0\n+#define CLB_MSK_IDX 1\n+static int\n+mlx_monitor_callback(const uint64_t value, const uint64_t opaque[4])\n+{\n+\tconst uint64_t m = opaque[CLB_MSK_IDX];\n+\tconst uint64_t v = opaque[CLB_VAL_IDX];\n+\n+\treturn (value & m) == v ? -1 : 0;\n+}\n+\n int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n {\n \tstruct mlx5_rxq_data *rxq = rx_queue;\n@@ -282,8 +293,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)\n \t\treturn -rte_errno;\n \t}\n \tpmc->addr = &cqe->op_own;\n-\tpmc->val = !!idx;\n-\tpmc->mask = MLX5_CQE_OWNER_MASK;\n+\tpmc->opaque[CLB_VAL_IDX] = !!idx;\n+\tpmc->opaque[CLB_MSK_IDX] = MLX5_CQE_OWNER_MASK;\n+\tpmc->fn = mlx_monitor_callback;\n \tpmc->size = sizeof(uint8_t);\n \treturn 0;\n }\ndiff --git a/lib/eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h\nindex dddca3d41c..046667ade6 100644\n--- a/lib/eal/include/generic/rte_power_intrinsics.h\n+++ b/lib/eal/include/generic/rte_power_intrinsics.h\n@@ -18,19 +18,34 @@\n * which are architecture-dependent.\n */\n \n+/**\n+ * Callback definition for monitoring conditions. Callbacks with this signature\n+ * will be used by `rte_power_monitor()` to check if the entering of power\n+ * optimized state should be aborted.\n+ *\n+ * @param val\n+ * The value read from memory.\n+ * @param opaque\n+ * Callback-specific data.\n+ *\n+ * @return\n+ * 0 if entering of power optimized state should proceed\n+ * -1 if entering of power optimized state should be aborted\n+ */\n+typedef int (*rte_power_monitor_clb_t)(const uint64_t val,\n+\t\tconst uint64_t opaque[4]);\n struct rte_power_monitor_cond {\n \tvolatile void *addr; /**< Address to monitor for changes */\n-\tuint64_t val; /**< If the `mask` is non-zero, location pointed\n-\t * to by `addr` will be read and compared\n-\t * against this value.\n-\t */\n-\tuint64_t mask; /**< 64-bit mask to extract value read from `addr` */\n-\tuint8_t size; /**< Data size (in bytes) that will be used to compare\n-\t * expected value (`val`) with data read from the\n+\tuint8_t size; /**< Data size (in bytes) that will be read from the\n \t * monitored memory location (`addr`). Can be 1, 2,\n \t * 4, or 8. Supplying any other value will result in\n \t * an error.\n \t */\n+\trte_power_monitor_clb_t fn; /**< Callback to be used to check if\n+\t * entering power optimized state should\n+\t * be aborted.\n+\t */\n+\tuint64_t opaque[4]; /**< Callback-specific data */\n };\n \n /**\ndiff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c\nindex 39ea9fdecd..3c5c9ce7ad 100644\n--- a/lib/eal/x86/rte_power_intrinsics.c\n+++ b/lib/eal/x86/rte_power_intrinsics.c\n@@ -110,14 +110,11 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,\n \t/* now that we've put this address into monitor, we can unlock */\n \trte_spinlock_unlock(&s->lock);\n \n-\t/* if we have a comparison mask, we might not need to sleep at all */\n-\tif (pmc->mask) {\n+\t/* if we have a callback, we might not need to sleep at all */\n+\tif (pmc->fn) {\n \t\tconst uint64_t cur_value = __get_umwait_val(\n \t\t\t\tpmc->addr, pmc->size);\n-\t\tconst uint64_t masked = cur_value & pmc->mask;\n-\n-\t\t/* if the masked value is already matching, abort */\n-\t\tif (masked == pmc->val)\n+\t\tif (pmc->fn(cur_value, pmc->opaque) != 0)\n \t\t\tgoto end;\n \t}\n \n", "prefixes": [ "v2", "1/7" ] }