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GET /api/patches/94829/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 94829,
    "url": "https://patches.dpdk.org/api/patches/94829/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-6-git-send-email-anoobj@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1624600591-29841-6-git-send-email-anoobj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1624600591-29841-6-git-send-email-anoobj@marvell.com",
    "date": "2021-06-25T05:56:16",
    "name": "[v2,05/20] crypto/cnxk: add session ops framework",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "3d8380c8317086e9d5428abb95457592de93d0fd",
    "submitter": {
        "id": 1205,
        "url": "https://patches.dpdk.org/api/people/1205/?format=api",
        "name": "Anoob Joseph",
        "email": "anoobj@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-6-git-send-email-anoobj@marvell.com/mbox/",
    "series": [
        {
            "id": 17483,
            "url": "https://patches.dpdk.org/api/series/17483/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17483",
            "date": "2021-06-25T05:56:11",
            "name": "Add Marvell CNXK crypto PMDs",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/17483/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/94829/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/94829/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2120AA0C40;\n\tFri, 25 Jun 2021 07:57:49 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B4956410E5;\n\tFri, 25 Jun 2021 07:57:30 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 7B03B410E5\n for <dev@dpdk.org>; Fri, 25 Jun 2021 07:57:29 +0200 (CEST)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15P5nxNR007980; Thu, 24 Jun 2021 22:57:28 -0700",
            "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 39d24dhk1b-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 24 Jun 2021 22:57:28 -0700",
            "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 24 Jun 2021 22:57:27 -0700",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 24 Jun 2021 22:57:26 -0700",
            "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id CC12A3F7041;\n Thu, 24 Jun 2021 22:57:23 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Pci6LxgfXnjHvpAGRheYvZTkhPX7z5eRKd39US5THNU=;\n b=ZKeE6c6yxu2JMzpGz6BEdKmMHgmROzSMngbtKSGExfCMyKFxAcS/Jx1/8VSz5Mzg5PP/\n WAoJqHq2O0vhv1eYcobSWTOZ0yEfrDwzftv+j3Ehh28IFycyAwWuhAYave76d4yTmmT1\n HmR9qQrkLNozrAGuXYen0Stlugbj+eYrmxPYKa3rZSvCyKON0sktevSLU7i7L4+TZbLp\n 1SNAK70Le/BC49oKZ3f1rPQYeU+rIzxtAG5aOegpBMDkmadTfL608Ic5+SqvUWmTeeNm\n jeWIVzw2pMyFxYkqSGaEwZJ1+DgNc97n3MJ/M5sxgsQxU3lCsNbpfKrificUlGkL0vUM Yg==",
        "From": "Anoob Joseph <anoobj@marvell.com>",
        "To": "Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>",
        "CC": "Anoob Joseph <anoobj@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n \"Ankur Dwivedi\" <adwivedi@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, <dev@dpdk.org>, Archana Muniganti\n <marchana@marvell.com>",
        "Date": "Fri, 25 Jun 2021 11:26:16 +0530",
        "Message-ID": "<1624600591-29841-6-git-send-email-anoobj@marvell.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1624600591-29841-1-git-send-email-anoobj@marvell.com>",
        "References": "\n <http://patches.dpdk.org/project/dpdk/cover/1622652221-22732-1-git-send-email-anoobj@marvell.com/>\n <1624600591-29841-1-git-send-email-anoobj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "3TqOZgCbml_o5Dyc0bqVM0wf-GKzVwDw",
        "X-Proofpoint-ORIG-GUID": "3TqOZgCbml_o5Dyc0bqVM0wf-GKzVwDw",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-25_02:2021-06-24,\n 2021-06-25 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v2 05/20] crypto/cnxk: add session ops framework",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add session ops\n- sym_session_get_size\n- sym_session_configure\n- sym_session_clear\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Archana Muniganti <marchana@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c |   6 +-\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |   6 +-\n drivers/crypto/cnxk/cnxk_cryptodev_ops.c  | 187 ++++++++++++++++++++++++++++++\n drivers/crypto/cnxk/cnxk_cryptodev_ops.h  |  27 +++++\n drivers/crypto/cnxk/cnxk_se.h             |  31 +++++\n 5 files changed, 251 insertions(+), 6 deletions(-)\n create mode 100644 drivers/crypto/cnxk/cnxk_se.h",
    "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 007d449..34dc107 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -33,9 +33,9 @@ struct rte_cryptodev_ops cn10k_cpt_ops = {\n \t.queue_pair_release = cnxk_cpt_queue_pair_release,\n \n \t/* Symmetric crypto ops */\n-\t.sym_session_get_size = NULL,\n-\t.sym_session_configure = NULL,\n-\t.sym_session_clear = NULL,\n+\t.sym_session_get_size = cnxk_cpt_sym_session_get_size,\n+\t.sym_session_configure = cnxk_cpt_sym_session_configure,\n+\t.sym_session_clear = cnxk_cpt_sym_session_clear,\n \n \t/* Asymmetric crypto ops */\n \t.asym_session_get_size = NULL,\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex 73ccf5b..bef6159 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -33,9 +33,9 @@ struct rte_cryptodev_ops cn9k_cpt_ops = {\n \t.queue_pair_release = cnxk_cpt_queue_pair_release,\n \n \t/* Symmetric crypto ops */\n-\t.sym_session_get_size = NULL,\n-\t.sym_session_configure = NULL,\n-\t.sym_session_clear = NULL,\n+\t.sym_session_get_size = cnxk_cpt_sym_session_get_size,\n+\t.sym_session_configure = cnxk_cpt_sym_session_configure,\n+\t.sym_session_clear = cnxk_cpt_sym_session_clear,\n \n \t/* Asymmetric crypto ops */\n \t.asym_session_get_size = NULL,\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\nindex cf04aec..8ef0e6f 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n@@ -10,6 +10,7 @@\n \n #include \"cnxk_cryptodev.h\"\n #include \"cnxk_cryptodev_ops.h\"\n+#include \"cnxk_se.h\"\n \n static int\n cnxk_cpt_get_mlen(void)\n@@ -328,3 +329,189 @@ cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \tcnxk_cpt_qp_destroy(dev, qp);\n \treturn ret;\n }\n+\n+unsigned int\n+cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)\n+{\n+\treturn sizeof(struct cnxk_se_sess);\n+}\n+\n+static int\n+sym_xform_verify(struct rte_crypto_sym_xform *xform)\n+{\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&\n+\t    xform->auth.algo == RTE_CRYPTO_AUTH_NULL &&\n+\t    xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY)\n+\t\treturn -ENOTSUP;\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)\n+\t\treturn CNXK_CPT_CIPHER;\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)\n+\t\treturn CNXK_CPT_AUTH;\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD && xform->next == NULL)\n+\t\treturn CNXK_CPT_AEAD;\n+\n+\tif (xform->next == NULL)\n+\t\treturn -EIO;\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&\n+\t    xform->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC &&\n+\t    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&\n+\t    xform->next->auth.algo == RTE_CRYPTO_AUTH_SHA1)\n+\t\treturn -ENOTSUP;\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&\n+\t    xform->auth.algo == RTE_CRYPTO_AUTH_SHA1 &&\n+\t    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&\n+\t    xform->next->cipher.algo == RTE_CRYPTO_CIPHER_3DES_CBC)\n+\t\treturn -ENOTSUP;\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&\n+\t    xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&\n+\t    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&\n+\t    xform->next->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE)\n+\t\treturn CNXK_CPT_CIPHER_ENC_AUTH_GEN;\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&\n+\t    xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY &&\n+\t    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&\n+\t    xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT)\n+\t\treturn CNXK_CPT_AUTH_VRFY_CIPHER_DEC;\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&\n+\t    xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE &&\n+\t    xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&\n+\t    xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {\n+\t\tswitch (xform->auth.algo) {\n+\t\tcase RTE_CRYPTO_AUTH_SHA1_HMAC:\n+\t\t\tswitch (xform->next->cipher.algo) {\n+\t\t\tcase RTE_CRYPTO_CIPHER_AES_CBC:\n+\t\t\t\treturn CNXK_CPT_AUTH_GEN_CIPHER_ENC;\n+\t\t\tdefault:\n+\t\t\t\treturn -ENOTSUP;\n+\t\t\t}\n+\t\tdefault:\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n+\t}\n+\n+\tif (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&\n+\t    xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT &&\n+\t    xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH &&\n+\t    xform->next->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY) {\n+\t\tswitch (xform->cipher.algo) {\n+\t\tcase RTE_CRYPTO_CIPHER_AES_CBC:\n+\t\t\tswitch (xform->next->auth.algo) {\n+\t\t\tcase RTE_CRYPTO_AUTH_SHA1_HMAC:\n+\t\t\t\treturn CNXK_CPT_CIPHER_DEC_AUTH_VRFY;\n+\t\t\tdefault:\n+\t\t\t\treturn -ENOTSUP;\n+\t\t\t}\n+\t\tdefault:\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n+\t}\n+\n+\treturn -ENOTSUP;\n+}\n+\n+static uint64_t\n+cnxk_cpt_inst_w7_get(struct cnxk_se_sess *sess, struct roc_cpt *roc_cpt)\n+{\n+\tunion cpt_inst_w7 inst_w7;\n+\n+\tinst_w7.s.cptr = (uint64_t)&sess->roc_se_ctx.se_ctx;\n+\n+\t/* Set the engine group */\n+\tif (sess->zsk_flag || sess->chacha_poly)\n+\t\tinst_w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_SE];\n+\telse\n+\t\tinst_w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE];\n+\n+\treturn inst_w7.u64;\n+}\n+\n+int\n+sym_session_configure(struct roc_cpt *roc_cpt, int driver_id,\n+\t\t      struct rte_crypto_sym_xform *xform,\n+\t\t      struct rte_cryptodev_sym_session *sess,\n+\t\t      struct rte_mempool *pool)\n+{\n+\tstruct cnxk_se_sess *sess_priv;\n+\tvoid *priv;\n+\tint ret;\n+\n+\tret = sym_xform_verify(xform);\n+\tif (unlikely(ret < 0))\n+\t\treturn ret;\n+\n+\tif (unlikely(rte_mempool_get(pool, &priv))) {\n+\t\tplt_dp_err(\"Could not allocate session private data\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tmemset(priv, 0, sizeof(struct cnxk_se_sess));\n+\n+\tsess_priv = priv;\n+\n+\tswitch (ret) {\n+\tdefault:\n+\t\tret = -1;\n+\t}\n+\n+\tif (ret)\n+\t\tgoto priv_put;\n+\n+\tsess_priv->cpt_inst_w7 = cnxk_cpt_inst_w7_get(sess_priv, roc_cpt);\n+\n+\tset_sym_session_private_data(sess, driver_id, sess_priv);\n+\n+\treturn 0;\n+\n+priv_put:\n+\trte_mempool_put(pool, priv);\n+\n+\treturn -ENOTSUP;\n+}\n+\n+int\n+cnxk_cpt_sym_session_configure(struct rte_cryptodev *dev,\n+\t\t\t       struct rte_crypto_sym_xform *xform,\n+\t\t\t       struct rte_cryptodev_sym_session *sess,\n+\t\t\t       struct rte_mempool *pool)\n+{\n+\tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n+\tstruct roc_cpt *roc_cpt = &vf->cpt;\n+\tuint8_t driver_id;\n+\n+\tdriver_id = dev->driver_id;\n+\n+\treturn sym_session_configure(roc_cpt, driver_id, xform, sess, pool);\n+}\n+\n+void\n+sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)\n+{\n+\tvoid *priv = get_sym_session_private_data(sess, driver_id);\n+\tstruct rte_mempool *pool;\n+\n+\tif (priv == NULL)\n+\t\treturn;\n+\n+\tmemset(priv, 0, cnxk_cpt_sym_session_get_size(NULL));\n+\n+\tpool = rte_mempool_from_obj(priv);\n+\n+\tset_sym_session_private_data(sess, driver_id, NULL);\n+\n+\trte_mempool_put(pool, priv);\n+}\n+\n+void\n+cnxk_cpt_sym_session_clear(struct rte_cryptodev *dev,\n+\t\t\t   struct rte_cryptodev_sym_session *sess)\n+{\n+\treturn sym_session_clear(dev->driver_id, sess);\n+}\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\nindex f9440f9..0a3c705 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n@@ -16,6 +16,16 @@ struct cpt_qp_meta_info {\n \tint mlen;\n };\n \n+enum sym_xform_type {\n+\tCNXK_CPT_CIPHER = 1,\n+\tCNXK_CPT_AUTH,\n+\tCNXK_CPT_AEAD,\n+\tCNXK_CPT_CIPHER_ENC_AUTH_GEN,\n+\tCNXK_CPT_AUTH_VRFY_CIPHER_DEC,\n+\tCNXK_CPT_AUTH_GEN_CIPHER_ENC,\n+\tCNXK_CPT_CIPHER_DEC_AUTH_VRFY\n+};\n+\n struct cpt_inflight_req {\n \tunion cpt_res_s res;\n \tstruct rte_crypto_op *cop;\n@@ -69,4 +79,21 @@ int cnxk_cpt_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \n int cnxk_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);\n \n+unsigned int cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev);\n+\n+int cnxk_cpt_sym_session_configure(struct rte_cryptodev *dev,\n+\t\t\t\t   struct rte_crypto_sym_xform *xform,\n+\t\t\t\t   struct rte_cryptodev_sym_session *sess,\n+\t\t\t\t   struct rte_mempool *pool);\n+\n+int sym_session_configure(struct roc_cpt *roc_cpt, int driver_id,\n+\t\t\t  struct rte_crypto_sym_xform *xform,\n+\t\t\t  struct rte_cryptodev_sym_session *sess,\n+\t\t\t  struct rte_mempool *pool);\n+\n+void cnxk_cpt_sym_session_clear(struct rte_cryptodev *dev,\n+\t\t\t\tstruct rte_cryptodev_sym_session *sess);\n+\n+void sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess);\n+\n #endif /* _CNXK_CRYPTODEV_OPS_H_ */\ndiff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h\nnew file mode 100644\nindex 0000000..9cccab0\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cnxk_se.h\n@@ -0,0 +1,31 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef _CNXK_SE_H_\n+#define _CNXK_SE_H_\n+#include <stdbool.h>\n+\n+#include \"roc_se.h\"\n+\n+struct cnxk_se_sess {\n+\tuint16_t cpt_op : 4;\n+\tuint16_t zsk_flag : 4;\n+\tuint16_t aes_gcm : 1;\n+\tuint16_t aes_ctr : 1;\n+\tuint16_t chacha_poly : 1;\n+\tuint16_t is_null : 1;\n+\tuint16_t is_gmac : 1;\n+\tuint16_t rsvd1 : 3;\n+\tuint16_t aad_length;\n+\tuint8_t mac_len;\n+\tuint8_t iv_length;\n+\tuint8_t auth_iv_length;\n+\tuint16_t iv_offset;\n+\tuint16_t auth_iv_offset;\n+\tuint32_t salt;\n+\tuint64_t cpt_inst_w7;\n+\tstruct roc_se_ctx roc_se_ctx;\n+} __rte_cache_aligned;\n+\n+#endif /*_CNXK_SE_H_ */\n",
    "prefixes": [
        "v2",
        "05/20"
    ]
}