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GET /api/patches/94827/?format=api
{ "id": 94827, "url": "https://patches.dpdk.org/api/patches/94827/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-4-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1624600591-29841-4-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1624600591-29841-4-git-send-email-anoobj@marvell.com", "date": "2021-06-25T05:56:14", "name": "[v2,03/20] crypto/cnxk: add device control ops", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f04a7f280144323b15e23507b36be65caf7c1c4f", "submitter": { "id": 1205, "url": "https://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-4-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 17483, "url": "https://patches.dpdk.org/api/series/17483/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17483", "date": "2021-06-25T05:56:11", "name": "Add Marvell CNXK crypto PMDs", "version": 2, "mbox": "https://patches.dpdk.org/series/17483/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94827/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94827/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AB41DA0C40;\n\tFri, 25 Jun 2021 07:57:35 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 74099410EC;\n\tFri, 25 Jun 2021 07:57:21 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 807B8410EC\n for <dev@dpdk.org>; Fri, 25 Jun 2021 07:57:20 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15P5vDb2018286; Thu, 24 Jun 2021 22:57:19 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 39d241shpy-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 24 Jun 2021 22:57:19 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 24 Jun 2021 22:57:17 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 24 Jun 2021 22:57:17 -0700", "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id 6F43B3F7078;\n Thu, 24 Jun 2021 22:57:14 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=I7nLmU32qKYP0ufulzb3BSbn6J8tLHCioTeduY+9oUo=;\n b=TBt0HxLfZrfUZxnSGFerHbfdJ93X9j2EfKx12ao1SOQFVXSsq73Gcspy99VuO7iX1ymF\n Tot/dWGmb+rJnH8D/ojj+YazkFMD/ZlI2eYh1xJjENkEH7ptEKqI1z0S05h78+0wTvee\n kwAAqC2VgF0H59L+Jqmc+oqOLcDnGpLAY2NLysreb06m2h05A3Ch8byXWezi0bjOecp0\n WgByFKF8DbH3r0hZOqplE8CTBPgNDjLbqanFkUONO7gx2awHRBbdlRP2lzqKq5hhEvoR\n Zgf9TOaNUzVD6EOv3ZyMgWj07bkEtTdhcFYm74W2a6pLbTDD7hNqjKAJNoK6cXEQNkuk bg==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Ankur Dwivedi <adwivedi@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>, Anoob Joseph\n <anoobj@marvell.com>, Archana Muniganti <marchana@marvell.com>", "Date": "Fri, 25 Jun 2021 11:26:14 +0530", "Message-ID": "<1624600591-29841-4-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1624600591-29841-1-git-send-email-anoobj@marvell.com>", "References": "\n <http://patches.dpdk.org/project/dpdk/cover/1622652221-22732-1-git-send-email-anoobj@marvell.com/>\n <1624600591-29841-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "jIVchkUskLVMTFYsCErI5JoIrmiWXSOY", "X-Proofpoint-ORIG-GUID": "jIVchkUskLVMTFYsCErI5JoIrmiWXSOY", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-25_02:2021-06-24,\n 2021-06-25 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 03/20] crypto/cnxk: add device control ops", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ankur Dwivedi <adwivedi@marvell.com>\n\nAdd ops for\n- dev_configure()\n- dev_start()\n- dev_stop()\n- dev_close()\n- dev_infos_get()\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Archana Muniganti <marchana@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 21 +++++++--\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 21 +++++++--\n drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 77 +++++++++++++++++++++++++++++++\n drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 24 ++++++++++\n drivers/crypto/cnxk/meson.build | 1 +\n 5 files changed, 134 insertions(+), 10 deletions(-)\n create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev_ops.h", "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 6f80f74..b0eccb3 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -7,14 +7,25 @@\n \n #include \"cn10k_cryptodev.h\"\n #include \"cn10k_cryptodev_ops.h\"\n+#include \"cnxk_cryptodev_ops.h\"\n+\n+static void\n+cn10k_cpt_dev_info_get(struct rte_cryptodev *dev,\n+\t\t struct rte_cryptodev_info *info)\n+{\n+\tif (info != NULL) {\n+\t\tcnxk_cpt_dev_info_get(dev, info);\n+\t\tinfo->driver_id = cn10k_cryptodev_driver_id;\n+\t}\n+}\n \n struct rte_cryptodev_ops cn10k_cpt_ops = {\n \t/* Device control ops */\n-\t.dev_configure = NULL,\n-\t.dev_start = NULL,\n-\t.dev_stop = NULL,\n-\t.dev_close = NULL,\n-\t.dev_infos_get = NULL,\n+\t.dev_configure = cnxk_cpt_dev_config,\n+\t.dev_start = cnxk_cpt_dev_start,\n+\t.dev_stop = cnxk_cpt_dev_stop,\n+\t.dev_close = cnxk_cpt_dev_close,\n+\t.dev_infos_get = cn10k_cpt_dev_info_get,\n \n \t.stats_get = NULL,\n \t.stats_reset = NULL,\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex 51f9845..acfb071 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -7,14 +7,25 @@\n \n #include \"cn9k_cryptodev.h\"\n #include \"cn9k_cryptodev_ops.h\"\n+#include \"cnxk_cryptodev_ops.h\"\n+\n+static void\n+cn9k_cpt_dev_info_get(struct rte_cryptodev *dev,\n+\t\t struct rte_cryptodev_info *info)\n+{\n+\tif (info != NULL) {\n+\t\tcnxk_cpt_dev_info_get(dev, info);\n+\t\tinfo->driver_id = cn9k_cryptodev_driver_id;\n+\t}\n+}\n \n struct rte_cryptodev_ops cn9k_cpt_ops = {\n \t/* Device control ops */\n-\t.dev_configure = NULL,\n-\t.dev_start = NULL,\n-\t.dev_stop = NULL,\n-\t.dev_close = NULL,\n-\t.dev_infos_get = NULL,\n+\t.dev_configure = cnxk_cpt_dev_config,\n+\t.dev_start = cnxk_cpt_dev_start,\n+\t.dev_stop = cnxk_cpt_dev_stop,\n+\t.dev_close = cnxk_cpt_dev_close,\n+\t.dev_infos_get = cn9k_cpt_dev_info_get,\n \n \t.stats_get = NULL,\n \t.stats_reset = NULL,\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\nnew file mode 100644\nindex 0000000..810f3b8\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n@@ -0,0 +1,77 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include <rte_cryptodev.h>\n+#include <rte_cryptodev_pmd.h>\n+#include <rte_errno.h>\n+\n+#include \"roc_cpt.h\"\n+\n+#include \"cnxk_cryptodev.h\"\n+#include \"cnxk_cryptodev_ops.h\"\n+\n+int\n+cnxk_cpt_dev_config(struct rte_cryptodev *dev,\n+\t\t struct rte_cryptodev_config *conf)\n+{\n+\tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n+\tstruct roc_cpt *roc_cpt = &vf->cpt;\n+\tuint16_t nb_lf_avail, nb_lf;\n+\tint ret;\n+\n+\tdev->feature_flags &= ~conf->ff_disable;\n+\n+\tnb_lf_avail = roc_cpt->nb_lf_avail;\n+\tnb_lf = conf->nb_queue_pairs;\n+\n+\tif (nb_lf > nb_lf_avail)\n+\t\treturn -ENOTSUP;\n+\n+\tret = roc_cpt_dev_configure(roc_cpt, nb_lf);\n+\tif (ret) {\n+\t\tplt_err(\"Could not configure device\");\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int\n+cnxk_cpt_dev_start(struct rte_cryptodev *dev)\n+{\n+\tRTE_SET_USED(dev);\n+\n+\treturn 0;\n+}\n+\n+void\n+cnxk_cpt_dev_stop(struct rte_cryptodev *dev)\n+{\n+\tRTE_SET_USED(dev);\n+}\n+\n+int\n+cnxk_cpt_dev_close(struct rte_cryptodev *dev)\n+{\n+\tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n+\n+\troc_cpt_dev_clear(&vf->cpt);\n+\n+\treturn 0;\n+}\n+\n+void\n+cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,\n+\t\t struct rte_cryptodev_info *info)\n+{\n+\tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n+\tstruct roc_cpt *roc_cpt = &vf->cpt;\n+\n+\tinfo->max_nb_queue_pairs = roc_cpt->nb_lf_avail;\n+\tinfo->feature_flags = dev->feature_flags;\n+\tinfo->capabilities = NULL;\n+\tinfo->sym.max_nb_sessions = 0;\n+\tinfo->min_mbuf_headroom_req = CNXK_CPT_MIN_HEADROOM_REQ;\n+\tinfo->min_mbuf_tailroom_req = 0;\n+}\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\nnew file mode 100644\nindex 0000000..05c2623\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n@@ -0,0 +1,24 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef _CNXK_CRYPTODEV_OPS_H_\n+#define _CNXK_CRYPTODEV_OPS_H_\n+\n+#include <rte_cryptodev.h>\n+\n+#define CNXK_CPT_MIN_HEADROOM_REQ 24\n+\n+int cnxk_cpt_dev_config(struct rte_cryptodev *dev,\n+\t\t\tstruct rte_cryptodev_config *conf);\n+\n+int cnxk_cpt_dev_start(struct rte_cryptodev *dev);\n+\n+void cnxk_cpt_dev_stop(struct rte_cryptodev *dev);\n+\n+int cnxk_cpt_dev_close(struct rte_cryptodev *dev);\n+\n+void cnxk_cpt_dev_info_get(struct rte_cryptodev *dev,\n+\t\t\t struct rte_cryptodev_info *info);\n+\n+#endif /* _CNXK_CRYPTODEV_OPS_H_ */\ndiff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build\nindex 4150ae6..74b7795 100644\n--- a/drivers/crypto/cnxk/meson.build\n+++ b/drivers/crypto/cnxk/meson.build\n@@ -14,6 +14,7 @@ sources = files(\n 'cn10k_cryptodev.c',\n 'cn10k_cryptodev_ops.c',\n 'cnxk_cryptodev.c',\n+ 'cnxk_cryptodev_ops.c',\n )\n \n deps += ['bus_pci', 'common_cnxk']\n", "prefixes": [ "v2", "03/20" ] }