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GET /api/patches/94826/?format=api
{ "id": 94826, "url": "https://patches.dpdk.org/api/patches/94826/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-3-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1624600591-29841-3-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1624600591-29841-3-git-send-email-anoobj@marvell.com", "date": "2021-06-25T05:56:13", "name": "[v2,02/20] crypto/cnxk: add probe and remove", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "eeb7cc9956f713fc909f88d2a0045da8c1bb81e2", "submitter": { "id": 1205, "url": "https://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624600591-29841-3-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 17483, "url": "https://patches.dpdk.org/api/series/17483/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17483", "date": "2021-06-25T05:56:11", "name": "Add Marvell CNXK crypto PMDs", "version": 2, "mbox": "https://patches.dpdk.org/series/17483/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94826/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94826/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9A592A0C40;\n\tFri, 25 Jun 2021 07:57:26 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 06E0C410DD;\n\tFri, 25 Jun 2021 07:57:19 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 6C8BA410D8\n for <dev@dpdk.org>; Fri, 25 Jun 2021 07:57:17 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15P5nxNQ007980; Thu, 24 Jun 2021 22:57:14 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 39d24dhjya-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 24 Jun 2021 22:57:14 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 24 Jun 2021 22:57:12 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 24 Jun 2021 22:57:12 -0700", "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id 9792B3F7041;\n Thu, 24 Jun 2021 22:57:09 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=PIxfHG1xxWjNs3wamoc9eZpzquIPOGQIkXqqvpEuflY=;\n b=ec7Z3lC7lvCRItHR2SdKm5nj87HofEvzOORqegmS6/QS8ITIaCyBSPZNkcfx9Ow+VLtW\n kBUaTGVPA/MCa9DDGw6qtrvSM7nvPdbrj1/GbnVkdWAxNwV0zuiegWnxwJ+sEpOLWKJ/\n BHo6PiRzKeOSPly52FmJ+53QfFGCs9sLxiQdat4qse6CAHNlZajoTOBBhXKP0OgHAfqp\n QgKnwSdtz/TjE0I40Wwz1xW77LKfvPBB7zblXBcn7jG/o4aGiV7I7PXpnf8IzcBGmNb4\n H9+VfhgtyuR/vT6K+FzLvdv1OvNXVjQ9+LXdp2OEhVj3Ea1TY+XT/tacF+17QWoBoBSp 2Q==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Ankur Dwivedi <adwivedi@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>, Anoob Joseph\n <anoobj@marvell.com>, Archana Muniganti <marchana@marvell.com>", "Date": "Fri, 25 Jun 2021 11:26:13 +0530", "Message-ID": "<1624600591-29841-3-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1624600591-29841-1-git-send-email-anoobj@marvell.com>", "References": "\n <http://patches.dpdk.org/project/dpdk/cover/1622652221-22732-1-git-send-email-anoobj@marvell.com/>\n <1624600591-29841-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "OS7ZMLpjKvix5C_mQk0jBVwLbQOSB6QA", "X-Proofpoint-ORIG-GUID": "OS7ZMLpjKvix5C_mQk0jBVwLbQOSB6QA", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-25_02:2021-06-24,\n 2021-06-25 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 02/20] crypto/cnxk: add probe and remove", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ankur Dwivedi <adwivedi@marvell.com>\n\nAdd probe & remove for cn9k & cn10k crypto PMDs.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>>\nSigned-off-by: Archana Muniganti <marchana@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev.c | 98 ++++++++++++++++++++++++++++++-\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 34 +++++++++++\n drivers/crypto/cnxk/cn10k_cryptodev_ops.h | 13 ++++\n drivers/crypto/cnxk/cn9k_cryptodev.c | 98 ++++++++++++++++++++++++++++++-\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 34 +++++++++++\n drivers/crypto/cnxk/cn9k_cryptodev_ops.h | 12 ++++\n drivers/crypto/cnxk/cnxk_cryptodev.c | 33 +++++++++++\n drivers/crypto/cnxk/cnxk_cryptodev.h | 21 +++++++\n drivers/crypto/cnxk/meson.build | 3 +\n 9 files changed, 342 insertions(+), 4 deletions(-)\n create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.h\n create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.h\n create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.c\n create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.h", "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c b/drivers/crypto/cnxk/cn10k_cryptodev.c\nindex 4d2140c..a66b777 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c\n@@ -11,6 +11,8 @@\n #include <rte_pci.h>\n \n #include \"cn10k_cryptodev.h\"\n+#include \"cn10k_cryptodev_ops.h\"\n+#include \"cnxk_cryptodev.h\"\n #include \"roc_api.h\"\n \n uint8_t cn10k_cryptodev_driver_id;\n@@ -26,11 +28,103 @@ static struct rte_pci_id pci_id_cpt_table[] = {\n \t},\n };\n \n+static int\n+cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n+\t\t struct rte_pci_device *pci_dev)\n+{\n+\tstruct rte_cryptodev_pmd_init_params init_params = {\n+\t\t.name = \"\",\n+\t\t.socket_id = rte_socket_id(),\n+\t\t.private_data_size = sizeof(struct cnxk_cpt_vf)\n+\t};\n+\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tstruct rte_cryptodev *dev;\n+\tstruct roc_cpt *roc_cpt;\n+\tstruct cnxk_cpt_vf *vf;\n+\tint rc;\n+\n+\trc = roc_plt_init();\n+\tif (rc < 0) {\n+\t\tplt_err(\"Failed to initialize platform model\");\n+\t\treturn rc;\n+\t}\n+\n+\trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n+\n+\tdev = rte_cryptodev_pmd_create(name, &pci_dev->device, &init_params);\n+\tif (dev == NULL) {\n+\t\trc = -ENODEV;\n+\t\tgoto exit;\n+\t}\n+\n+\t/* Get private data space allocated */\n+\tvf = dev->data->dev_private;\n+\n+\troc_cpt = &vf->cpt;\n+\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n+\t\troc_cpt->pci_dev = pci_dev;\n+\t\trc = roc_cpt_dev_init(roc_cpt);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to initialize roc cpt rc=%d\", rc);\n+\t\t\tgoto pmd_destroy;\n+\t\t}\n+\n+\t\trc = cnxk_cpt_eng_grp_add(roc_cpt);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to add engine group rc=%d\", rc);\n+\t\t\tgoto dev_fini;\n+\t\t}\n+\t}\n+\n+\tdev->dev_ops = &cn10k_cpt_ops;\n+\tdev->driver_id = cn10k_cryptodev_driver_id;\n+\n+\treturn 0;\n+\n+dev_fini:\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n+\t\troc_cpt_dev_fini(roc_cpt);\n+pmd_destroy:\n+\trte_cryptodev_pmd_destroy(dev);\n+exit:\n+\tplt_err(\"Could not create device (vendor_id: 0x%x device_id: 0x%x)\",\n+\t\tpci_dev->id.vendor_id, pci_dev->id.device_id);\n+\treturn rc;\n+}\n+\n+static int\n+cn10k_cpt_pci_remove(struct rte_pci_device *pci_dev)\n+{\n+\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tstruct rte_cryptodev *dev;\n+\tstruct cnxk_cpt_vf *vf;\n+\tint ret;\n+\n+\tif (pci_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n+\n+\tdev = rte_cryptodev_pmd_get_named_dev(name);\n+\tif (dev == NULL)\n+\t\treturn -ENODEV;\n+\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n+\t\tvf = dev->data->dev_private;\n+\t\tret = roc_cpt_dev_fini(&vf->cpt);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n+\treturn rte_cryptodev_pmd_destroy(dev);\n+}\n+\n static struct rte_pci_driver cn10k_cryptodev_pmd = {\n \t.id_table = pci_id_cpt_table,\n \t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,\n-\t.probe = NULL,\n-\t.remove = NULL,\n+\t.probe = cn10k_cpt_pci_probe,\n+\t.remove = cn10k_cpt_pci_remove,\n };\n \n static struct cryptodev_driver cn10k_cryptodev_drv;\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nnew file mode 100644\nindex 0000000..6f80f74\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -0,0 +1,34 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include <rte_cryptodev.h>\n+#include <rte_cryptodev_pmd.h>\n+\n+#include \"cn10k_cryptodev.h\"\n+#include \"cn10k_cryptodev_ops.h\"\n+\n+struct rte_cryptodev_ops cn10k_cpt_ops = {\n+\t/* Device control ops */\n+\t.dev_configure = NULL,\n+\t.dev_start = NULL,\n+\t.dev_stop = NULL,\n+\t.dev_close = NULL,\n+\t.dev_infos_get = NULL,\n+\n+\t.stats_get = NULL,\n+\t.stats_reset = NULL,\n+\t.queue_pair_setup = NULL,\n+\t.queue_pair_release = NULL,\n+\n+\t/* Symmetric crypto ops */\n+\t.sym_session_get_size = NULL,\n+\t.sym_session_configure = NULL,\n+\t.sym_session_clear = NULL,\n+\n+\t/* Asymmetric crypto ops */\n+\t.asym_session_get_size = NULL,\n+\t.asym_session_configure = NULL,\n+\t.asym_session_clear = NULL,\n+\n+};\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.h b/drivers/crypto/cnxk/cn10k_cryptodev_ops.h\nnew file mode 100644\nindex 0000000..24611bf\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.h\n@@ -0,0 +1,13 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef _CN10K_CRYPTODEV_OPS_H_\n+#define _CN10K_CRYPTODEV_OPS_H_\n+\n+#include <rte_cryptodev.h>\n+#include <rte_cryptodev_pmd.h>\n+\n+extern struct rte_cryptodev_ops cn10k_cpt_ops;\n+\n+#endif /* _CN10K_CRYPTODEV_OPS_H_ */\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c b/drivers/crypto/cnxk/cn9k_cryptodev.c\nindex 7654c53..46ad33f 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev.c\n@@ -11,6 +11,8 @@\n #include <rte_pci.h>\n \n #include \"cn9k_cryptodev.h\"\n+#include \"cn9k_cryptodev_ops.h\"\n+#include \"cnxk_cryptodev.h\"\n #include \"roc_api.h\"\n \n uint8_t cn9k_cryptodev_driver_id;\n@@ -24,11 +26,103 @@ static struct rte_pci_id pci_id_cpt_table[] = {\n \t},\n };\n \n+static int\n+cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n+\t\t struct rte_pci_device *pci_dev)\n+{\n+\tstruct rte_cryptodev_pmd_init_params init_params = {\n+\t\t.name = \"\",\n+\t\t.socket_id = rte_socket_id(),\n+\t\t.private_data_size = sizeof(struct cnxk_cpt_vf)\n+\t};\n+\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tstruct rte_cryptodev *dev;\n+\tstruct roc_cpt *roc_cpt;\n+\tstruct cnxk_cpt_vf *vf;\n+\tint rc;\n+\n+\trc = roc_plt_init();\n+\tif (rc < 0) {\n+\t\tplt_err(\"Failed to initialize platform model\");\n+\t\treturn rc;\n+\t}\n+\n+\trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n+\n+\tdev = rte_cryptodev_pmd_create(name, &pci_dev->device, &init_params);\n+\tif (dev == NULL) {\n+\t\trc = -ENODEV;\n+\t\tgoto exit;\n+\t}\n+\n+\t/* Get private data space allocated */\n+\tvf = dev->data->dev_private;\n+\n+\troc_cpt = &vf->cpt;\n+\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n+\t\troc_cpt->pci_dev = pci_dev;\n+\t\trc = roc_cpt_dev_init(roc_cpt);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to initialize roc cpt rc=%d\", rc);\n+\t\t\tgoto pmd_destroy;\n+\t\t}\n+\n+\t\trc = cnxk_cpt_eng_grp_add(roc_cpt);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to add engine group rc=%d\", rc);\n+\t\t\tgoto dev_fini;\n+\t\t}\n+\t}\n+\n+\tdev->dev_ops = &cn9k_cpt_ops;\n+\tdev->driver_id = cn9k_cryptodev_driver_id;\n+\n+\treturn 0;\n+\n+dev_fini:\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n+\t\troc_cpt_dev_fini(roc_cpt);\n+pmd_destroy:\n+\trte_cryptodev_pmd_destroy(dev);\n+exit:\n+\tplt_err(\"Could not create device (vendor_id: 0x%x device_id: 0x%x)\",\n+\t\tpci_dev->id.vendor_id, pci_dev->id.device_id);\n+\treturn rc;\n+}\n+\n+static int\n+cn9k_cpt_pci_remove(struct rte_pci_device *pci_dev)\n+{\n+\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tstruct rte_cryptodev *dev;\n+\tstruct cnxk_cpt_vf *vf;\n+\tint ret;\n+\n+\tif (pci_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n+\n+\tdev = rte_cryptodev_pmd_get_named_dev(name);\n+\tif (dev == NULL)\n+\t\treturn -ENODEV;\n+\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n+\t\tvf = dev->data->dev_private;\n+\t\tret = roc_cpt_dev_fini(&vf->cpt);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n+\treturn rte_cryptodev_pmd_destroy(dev);\n+}\n+\n static struct rte_pci_driver cn9k_cryptodev_pmd = {\n \t.id_table = pci_id_cpt_table,\n \t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,\n-\t.probe = NULL,\n-\t.remove = NULL,\n+\t.probe = cn9k_cpt_pci_probe,\n+\t.remove = cn9k_cpt_pci_remove,\n };\n \n static struct cryptodev_driver cn9k_cryptodev_drv;\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nnew file mode 100644\nindex 0000000..51f9845\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -0,0 +1,34 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include <rte_cryptodev.h>\n+#include <rte_cryptodev_pmd.h>\n+\n+#include \"cn9k_cryptodev.h\"\n+#include \"cn9k_cryptodev_ops.h\"\n+\n+struct rte_cryptodev_ops cn9k_cpt_ops = {\n+\t/* Device control ops */\n+\t.dev_configure = NULL,\n+\t.dev_start = NULL,\n+\t.dev_stop = NULL,\n+\t.dev_close = NULL,\n+\t.dev_infos_get = NULL,\n+\n+\t.stats_get = NULL,\n+\t.stats_reset = NULL,\n+\t.queue_pair_setup = NULL,\n+\t.queue_pair_release = NULL,\n+\n+\t/* Symmetric crypto ops */\n+\t.sym_session_get_size = NULL,\n+\t.sym_session_configure = NULL,\n+\t.sym_session_clear = NULL,\n+\n+\t/* Asymmetric crypto ops */\n+\t.asym_session_get_size = NULL,\n+\t.asym_session_configure = NULL,\n+\t.asym_session_clear = NULL,\n+\n+};\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.h b/drivers/crypto/cnxk/cn9k_cryptodev_ops.h\nnew file mode 100644\nindex 0000000..72fc297\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.h\n@@ -0,0 +1,12 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef _CN9K_CRYPTODEV_OPS_H_\n+#define _CN9K_CRYPTODEV_OPS_H_\n+\n+#include <rte_cryptodev_pmd.h>\n+\n+extern struct rte_cryptodev_ops cn9k_cpt_ops;\n+\n+#endif /* _CN9K_CRYPTODEV_OPS_H_ */\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev.c b/drivers/crypto/cnxk/cnxk_cryptodev.c\nnew file mode 100644\nindex 0000000..0ffe9d0\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev.c\n@@ -0,0 +1,33 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"roc_cpt.h\"\n+\n+#include \"cnxk_cryptodev.h\"\n+\n+int\n+cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt)\n+{\n+\tint ret;\n+\n+\tret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_SE);\n+\tif (ret < 0) {\n+\t\tplt_err(\"Could not add CPT SE engines\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_IE);\n+\tif (ret < 0) {\n+\t\tplt_err(\"Could not add CPT IE engines\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_AE);\n+\tif (ret < 0) {\n+\t\tplt_err(\"Could not add CPT AE engines\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h\nnew file mode 100644\nindex 0000000..5b84f0b\n--- /dev/null\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev.h\n@@ -0,0 +1,21 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef _CNXK_CRYPTODEV_H_\n+#define _CNXK_CRYPTODEV_H_\n+\n+#include <rte_cryptodev.h>\n+\n+#include \"roc_cpt.h\"\n+\n+/**\n+ * Device private data\n+ */\n+struct cnxk_cpt_vf {\n+\tstruct roc_cpt cpt;\n+};\n+\n+int cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt);\n+\n+#endif /* _CNXK_CRYPTODEV_H_ */\ndiff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build\nindex 197b94c..4150ae6 100644\n--- a/drivers/crypto/cnxk/meson.build\n+++ b/drivers/crypto/cnxk/meson.build\n@@ -10,7 +10,10 @@ endif\n \n sources = files(\n 'cn9k_cryptodev.c',\n+ 'cn9k_cryptodev_ops.c',\n 'cn10k_cryptodev.c',\n+ 'cn10k_cryptodev_ops.c',\n+ 'cnxk_cryptodev.c',\n )\n \n deps += ['bus_pci', 'common_cnxk']\n", "prefixes": [ "v2", "02/20" ] }