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GET /api/patches/94821/?format=api
{ "id": 94821, "url": "https://patches.dpdk.org/api/patches/94821/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624599410-29689-16-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1624599410-29689-16-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1624599410-29689-16-git-send-email-anoobj@marvell.com", "date": "2021-06-25T05:36:47", "name": "[v2,15/17] common/cnxk: add EC grp static vectors", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c0b0ef9f8ea50615037da22a3b2b4d4abbd7c32a", "submitter": { "id": 1205, "url": "https://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624599410-29689-16-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 17482, "url": "https://patches.dpdk.org/api/series/17482/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17482", "date": "2021-06-25T05:36:32", "name": "Add CPT in Marvell CNXK common driver", "version": 2, "mbox": "https://patches.dpdk.org/series/17482/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94821/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94821/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 53595A0C40;\n\tFri, 25 Jun 2021 07:38:55 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5F6F941102;\n\tFri, 25 Jun 2021 07:38:29 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 795D9410EA\n for <dev@dpdk.org>; Fri, 25 Jun 2021 07:38:28 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15P5Ze0a015880; Thu, 24 Jun 2021 22:38:27 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 39d241sg7u-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 24 Jun 2021 22:38:27 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 24 Jun 2021 22:38:25 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 24 Jun 2021 22:38:25 -0700", "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id 4354E3F7041;\n Thu, 24 Jun 2021 22:38:21 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=VF9UWo6C3GVBfNdBVZ1sbxf/X+IKHyj6MMG0bRMl1qA=;\n b=UYE1+o1M98EdYauaCYTVgMjRpUmbtnsekPFBsqZGI6uPMYrm9YVlO3Xwur9T+TlO6gzp\n 9Ge3uzmMa8Ixp6mK5bpl0Cjf0HGSuhIBqjvQB9hT7bf1IP8BYJZR7/ttMxkW4pPNkhJ3\n bKtspg/rkXMWfu3HDDToISP9NmWnMYD+eiwtfrMEDGqtdLV44g3iIlHdzGr1qrD1orBF\n snQC9Ei3DREOW2m8H0Y28p8rVwi7uRF5kIUmJF3Vl+UgNGsDU/eNXSGy3ZC3/P+KHRkx\n /7EBdVj5uqZibuL+iVZ55bJQ+nS35fJ3LYm3ZmGa/hCQpVlN2VGlXkQkDcnkUYP/jvks DQ==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Kiran Kumar Kokkilagadda <kirankumark@marvell.com>, Jerin Jacob\n <jerinj@marvell.com>, Ankur Dwivedi <adwivedi@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, <dev@dpdk.org>, Anoob Joseph <anoobj@marvell.com>", "Date": "Fri, 25 Jun 2021 11:06:47 +0530", "Message-ID": "<1624599410-29689-16-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1624599410-29689-1-git-send-email-anoobj@marvell.com>", "References": "\n <patches.dpdk.org/project/dpdk/patch/1622649385-22652-1-git-send-email-anoobj@marvell.com/>\n <1624599410-29689-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "BWa8z9UjUCiV5F4pZf7ASeUvojznJD9f", "X-Proofpoint-ORIG-GUID": "BWa8z9UjUCiV5F4pZf7ASeUvojznJD9f", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-25_01:2021-06-24,\n 2021-06-25 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 15/17] common/cnxk: add EC grp static vectors", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>\n\nEC group static vectors are required for CPT asymmetric operations.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>\n---\n drivers/common/cnxk/meson.build | 1 +\n drivers/common/cnxk/roc_ae.c | 142 ++++++++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_ae.h | 7 ++\n drivers/common/cnxk/version.map | 2 +\n 4 files changed, 152 insertions(+)\n create mode 100644 drivers/common/cnxk/roc_ae.c", "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex 181b58e..4c5d318 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -11,6 +11,7 @@ endif\n config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'\n deps = ['eal', 'pci', 'bus_pci', 'mbuf']\n sources = files(\n+ 'roc_ae.c',\n 'roc_ae_fpm_tables.c',\n 'roc_cpt.c',\n 'roc_cpt_debug.c',\ndiff --git a/drivers/common/cnxk/roc_ae.c b/drivers/common/cnxk/roc_ae.c\nnew file mode 100644\nindex 0000000..cf3f7fc\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_ae.c\n@@ -0,0 +1,142 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"roc_api.h\"\n+\n+#define AE_EC_GRP_TBL_NAME \"ae_ec_grp_tbl\"\n+\n+struct ae_ec_grp_tbl {\n+\tuint64_t refcount;\n+\tuint8_t ec_grp_tbl[];\n+};\n+\n+const struct roc_ae_ec_group ae_ec_grp[ROC_AE_EC_ID_PMAX] = {\n+\t{\n+\t\t.prime = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF},\n+\t\t\t .length = 24},\n+\t\t.order = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t 0x99, 0xDE, 0xF8, 0x36, 0x14, 0x6B,\n+\t\t\t\t 0xC9, 0xB1, 0xB4, 0xD2, 0x28, 0x31},\n+\t\t\t .length = 24},\n+\t},\n+\t{\n+\t\t.prime = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t\t\t 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01},\n+\t\t\t .length = 28},\n+\t\t.order = {.data = {0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF,\n+\t\t\t\t 0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF, 0XFF,\n+\t\t\t\t 0X16, 0XA2, 0XE0, 0XB8, 0XF0, 0X3E, 0X13,\n+\t\t\t\t 0XDD, 0X29, 0X45, 0X5C, 0X5C, 0X2A, 0X3D},\n+\t\t\t .length = 28},\n+\t},\n+\t{\n+\t\t.prime = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00,\n+\t\t\t\t 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\n+\t\t\t\t 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0xFF, 0xFF},\n+\t\t\t .length = 32},\n+\t\t.order = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00,\n+\t\t\t\t 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t\t 0xFF, 0xFF, 0xBC, 0xE6, 0xFA, 0xAD, 0xA7,\n+\t\t\t\t 0x17, 0x9E, 0x84, 0xF3, 0xB9, 0xCA, 0xC2,\n+\t\t\t\t 0xFC, 0x63, 0x25, 0x51},\n+\t\t\t .length = 32},\n+\t},\n+\t{.prime = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,\n+\t\t\t 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF},\n+\t\t .length = 48},\n+\t .order = {.data = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xC7, 0x63, 0x4D, 0x81, 0xF4, 0x37, 0x2D, 0xDF,\n+\t\t\t 0x58, 0x1A, 0x0D, 0xB2, 0x48, 0xB0, 0xA7, 0x7A,\n+\t\t\t 0xEC, 0xEC, 0x19, 0x6A, 0xCC, 0xC5, 0x29, 0x73},\n+\t\t .length = 48}},\n+\t{.prime = {.data = {0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF},\n+\t\t .length = 66},\n+\t .order = {.data = {0x01, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t\t 0xFF, 0xFA, 0x51, 0x86, 0x87, 0x83, 0xBF, 0x2F,\n+\t\t\t 0x96, 0x6B, 0x7F, 0xCC, 0x01, 0x48, 0xF7, 0x09,\n+\t\t\t 0xA5, 0xD0, 0x3B, 0xB5, 0xC9, 0xB8, 0x89, 0x9C,\n+\t\t\t 0x47, 0xAE, 0xBB, 0x6F, 0xB7, 0x1E, 0x91, 0x38,\n+\t\t\t 0x64, 0x09},\n+\t\t .length = 66}}};\n+\n+int\n+roc_ae_ec_grp_get(struct roc_ae_ec_group **tbl)\n+{\n+\tconst char name[] = AE_EC_GRP_TBL_NAME;\n+\tstruct ae_ec_grp_tbl *ec_grp;\n+\tconst struct plt_memzone *mz;\n+\tint i, len = 0;\n+\tuint8_t *data;\n+\n+\tif (tbl == NULL)\n+\t\treturn -EINVAL;\n+\n+\tlen = sizeof(ae_ec_grp);\n+\n+\tmz = plt_memzone_lookup(name);\n+\tif (mz == NULL) {\n+\t\t/* Create memzone first time */\n+\t\tmz = plt_memzone_reserve_cache_align(\n+\t\t\tname, len + sizeof(struct ae_ec_grp_tbl));\n+\t\tif (mz == NULL)\n+\t\t\treturn -ENOMEM;\n+\t}\n+\n+\tec_grp = mz->addr;\n+\n+\tif (__atomic_fetch_add(&ec_grp->refcount, 1, __ATOMIC_SEQ_CST) != 0)\n+\t\treturn 0;\n+\n+\tdata = PLT_PTR_ADD(mz->addr, sizeof(uint64_t));\n+\n+\tfor (i = 0; i < ROC_AE_EC_ID_PMAX; i++) {\n+\t\tmemcpy(data, &ae_ec_grp[i], sizeof(struct roc_ae_ec_group));\n+\t\ttbl[i] = (struct roc_ae_ec_group *)data;\n+\t\tdata += sizeof(struct roc_ae_ec_group);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void\n+roc_ae_ec_grp_put(void)\n+{\n+\tconst char name[] = AE_EC_GRP_TBL_NAME;\n+\tconst struct plt_memzone *mz;\n+\tstruct ae_ec_grp_tbl *ec_grp;\n+\n+\tmz = plt_memzone_lookup(name);\n+\tif (mz == NULL)\n+\t\treturn;\n+\n+\tec_grp = mz->addr;\n+\t/* Decrement number of devices using EC grp table */\n+\tif (__atomic_sub_fetch(&ec_grp->refcount, 1, __ATOMIC_SEQ_CST) == 0)\n+\t\tplt_memzone_free(mz);\n+}\ndiff --git a/drivers/common/cnxk/roc_ae.h b/drivers/common/cnxk/roc_ae.h\nindex c549e18..5072cc5 100644\n--- a/drivers/common/cnxk/roc_ae.h\n+++ b/drivers/common/cnxk/roc_ae.h\n@@ -53,4 +53,11 @@ struct roc_ae_ec_ctx {\n \tuint8_t curveid;\n };\n \n+/* Buffer pointer */\n+struct roc_ae_buf_ptr {\n+\tvoid *vaddr;\n+};\n+\n+int __roc_api roc_ae_ec_grp_get(struct roc_ae_ec_group **tbl);\n+void __roc_api roc_ae_ec_grp_put(void);\n #endif /* __ROC_AE_H__ */\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 7a3b4a6..9611217 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -10,6 +10,8 @@ INTERNAL {\n \tcnxk_logtype_sso;\n \tcnxk_logtype_tim;\n \tcnxk_logtype_tm;\n+\troc_ae_ec_grp_get;\n+\troc_ae_ec_grp_put;\n \troc_ae_fpm_get;\n \troc_ae_fpm_put;\n \troc_clk_freq_get;\n", "prefixes": [ "v2", "15/17" ] }