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GET /api/patches/94818/?format=api
{ "id": 94818, "url": "https://patches.dpdk.org/api/patches/94818/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624599410-29689-13-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1624599410-29689-13-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1624599410-29689-13-git-send-email-anoobj@marvell.com", "date": "2021-06-25T05:36:44", "name": "[v2,12/17] common/cnxk: add AE microcode defines", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "db3f5e730e7be256698d7804f0f6eadbb6890422", "submitter": { "id": 1205, "url": "https://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624599410-29689-13-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 17482, "url": "https://patches.dpdk.org/api/series/17482/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17482", "date": "2021-06-25T05:36:32", "name": "Add CPT in Marvell CNXK common driver", "version": 2, "mbox": "https://patches.dpdk.org/series/17482/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94818/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94818/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 78260A0C40;\n\tFri, 25 Jun 2021 07:38:33 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 95CED40E25;\n\tFri, 25 Jun 2021 07:38:14 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id A0BCD40698\n for <dev@dpdk.org>; Fri, 25 Jun 2021 07:38:12 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15P5ab9f018611; Thu, 24 Jun 2021 22:38:11 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 39d24dhh60-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 24 Jun 2021 22:38:11 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 24 Jun 2021 22:38:10 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 24 Jun 2021 22:38:10 -0700", "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id 077C73F706F;\n Thu, 24 Jun 2021 22:38:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=R6wgRFBMVl3nV9xn/KhpRg7CsbfNsOu8ryQI5lsaEhA=;\n b=c0rU2ZTjZ4/vYkCX60qHfpgChmA/Yf/knVMZUBaawrdDFDi1j9gBAfjg4ywda3SkJ9ip\n 0aXvCk4x70C9TZOtp3hdkAMYveDTlBPw3/JIBHVae0fZXeKzmiF+e6F5/aPGDyvS/ybZ\n KM49c6FaHoKGeTqXq1vD3D10HAb4+VQDcyMtOYArz38SCm9qQqBCp1fWESNmw1jzkdgN\n 7JMpU8qaH/jym92zre13OY2O+Qt9eKkHJhEEoTdwTDrm3HW9k9v5gxzU3W4/nQ85ldqB\n TrYMnvs3n3lzmD2ICGlMaX5xoGYavRy1tZMbk41MFmYko/kjcXj1x1gEZtuB+o2A62x0 Eg==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Kiran Kumar Kokkilagadda <kirankumark@marvell.com>, Jerin Jacob\n <jerinj@marvell.com>, Ankur Dwivedi <adwivedi@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, <dev@dpdk.org>, Anoob Joseph <anoobj@marvell.com>", "Date": "Fri, 25 Jun 2021 11:06:44 +0530", "Message-ID": "<1624599410-29689-13-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1624599410-29689-1-git-send-email-anoobj@marvell.com>", "References": "\n <patches.dpdk.org/project/dpdk/patch/1622649385-22652-1-git-send-email-anoobj@marvell.com/>\n <1624599410-29689-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "OAOS0skSDAoSj02MhJFW9gxI473vmmw9", "X-Proofpoint-ORIG-GUID": "OAOS0skSDAoSj02MhJFW9gxI473vmmw9", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-25_01:2021-06-24,\n 2021-06-25 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 12/17] common/cnxk: add AE microcode defines", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>\n\nMicrocode AE opcodes support asymmetric operations. Add defines\nand structs defined by microcode.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>\n\n---\n drivers/common/cnxk/roc_ae.h | 56 +++++++++++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_api.h | 1 +\n drivers/common/cnxk/roc_cpt.h | 3 +++\n 3 files changed, 60 insertions(+)\n create mode 100644 drivers/common/cnxk/roc_ae.h", "diff": "diff --git a/drivers/common/cnxk/roc_ae.h b/drivers/common/cnxk/roc_ae.h\nnew file mode 100644\nindex 0000000..c549e18\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_ae.h\n@@ -0,0 +1,56 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef __ROC_AE_H__\n+#define __ROC_AE_H__\n+\n+/* AE opcodes */\n+#define ROC_AE_MAJOR_OP_MODEX\t 0x03\n+#define ROC_AE_MAJOR_OP_ECDSA\t 0x04\n+#define ROC_AE_MAJOR_OP_ECC\t 0x05\n+#define ROC_AE_MINOR_OP_MODEX\t 0x01\n+#define ROC_AE_MINOR_OP_PKCS_ENC 0x02\n+#define ROC_AE_MINOR_OP_PKCS_ENC_CRT 0x03\n+#define ROC_AE_MINOR_OP_PKCS_DEC 0x04\n+#define ROC_AE_MINOR_OP_PKCS_DEC_CRT 0x05\n+#define ROC_AE_MINOR_OP_MODEX_CRT 0x06\n+#define ROC_AE_MINOR_OP_ECDSA_SIGN 0x01\n+#define ROC_AE_MINOR_OP_ECDSA_VERIFY 0x02\n+#define ROC_AE_MINOR_OP_ECC_UMP\t 0x03\n+\n+/**\n+ * Enumeration roc_ae_ec_id\n+ *\n+ * Enumerates supported elliptic curves\n+ */\n+typedef enum {\n+\tROC_AE_EC_ID_P192 = 0,\n+\tROC_AE_EC_ID_P224 = 1,\n+\tROC_AE_EC_ID_P256 = 2,\n+\tROC_AE_EC_ID_P384 = 3,\n+\tROC_AE_EC_ID_P521 = 4,\n+\tROC_AE_EC_ID_PMAX = 5\n+} roc_ae_ec_id;\n+\n+/* Prime and order fields of built-in elliptic curves */\n+struct roc_ae_ec_group {\n+\tstruct {\n+\t\t/* P521 maximum length */\n+\t\tuint8_t data[66];\n+\t\tunsigned int length;\n+\t} prime;\n+\n+\tstruct {\n+\t\t/* P521 maximum length */\n+\t\tuint8_t data[66];\n+\t\tunsigned int length;\n+\t} order;\n+};\n+\n+struct roc_ae_ec_ctx {\n+\t/* Prime length defined by microcode for EC operations */\n+\tuint8_t curveid;\n+};\n+\n+#endif /* __ROC_AE_H__ */\ndiff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h\nindex d545bb9..546818d 100644\n--- a/drivers/common/cnxk/roc_api.h\n+++ b/drivers/common/cnxk/roc_api.h\n@@ -110,6 +110,7 @@\n #include \"roc_cpt.h\"\n \n /* CPT microcode */\n+#include \"roc_ae.h\"\n #include \"roc_ie_on.h\"\n #include \"roc_ie_ot.h\"\n #include \"roc_se.h\"\ndiff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h\nindex cb2838e..5577fea 100644\n--- a/drivers/common/cnxk/roc_cpt.h\n+++ b/drivers/common/cnxk/roc_cpt.h\n@@ -7,6 +7,9 @@\n \n #include \"roc_api.h\"\n \n+#define ROC_AE_CPT_BLOCK_TYPE1 0\n+#define ROC_AE_CPT_BLOCK_TYPE2 1\n+\n /* Default engine groups */\n #define ROC_CPT_DFLT_ENG_GRP_SE\t 0UL\n #define ROC_CPT_DFLT_ENG_GRP_SE_IE 1UL\n", "prefixes": [ "v2", "12/17" ] }