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GET /api/patches/94815/?format=api
{ "id": 94815, "url": "https://patches.dpdk.org/api/patches/94815/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1624599410-29689-10-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1624599410-29689-10-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1624599410-29689-10-git-send-email-anoobj@marvell.com", "date": "2021-06-25T05:36:41", "name": "[v2,09/17] common/cnxk: add inline IPsec configuration mbox", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ad4c373a20ca70087c2a80c1e514e0808e533602", "submitter": { "id": 1205, "url": "https://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1624599410-29689-10-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 17482, "url": "https://patches.dpdk.org/api/series/17482/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17482", "date": "2021-06-25T05:36:32", "name": "Add CPT in Marvell CNXK common driver", "version": 2, "mbox": "https://patches.dpdk.org/series/17482/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94815/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94815/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 860C6A0C40;\n\tFri, 25 Jun 2021 07:38:11 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 87354410EC;\n\tFri, 25 Jun 2021 07:37:59 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 8E92C40E78\n for <dev@dpdk.org>; Fri, 25 Jun 2021 07:37:56 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15P5a2Vw018421; Thu, 24 Jun 2021 22:37:55 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 39d24dhh4v-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 24 Jun 2021 22:37:55 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Thu, 24 Jun 2021 22:37:54 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 24 Jun 2021 22:37:53 -0700", "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id 138143F7041;\n Thu, 24 Jun 2021 22:37:50 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=39fQE2mrHTPXpcaj9ogQG4JKohpkM8hGr89yEY/Raps=;\n b=gS2Q+8hVPm49HfbMl9DIPk8lZ/siTMm0HrYj/fcCSjDgfchk3gkeWvtzVfXDi6OmTcwT\n /VVSwQE/nqA5fHl2O8rzrRg2K+AMEy/Rh+hizqmqfL6/P8PVmRjWh+TMS4seFSIB+gWC\n 8qgyMUw2xVvr5IzgDtPrPHY8uhVZFmBJZX+jCJjY8VAkZ4CBnhgfkyzkaCLc4SEWwBvR\n bkl6f0fY6x7ipZvN3BgxK6j+6nIBEvkOXDT7zc7XFYvZPBA4HtcP7ZZAWD0Ot6aPHAwY\n 0nCMMmElfaHh7ifHcSEHueeq9DgOSmBLQ5SR+C+Wu+xW/JTXmJfWAB54DOZPSy6CKyeT Ew==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Vidya Sagar Velumuri <vvelumuri@marvell.com>, Jerin Jacob\n <jerinj@marvell.com>, Ankur Dwivedi <adwivedi@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, <dev@dpdk.org>", "Date": "Fri, 25 Jun 2021 11:06:41 +0530", "Message-ID": "<1624599410-29689-10-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1624599410-29689-1-git-send-email-anoobj@marvell.com>", "References": "\n <patches.dpdk.org/project/dpdk/patch/1622649385-22652-1-git-send-email-anoobj@marvell.com/>\n <1624599410-29689-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "zPtEjgn01tHeSzTNJDOS7X6Jrwm7L8oK", "X-Proofpoint-ORIG-GUID": "zPtEjgn01tHeSzTNJDOS7X6Jrwm7L8oK", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-25_01:2021-06-24,\n 2021-06-25 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 09/17] common/cnxk: add inline IPsec\n configuration mbox", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n\nAdd mbox to configure inbound & outbound inline IPsec.\n\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n---\n drivers/common/cnxk/roc_cpt.c | 61 ++++++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_cpt.h | 5 ++++\n drivers/common/cnxk/roc_cpt_priv.h | 2 ++\n drivers/common/cnxk/version.map | 2 ++\n 4 files changed, 70 insertions(+)", "diff": "diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c\nindex fd92de3..81e8b15 100644\n--- a/drivers/common/cnxk/roc_cpt.c\n+++ b/drivers/common/cnxk/roc_cpt.c\n@@ -217,6 +217,67 @@ cpt_lf_dump(struct roc_cpt_lf *lf)\n }\n \n int\n+cpt_lf_outb_cfg(struct dev *dev, uint16_t sso_pf_func, uint16_t nix_pf_func,\n+\t\tuint8_t lf_id, bool ena)\n+{\n+\tstruct cpt_inline_ipsec_cfg_msg *req;\n+\tstruct mbox *mbox = dev->mbox;\n+\n+\treq = mbox_alloc_msg_cpt_inline_ipsec_cfg(mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\n+\treq->dir = CPT_INLINE_OUTBOUND;\n+\treq->slot = lf_id;\n+\tif (ena) {\n+\t\treq->enable = 1;\n+\t\treq->sso_pf_func = sso_pf_func;\n+\t\treq->nix_pf_func = nix_pf_func;\n+\t} else {\n+\t\treq->enable = 0;\n+\t}\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n+roc_cpt_inline_ipsec_cfg(struct dev *cpt_dev, uint8_t lf_id,\n+\t\t\t struct roc_nix *roc_nix)\n+{\n+\tbool ena = roc_nix ? true : false;\n+\tuint16_t nix_pf_func = 0;\n+\tuint16_t sso_pf_func = 0;\n+\n+\tif (ena) {\n+\t\tnix_pf_func = roc_nix_get_pf_func(roc_nix);\n+\t\tsso_pf_func = idev_sso_pffunc_get();\n+\t}\n+\n+\treturn cpt_lf_outb_cfg(cpt_dev, sso_pf_func, nix_pf_func, lf_id, ena);\n+}\n+\n+int\n+roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1,\n+\t\t\t uint16_t param2)\n+{\n+\tstruct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);\n+\tstruct cpt_rx_inline_lf_cfg_msg *req;\n+\tstruct mbox *mbox;\n+\n+\tmbox = cpt->dev.mbox;\n+\n+\treq = mbox_alloc_msg_cpt_rx_inline_lf_cfg(mbox);\n+\tif (req == NULL)\n+\t\treturn -ENOSPC;\n+\n+\treq->sso_pf_func = idev_sso_pffunc_get();\n+\treq->param1 = param1;\n+\treq->param2 = param2;\n+\n+\treturn mbox_process(mbox);\n+}\n+\n+int\n roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg)\n {\n \tstruct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);\ndiff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h\nindex 022c8ad..83ef5c7 100644\n--- a/drivers/common/cnxk/roc_cpt.h\n+++ b/drivers/common/cnxk/roc_cpt.h\n@@ -29,6 +29,7 @@ struct roc_cpt_lf {\n \tuint64_t *fc_addr;\n \tuint64_t io_addr;\n \tuint8_t *iq_vaddr;\n+\tstruct roc_nix *inl_outb_nix;\n } __plt_cache_aligned;\n \n struct roc_cpt {\n@@ -64,6 +65,10 @@ void __roc_api roc_cpt_dev_clear(struct roc_cpt *roc_cpt);\n int __roc_api roc_cpt_lf_init(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf);\n void __roc_api roc_cpt_lf_fini(struct roc_cpt_lf *lf);\n int __roc_api roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, uint64_t cptr);\n+int __roc_api roc_cpt_inline_ipsec_cfg(struct dev *dev, uint8_t slot,\n+\t\t\t\t struct roc_nix *nix);\n+int __roc_api roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt,\n+\t\t\t\t\t uint16_t param1, uint16_t param2);\n int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt);\n int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt);\n void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf);\ndiff --git a/drivers/common/cnxk/roc_cpt_priv.h b/drivers/common/cnxk/roc_cpt_priv.h\nindex 6cfa4df..0880ec0 100644\n--- a/drivers/common/cnxk/roc_cpt_priv.h\n+++ b/drivers/common/cnxk/roc_cpt_priv.h\n@@ -33,6 +33,8 @@ int cpt_lfs_free(struct dev *dev);\n int cpt_lf_init(struct roc_cpt_lf *lf);\n void cpt_lf_fini(struct roc_cpt_lf *lf);\n \n+int cpt_lf_outb_cfg(struct dev *dev, uint16_t sso_pf_func, uint16_t nix_pf_func,\n+\t\t uint8_t lf_id, bool ena);\n int cpt_get_msix_offset(struct dev *dev, struct msix_offset_rsp **msix_rsp);\n uint64_t cpt_get_blkaddr(struct dev *dev);\n \ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 0827b77..59d7d91 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -17,6 +17,8 @@ INTERNAL {\n \troc_cpt_dev_fini;\n \troc_cpt_dev_init;\n \troc_cpt_eng_grp_add;\n+\troc_cpt_inline_ipsec_cfg;\n+\troc_cpt_inline_ipsec_inb_cfg;\n \troc_cpt_iq_disable;\n \troc_cpt_lf_ctx_flush;\n \troc_cpt_lf_init;\n", "prefixes": [ "v2", "09/17" ] }