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GET /api/patches/94756/?format=api
{ "id": 94756, "url": "https://patches.dpdk.org/api/patches/94756/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-61-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210623044702.4240-61-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210623044702.4240-61-ndabilpuram@marvell.com", "date": "2021-06-23T04:47:00", "name": "[v4,60/62] net/cnxk: added RETA and RSS hash operations", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "effe7c57a84c340394bd6f595734d075187b0156", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-61-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 17449, "url": "https://patches.dpdk.org/api/series/17449/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17449", "date": "2021-06-23T04:46:00", "name": "Marvell CNXK Ethdev Driver", "version": 4, "mbox": "https://patches.dpdk.org/series/17449/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94756/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94756/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1B031A0C41;\n\tWed, 23 Jun 2021 06:53:52 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BB0A24111C;\n\tWed, 23 Jun 2021 06:50:36 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id DD0E14111A\n for <dev@dpdk.org>; Wed, 23 Jun 2021 06:50:34 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15N4k7nw025556 for <dev@dpdk.org>; Tue, 22 Jun 2021 21:50:33 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 39bptj1gx8-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 22 Jun 2021 21:50:33 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 22 Jun 2021 21:50:31 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 22 Jun 2021 21:50:31 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id B276B5B693E;\n Tue, 22 Jun 2021 21:50:28 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=RrM5xbsPRngvgu7IFOgJJeOunb61vEClrZwfobEa50Q=;\n b=BWGJaBL1EYrMe4F53raLAzYIgPDeiFPk892af7w3tsSgjRfXnsWxqgxtzneFENmwtyDK\n tCzpZBpox7jPg04wo9B18/Xct+filSgzjHI71LZmZkIt42OeFWnlY985Q4NXfUl7FmVU\n lxrfU/iOTOn9M7iF7ohRxNumRTOGQsX5bc1LOv4/3oMpRHbl3GVqp+4G/oIyyHgb2MNy\n 2f82jYm/7OaYam3Wqm85K4fr3da7i4VF7B3ATOPqZB49Loyl3ZgrqR1Xq91t+wxvQcwm\n o0upy52BKcVO7DP07q5NPV3nCGWOZCBDu2TcCFXgyiVfISNdD1vJzX+MPKw53+dATevc QQ==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, <hkalra@marvell.com>", "Date": "Wed, 23 Jun 2021 10:17:00 +0530", "Message-ID": "<20210623044702.4240-61-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210623044702.4240-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210623044702.4240-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "0zA3lCaLNYUpQqdlDfU5TWLyPdj0MFfn", "X-Proofpoint-GUID": "0zA3lCaLNYUpQqdlDfU5TWLyPdj0MFfn", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-23_01:2021-06-22,\n 2021-06-23 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 60/62] net/cnxk: added RETA and RSS hash\n operations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Satha Rao <skoteshwar@marvell.com>\n\nThis patch will implement RETA and RSS hash apis. Also added\ndevice argument to lock rx context.\n\nSigned-off-by: Satha Rao <skoteshwar@marvell.com>\n---\n doc/guides/nics/features/cnxk.ini | 2 +\n doc/guides/nics/features/cnxk_vec.ini | 2 +\n doc/guides/nics/features/cnxk_vf.ini | 2 +\n drivers/net/cnxk/cnxk_ethdev.c | 4 ++\n drivers/net/cnxk/cnxk_ethdev.h | 10 +++\n drivers/net/cnxk/cnxk_ethdev_devargs.c | 4 ++\n drivers/net/cnxk/cnxk_ethdev_ops.c | 121 +++++++++++++++++++++++++++++++++\n 7 files changed, 145 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 5874531..9945af9 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -23,6 +23,8 @@ Promiscuous mode = Y\n Allmulticast mode = Y\n Unicast MAC filter = Y\n RSS hash = Y\n+RSS key update = Y\n+RSS reta update = Y\n Inner RSS = Y\n Flow control = Y\n Jumbo frame = Y\ndiff --git a/doc/guides/nics/features/cnxk_vec.ini b/doc/guides/nics/features/cnxk_vec.ini\nindex 4871fac..77d63c4 100644\n--- a/doc/guides/nics/features/cnxk_vec.ini\n+++ b/doc/guides/nics/features/cnxk_vec.ini\n@@ -22,6 +22,8 @@ Promiscuous mode = Y\n Allmulticast mode = Y\n Unicast MAC filter = Y\n RSS hash = Y\n+RSS key update = Y\n+RSS reta update = Y\n Inner RSS = Y\n Flow control = Y\n Jumbo frame = Y\ndiff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini\nindex 81ee7cc..59acfdb 100644\n--- a/doc/guides/nics/features/cnxk_vf.ini\n+++ b/doc/guides/nics/features/cnxk_vf.ini\n@@ -19,6 +19,8 @@ Queue start/stop = Y\n MTU update = Y\n TSO = Y\n RSS hash = Y\n+RSS key update = Y\n+RSS reta update = Y\n Inner RSS = Y\n Jumbo frame = Y\n Scattered Rx = Y\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex b2a8f3a..abd9bf1 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -1266,6 +1266,10 @@ struct eth_dev_ops cnxk_eth_dev_ops = {\n \t.timesync_write_time = cnxk_nix_timesync_write_time,\n \t.timesync_adjust_time = cnxk_nix_timesync_adjust_time,\n \t.read_clock = cnxk_nix_read_clock,\n+\t.reta_update = cnxk_nix_reta_update,\n+\t.reta_query = cnxk_nix_reta_query,\n+\t.rss_hash_update = cnxk_nix_rss_hash_update,\n+\t.rss_hash_conf_get = cnxk_nix_rss_hash_conf_get,\n };\n \n static int\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex fa6f16f..cd08e3a 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -330,6 +330,16 @@ uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev);\n /* RSS */\n uint32_t cnxk_rss_ethdev_to_nix(struct cnxk_eth_dev *dev, uint64_t ethdev_rss,\n \t\t\t\tuint8_t rss_level);\n+int cnxk_nix_reta_update(struct rte_eth_dev *eth_dev,\n+\t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size);\n+int cnxk_nix_reta_query(struct rte_eth_dev *eth_dev,\n+\t\t\tstruct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\tuint16_t reta_size);\n+int cnxk_nix_rss_hash_update(struct rte_eth_dev *eth_dev,\n+\t\t\t struct rte_eth_rss_conf *rss_conf);\n+int cnxk_nix_rss_hash_conf_get(struct rte_eth_dev *eth_dev,\n+\t\t\t struct rte_eth_rss_conf *rss_conf);\n \n /* Link */\n void cnxk_nix_toggle_flag_link_cfg(struct cnxk_eth_dev *dev, bool set);\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c b/drivers/net/cnxk/cnxk_ethdev_devargs.c\nindex 7fd06eb..c76b628 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c\n@@ -109,6 +109,7 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)\n #define CNXK_FLOW_MAX_PRIORITY\t\"flow_max_priority\"\n #define CNXK_SWITCH_HEADER_TYPE \"switch_header\"\n #define CNXK_RSS_TAG_AS_XOR\t\"tag_as_xor\"\n+#define CNXK_LOCK_RX_CTX\t\"lock_rx_ctx\"\n \n int\n cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n@@ -120,6 +121,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \tuint16_t flow_max_priority = 3;\n \tuint16_t rss_tag_as_xor = 0;\n \tuint16_t scalar_enable = 0;\n+\tuint8_t lock_rx_ctx = 0;\n \tstruct rte_kvargs *kvlist;\n \n \tif (devargs == NULL)\n@@ -143,6 +145,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \t\t\t &parse_switch_header_type, &switch_header_type);\n \trte_kvargs_process(kvlist, CNXK_RSS_TAG_AS_XOR, &parse_flag,\n \t\t\t &rss_tag_as_xor);\n+\trte_kvargs_process(kvlist, CNXK_LOCK_RX_CTX, &parse_flag, &lock_rx_ctx);\n \trte_kvargs_free(kvlist);\n \n null_devargs:\n@@ -150,6 +153,7 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \tdev->nix.rss_tag_as_xor = !!rss_tag_as_xor;\n \tdev->nix.max_sqb_count = sqb_count;\n \tdev->nix.reta_sz = reta_sz;\n+\tdev->nix.lock_rx_ctx = lock_rx_ctx;\n \tdev->npc.flow_prealloc_size = flow_prealloc_size;\n \tdev->npc.flow_max_priority = flow_max_priority;\n \tdev->npc.switch_header_type = switch_header_type;\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c\nindex 91de6b7..d257763 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_ops.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c\n@@ -724,3 +724,124 @@ cnxk_nix_dev_get_reg(struct rte_eth_dev *eth_dev, struct rte_dev_reg_info *regs)\n \n \treturn rc;\n }\n+\n+int\n+cnxk_nix_reta_update(struct rte_eth_dev *eth_dev,\n+\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t uint16_t reta_size)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tuint16_t reta[ROC_NIX_RSS_RETA_MAX];\n+\tstruct roc_nix *nix = &dev->nix;\n+\tint i, j, rc = -EINVAL, idx = 0;\n+\n+\tif (reta_size != dev->nix.reta_sz) {\n+\t\tplt_err(\"Size of hash lookup table configured (%d) does not \"\n+\t\t\t\"match the number hardware can supported (%d)\",\n+\t\t\treta_size, dev->nix.reta_sz);\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Copy RETA table */\n+\tfor (i = 0; i < (int)(dev->nix.reta_sz / RTE_RETA_GROUP_SIZE); i++) {\n+\t\tfor (j = 0; j < RTE_RETA_GROUP_SIZE; j++) {\n+\t\t\tif ((reta_conf[i].mask >> j) & 0x01)\n+\t\t\t\treta[idx] = reta_conf[i].reta[j];\n+\t\t\tidx++;\n+\t\t}\n+\t}\n+\n+\treturn roc_nix_rss_reta_set(nix, 0, reta);\n+\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_nix_reta_query(struct rte_eth_dev *eth_dev,\n+\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t uint16_t reta_size)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tuint16_t reta[ROC_NIX_RSS_RETA_MAX];\n+\tstruct roc_nix *nix = &dev->nix;\n+\tint rc = -EINVAL, i, j, idx = 0;\n+\n+\tif (reta_size != dev->nix.reta_sz) {\n+\t\tplt_err(\"Size of hash lookup table configured (%d) does not \"\n+\t\t\t\"match the number hardware can supported (%d)\",\n+\t\t\treta_size, dev->nix.reta_sz);\n+\t\tgoto fail;\n+\t}\n+\n+\trc = roc_nix_rss_reta_get(nix, 0, reta);\n+\tif (rc)\n+\t\tgoto fail;\n+\n+\t/* Copy RETA table */\n+\tfor (i = 0; i < (int)(dev->nix.reta_sz / RTE_RETA_GROUP_SIZE); i++) {\n+\t\tfor (j = 0; j < RTE_RETA_GROUP_SIZE; j++) {\n+\t\t\tif ((reta_conf[i].mask >> j) & 0x01)\n+\t\t\t\treta_conf[i].reta[j] = reta[idx];\n+\t\t\tidx++;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_nix_rss_hash_update(struct rte_eth_dev *eth_dev,\n+\t\t\t struct rte_eth_rss_conf *rss_conf)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct roc_nix *nix = &dev->nix;\n+\tuint8_t rss_hash_level;\n+\tuint32_t flowkey_cfg;\n+\tint rc = -EINVAL;\n+\tuint8_t alg_idx;\n+\n+\tif (rss_conf->rss_key && rss_conf->rss_key_len != ROC_NIX_RSS_KEY_LEN) {\n+\t\tplt_err(\"Hash key size mismatch %d vs %d\",\n+\t\t\trss_conf->rss_key_len, ROC_NIX_RSS_KEY_LEN);\n+\t\tgoto fail;\n+\t}\n+\n+\tif (rss_conf->rss_key)\n+\t\troc_nix_rss_key_set(nix, rss_conf->rss_key);\n+\n+\trss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf);\n+\tif (rss_hash_level)\n+\t\trss_hash_level -= 1;\n+\tflowkey_cfg =\n+\t\tcnxk_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level);\n+\n+\trc = roc_nix_rss_flowkey_set(nix, &alg_idx, flowkey_cfg,\n+\t\t\t\t ROC_NIX_RSS_GROUP_DEFAULT,\n+\t\t\t\t ROC_NIX_RSS_MCAM_IDX_DEFAULT);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to set RSS hash function rc=%d\", rc);\n+\t\treturn rc;\n+\t}\n+\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_nix_rss_hash_conf_get(struct rte_eth_dev *eth_dev,\n+\t\t\t struct rte_eth_rss_conf *rss_conf)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\tif (rss_conf->rss_key)\n+\t\troc_nix_rss_key_get(&dev->nix, rss_conf->rss_key);\n+\n+\trss_conf->rss_key_len = ROC_NIX_RSS_KEY_LEN;\n+\trss_conf->rss_hf = dev->ethdev_rss_hf;\n+\n+\treturn 0;\n+}\n", "prefixes": [ "v4", "60/62" ] }