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GET /api/patches/94755/?format=api
{ "id": 94755, "url": "https://patches.dpdk.org/api/patches/94755/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-60-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210623044702.4240-60-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210623044702.4240-60-ndabilpuram@marvell.com", "date": "2021-06-23T04:46:59", "name": "[v4,59/62] net/cnxk: add read clock operation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "9a693db4671e27cda99cf0e79c2a58693a794ba9", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-60-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 17449, "url": "https://patches.dpdk.org/api/series/17449/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17449", "date": "2021-06-23T04:46:00", "name": "Marvell CNXK Ethdev Driver", "version": 4, "mbox": "https://patches.dpdk.org/series/17449/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94755/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94755/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0380EA0C41;\n\tWed, 23 Jun 2021 06:53:46 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 945C941205;\n\tWed, 23 Jun 2021 06:50:32 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 9644A41122\n for <dev@dpdk.org>; Wed, 23 Jun 2021 06:50:30 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15N4jXMX026976 for <dev@dpdk.org>; Tue, 22 Jun 2021 21:50:29 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 39bx5j810r-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 22 Jun 2021 21:50:29 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 22 Jun 2021 21:50:28 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 22 Jun 2021 21:50:28 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 91AB85B6939;\n Tue, 22 Jun 2021 21:50:25 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=L0qbJ81KtXnooTUUzBvQ4p/We3ceSrU1eOsRn+yABEI=;\n b=Z0xST0x3LdZD4uz6nIAmXNM8sTbiPIlberR4G/bbjsDnGj/nS2ksqZGjMPBey8/s2Jqe\n 6jT6H9vWmHKCQqch8cHj65GL0/Wgi3+eDAhpe2ufxFiQBI5Vz/Sj8G50CDYKvjBSsXQ1\n cVnqoAliw+Q2i7Q1qH31IqdUsLWyxLsARPwWlx5x09iQRA7KtW/Z4tEoHHVqGNDbK+3i\n T3VPr/9UYYXrr1WCrKjvFaXdPsT5zbYn0TvDr7hUSyg2yIHwcwtYhFnaque9+gpQgmRT\n OdgTmLs3ps7jE4F4IvoH2JJWRzDbFz79zAaUR34fPBsudZCwxPZ6EvNXcTFJgyRUAIrz Lw==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, <hkalra@marvell.com>", "Date": "Wed, 23 Jun 2021 10:16:59 +0530", "Message-ID": "<20210623044702.4240-60-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210623044702.4240-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210623044702.4240-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "j_4dQ1NaOSRGM2VxIKHE8KF6tUmfx8xj", "X-Proofpoint-GUID": "j_4dQ1NaOSRGM2VxIKHE8KF6tUmfx8xj", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-23_01:2021-06-22,\n 2021-06-23 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 59/62] net/cnxk: add read clock operation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nPatch implements read raw clock operation for cn9k and\ncn10k.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n doc/guides/nics/features/cnxk.ini | 2 ++\n drivers/net/cnxk/cnxk_ethdev.c | 1 +\n drivers/net/cnxk/cnxk_ethdev.h | 1 +\n drivers/net/cnxk/cnxk_ptp.c | 17 +++++++++++++++++\n 4 files changed, 21 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex eba4107..5874531 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -32,6 +32,8 @@ L4 checksum offload = Y\n Inner L3 checksum = Y\n Inner L4 checksum = Y\n Packet type parsing = Y\n+Timesync = Y\n+Timestamp offload = Y\n Basic stats = Y\n Stats per queue = Y\n Extended stats = Y\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex c8bbb7a..b2a8f3a 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -1265,6 +1265,7 @@ struct eth_dev_ops cnxk_eth_dev_ops = {\n \t.timesync_read_time = cnxk_nix_timesync_read_time,\n \t.timesync_write_time = cnxk_nix_timesync_write_time,\n \t.timesync_adjust_time = cnxk_nix_timesync_adjust_time,\n+\t.read_clock = cnxk_nix_read_clock,\n };\n \n static int\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex 4214365..fa6f16f 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -323,6 +323,7 @@ int cnxk_nix_timesync_write_time(struct rte_eth_dev *eth_dev,\n \t\t\t\t const struct timespec *ts);\n int cnxk_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta);\n int cnxk_nix_tsc_convert(struct cnxk_eth_dev *dev);\n+int cnxk_nix_read_clock(struct rte_eth_dev *eth_dev, uint64_t *clock);\n \n uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev);\n \ndiff --git a/drivers/net/cnxk/cnxk_ptp.c b/drivers/net/cnxk/cnxk_ptp.c\nindex 52f6eb1..449489f 100644\n--- a/drivers/net/cnxk/cnxk_ptp.c\n+++ b/drivers/net/cnxk/cnxk_ptp.c\n@@ -4,6 +4,23 @@\n \n #include \"cnxk_ethdev.h\"\n \n+int\n+cnxk_nix_read_clock(struct rte_eth_dev *eth_dev, uint64_t *clock)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\t/* This API returns the raw PTP HI clock value. Since LFs do not\n+\t * have direct access to PTP registers and it requires mbox msg\n+\t * to AF for this value. In fastpath reading this value for every\n+\t * packet (which involes mbox call) becomes very expensive, hence\n+\t * we should be able to derive PTP HI clock value from tsc by\n+\t * using freq_mult and clk_delta calculated during configure stage.\n+\t */\n+\t*clock = (rte_get_tsc_cycles() + dev->clk_delta) * dev->clk_freq_mult;\n+\n+\treturn 0;\n+}\n+\n /* This function calculates two parameters \"clk_freq_mult\" and\n * \"clk_delta\" which is useful in deriving PTP HI clock from\n * timestamp counter (tsc) value.\n", "prefixes": [ "v4", "59/62" ] }