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GET /api/patches/94750/?format=api
{ "id": 94750, "url": "https://patches.dpdk.org/api/patches/94750/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-55-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210623044702.4240-55-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210623044702.4240-55-ndabilpuram@marvell.com", "date": "2021-06-23T04:46:54", "name": "[v4,54/62] net/cnxk: register callback to get PTP status", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "5303c7da5700423344d04710f23201b9b381dff6", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-55-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 17449, "url": "https://patches.dpdk.org/api/series/17449/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17449", "date": "2021-06-23T04:46:00", "name": "Marvell CNXK Ethdev Driver", "version": 4, "mbox": "https://patches.dpdk.org/series/17449/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94750/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94750/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 03364A0C41;\n\tWed, 23 Jun 2021 06:53:14 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5585C41171;\n\tWed, 23 Jun 2021 06:50:20 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 1EE42411EF\n for <dev@dpdk.org>; Wed, 23 Jun 2021 06:50:19 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15N4k9pA025587 for <dev@dpdk.org>; Tue, 22 Jun 2021 21:50:18 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 39bptj1gvp-4\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 22 Jun 2021 21:50:18 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 22 Jun 2021 21:50:17 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 22 Jun 2021 21:50:17 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id E0FE45C68EE;\n Tue, 22 Jun 2021 21:50:09 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=5CDazidsOm20njAMvru1v2uSoOOxU5qTwzP9N5926gw=;\n b=BjlYtfIwMir3YCpZxPcQJ3WnLFnbtpChaHm1sY813+YSzls7gRG2Wx8dVY1essBIo5QI\n F13Xh/djw/m/tB3xkMG1ZP7LUQiSs1KxrR8wwT28ynarSxc7l2sB6j5nWeRLIxkAdiqM\n fW+dA5/7xEpbYKoRQM3lzmPgRmQsL+O8GQurNdGBFbw39z9RNhpvej4JuvSUAPHbWkJj\n xjV2O7kurJHqsyMLgjjym+yMDmLTPXaI71TchSKnSQcm+zxxdOkCYBBgXF65Io8idvkb\n qpfAOh29kRrde+iDLe/tQgsLacAw/vj9qTa4FY91grwcIFS06KD7cd3hWZSXLlv1q6Xk vA==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, <hkalra@marvell.com>", "Date": "Wed, 23 Jun 2021 10:16:54 +0530", "Message-ID": "<20210623044702.4240-55-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210623044702.4240-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210623044702.4240-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "vRs0g2hmFXAYcGy9B19bA0zODSLB-MwT", "X-Proofpoint-GUID": "vRs0g2hmFXAYcGy9B19bA0zODSLB-MwT", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-23_01:2021-06-22,\n 2021-06-23 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 54/62] net/cnxk: register callback to get PTP\n status", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nOnce PTP status is changed at H/W i.e. enable/disable then\nit is propagated to user via registered callback.\n\nSo corresponding callback is registered to get PTP status.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n drivers/net/cnxk/cn10k_ethdev.c | 87 ++++++++++++++++++++++++++++++++++++--\n drivers/net/cnxk/cn10k_rx.h | 1 +\n drivers/net/cnxk/cn9k_ethdev.c | 73 ++++++++++++++++++++++++++++++++\n drivers/net/cnxk/cn9k_rx.h | 1 +\n drivers/net/cnxk/cnxk_ethdev.c | 2 +-\n drivers/net/cnxk/cnxk_ethdev.h | 5 +++\n drivers/net/cnxk/cnxk_ethdev_ops.c | 2 +\n 7 files changed, 166 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c\nindex 0396ff6..bddb7fb 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.c\n+++ b/drivers/net/cnxk/cn10k_ethdev.c\n@@ -268,6 +268,76 @@ cn10k_nix_configure(struct rte_eth_dev *eth_dev)\n \treturn 0;\n }\n \n+/* Function to enable ptp config for VFs */\n+static void\n+nix_ptp_enable_vf(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\tif (nix_recalc_mtu(eth_dev))\n+\t\tplt_err(\"Failed to set MTU size for ptp\");\n+\n+\tdev->scalar_ena = true;\n+\tdev->rx_offload_flags |= NIX_RX_OFFLOAD_TSTAMP_F;\n+\n+\t/* Setting up the function pointers as per new offload flags */\n+\tcn10k_eth_set_rx_function(eth_dev);\n+\tcn10k_eth_set_tx_function(eth_dev);\n+}\n+\n+static uint16_t\n+nix_ptp_vf_burst(void *queue, struct rte_mbuf **mbufs, uint16_t pkts)\n+{\n+\tstruct cn10k_eth_rxq *rxq = queue;\n+\tstruct cnxk_eth_rxq_sp *rxq_sp;\n+\tstruct rte_eth_dev *eth_dev;\n+\n+\tRTE_SET_USED(mbufs);\n+\tRTE_SET_USED(pkts);\n+\n+\trxq_sp = cnxk_eth_rxq_to_sp(rxq);\n+\teth_dev = rxq_sp->dev->eth_dev;\n+\tnix_ptp_enable_vf(eth_dev);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn10k_nix_ptp_info_update_cb(struct roc_nix *nix, bool ptp_en)\n+{\n+\tstruct cnxk_eth_dev *dev = (struct cnxk_eth_dev *)nix;\n+\tstruct rte_eth_dev *eth_dev;\n+\tstruct cn10k_eth_rxq *rxq;\n+\tint i;\n+\n+\tif (!dev)\n+\t\treturn -EINVAL;\n+\n+\teth_dev = dev->eth_dev;\n+\tif (!eth_dev)\n+\t\treturn -EINVAL;\n+\n+\tdev->ptp_en = ptp_en;\n+\n+\tfor (i = 0; i < eth_dev->data->nb_rx_queues; i++) {\n+\t\trxq = eth_dev->data->rx_queues[i];\n+\t\trxq->mbuf_initializer = cnxk_nix_rxq_mbuf_setup(dev);\n+\t}\n+\n+\tif (roc_nix_is_vf_or_sdp(nix) && !(roc_nix_is_sdp(nix)) &&\n+\t !(roc_nix_is_lbk(nix))) {\n+\t\t/* In case of VF, setting of MTU cannot be done directly in this\n+\t\t * function as this is running as part of MBOX request(PF->VF)\n+\t\t * and MTU setting also requires MBOX message to be\n+\t\t * sent(VF->PF)\n+\t\t */\n+\t\teth_dev->rx_pkt_burst = nix_ptp_vf_burst;\n+\t\trte_mb();\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int\n cn10k_nix_dev_start(struct rte_eth_dev *eth_dev)\n {\n@@ -333,6 +403,7 @@ static int\n cn10k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n {\n \tstruct rte_eth_dev *eth_dev;\n+\tstruct cnxk_eth_dev *dev;\n \tint rc;\n \n \tif (RTE_CACHE_LINE_SIZE != 64) {\n@@ -354,15 +425,23 @@ cn10k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \tif (rc)\n \t\treturn rc;\n \n+\t/* Find eth dev allocated */\n+\teth_dev = rte_eth_dev_allocated(pci_dev->device.name);\n+\tif (!eth_dev)\n+\t\treturn -ENOENT;\n+\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY) {\n-\t\teth_dev = rte_eth_dev_allocated(pci_dev->device.name);\n-\t\tif (!eth_dev)\n-\t\t\treturn -ENOENT;\n-\n \t\t/* Setup callbacks for secondary process */\n \t\tcn10k_eth_set_tx_function(eth_dev);\n \t\tcn10k_eth_set_rx_function(eth_dev);\n+\t\treturn 0;\n \t}\n+\n+\tdev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\t/* Register up msg callbacks for PTP information */\n+\troc_nix_ptp_info_cb_register(&dev->nix, cn10k_nix_ptp_info_update_cb);\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h\nindex 7bb9dd8..29ee0ac 100644\n--- a/drivers/net/cnxk/cn10k_rx.h\n+++ b/drivers/net/cnxk/cn10k_rx.h\n@@ -12,6 +12,7 @@\n #define NIX_RX_OFFLOAD_PTYPE_F\t BIT(1)\n #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)\n #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)\n+#define NIX_RX_OFFLOAD_TSTAMP_F\t BIT(4)\n \n /* Flags to control cqe_to_mbuf conversion function.\n * Defining it from backwards to denote its been\ndiff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c\nindex cf9f7c7..63b13eb 100644\n--- a/drivers/net/cnxk/cn9k_ethdev.c\n+++ b/drivers/net/cnxk/cn9k_ethdev.c\n@@ -277,6 +277,76 @@ cn9k_nix_configure(struct rte_eth_dev *eth_dev)\n \treturn 0;\n }\n \n+/* Function to enable ptp config for VFs */\n+static void\n+nix_ptp_enable_vf(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\tif (nix_recalc_mtu(eth_dev))\n+\t\tplt_err(\"Failed to set MTU size for ptp\");\n+\n+\tdev->scalar_ena = true;\n+\tdev->rx_offload_flags |= NIX_RX_OFFLOAD_TSTAMP_F;\n+\n+\t/* Setting up the function pointers as per new offload flags */\n+\tcn9k_eth_set_rx_function(eth_dev);\n+\tcn9k_eth_set_tx_function(eth_dev);\n+}\n+\n+static uint16_t\n+nix_ptp_vf_burst(void *queue, struct rte_mbuf **mbufs, uint16_t pkts)\n+{\n+\tstruct cn9k_eth_rxq *rxq = queue;\n+\tstruct cnxk_eth_rxq_sp *rxq_sp;\n+\tstruct rte_eth_dev *eth_dev;\n+\n+\tRTE_SET_USED(mbufs);\n+\tRTE_SET_USED(pkts);\n+\n+\trxq_sp = cnxk_eth_rxq_to_sp(rxq);\n+\teth_dev = rxq_sp->dev->eth_dev;\n+\tnix_ptp_enable_vf(eth_dev);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn9k_nix_ptp_info_update_cb(struct roc_nix *nix, bool ptp_en)\n+{\n+\tstruct cnxk_eth_dev *dev = (struct cnxk_eth_dev *)nix;\n+\tstruct rte_eth_dev *eth_dev;\n+\tstruct cn9k_eth_rxq *rxq;\n+\tint i;\n+\n+\tif (!dev)\n+\t\treturn -EINVAL;\n+\n+\teth_dev = dev->eth_dev;\n+\tif (!eth_dev)\n+\t\treturn -EINVAL;\n+\n+\tdev->ptp_en = ptp_en;\n+\n+\tfor (i = 0; i < eth_dev->data->nb_rx_queues; i++) {\n+\t\trxq = eth_dev->data->rx_queues[i];\n+\t\trxq->mbuf_initializer = cnxk_nix_rxq_mbuf_setup(dev);\n+\t}\n+\n+\tif (roc_nix_is_vf_or_sdp(nix) && !(roc_nix_is_sdp(nix)) &&\n+\t !(roc_nix_is_lbk(nix))) {\n+\t\t/* In case of VF, setting of MTU cannot be done directly in this\n+\t\t * function as this is running as part of MBOX request(PF->VF)\n+\t\t * and MTU setting also requires MBOX message to be\n+\t\t * sent(VF->PF)\n+\t\t */\n+\t\teth_dev->rx_pkt_burst = nix_ptp_vf_burst;\n+\t\trte_mb();\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int\n cn9k_nix_dev_start(struct rte_eth_dev *eth_dev)\n {\n@@ -396,6 +466,9 @@ cn9k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \n \tdev->hwcap = 0;\n \n+\t/* Register up msg callbacks for PTP information */\n+\troc_nix_ptp_info_cb_register(&dev->nix, cn9k_nix_ptp_info_update_cb);\n+\n \t/* Update HW erratas */\n \tif (roc_model_is_cn96_a0() || roc_model_is_cn95_a0())\n \t\tdev->cq_min_4k = 1;\ndiff --git a/drivers/net/cnxk/cn9k_rx.h b/drivers/net/cnxk/cn9k_rx.h\nindex bc04f5c..f4b3282 100644\n--- a/drivers/net/cnxk/cn9k_rx.h\n+++ b/drivers/net/cnxk/cn9k_rx.h\n@@ -13,6 +13,7 @@\n #define NIX_RX_OFFLOAD_PTYPE_F\t BIT(1)\n #define NIX_RX_OFFLOAD_CHECKSUM_F BIT(2)\n #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(3)\n+#define NIX_RX_OFFLOAD_TSTAMP_F\t BIT(4)\n \n /* Flags to control cqe_to_mbuf conversion function.\n * Defining it from backwards to denote its been\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex b76442d..522f7ec 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -59,7 +59,7 @@ nix_enable_mseg_on_jumbo(struct cnxk_eth_rxq_sp *rxq)\n \t}\n }\n \n-static int\n+int\n nix_recalc_mtu(struct rte_eth_dev *eth_dev)\n {\n \tstruct rte_eth_dev_data *data = eth_dev->data;\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex d51a6d7..1c41dcb 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -100,6 +100,7 @@\n /* Default mark value used when none is provided. */\n #define CNXK_FLOW_ACTION_FLAG_DEFAULT 0xffff\n \n+#define CNXK_NIX_TIMESYNC_RX_OFFSET 8\n #define PTYPE_NON_TUNNEL_WIDTH\t 16\n #define PTYPE_TUNNEL_WIDTH\t 12\n #define PTYPE_NON_TUNNEL_ARRAY_SZ BIT(PTYPE_NON_TUNNEL_WIDTH)\n@@ -153,6 +154,7 @@ struct cnxk_eth_dev {\n \tuint16_t flags;\n \tuint8_t ptype_disable;\n \tbool scalar_ena;\n+\tbool ptp_en;\n \n \t/* Pointer back to rte */\n \tstruct rte_eth_dev *eth_dev;\n@@ -332,6 +334,9 @@ int cnxk_ethdev_parse_devargs(struct rte_devargs *devargs,\n int cnxk_nix_dev_get_reg(struct rte_eth_dev *eth_dev,\n \t\t\t struct rte_dev_reg_info *regs);\n \n+/* Other private functions */\n+int nix_recalc_mtu(struct rte_eth_dev *eth_dev);\n+\n /* Inlines */\n static __rte_always_inline uint64_t\n cnxk_pktmbuf_detach(struct rte_mbuf *m)\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c\nindex c879b25..91de6b7 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_ops.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c\n@@ -385,6 +385,8 @@ cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)\n \tint rc = -EINVAL;\n \tuint32_t buffsz;\n \n+\tframe_size += CNXK_NIX_TIMESYNC_RX_OFFSET * dev->ptp_en;\n+\n \t/* Check if MTU is within the allowed range */\n \tif ((frame_size - RTE_ETHER_CRC_LEN) < NIX_MIN_HW_FRS) {\n \t\tplt_err(\"MTU is lesser than minimum\");\n", "prefixes": [ "v4", "54/62" ] }