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GET /api/patches/94744/?format=api
{ "id": 94744, "url": "https://patches.dpdk.org/api/patches/94744/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-49-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210623044702.4240-49-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210623044702.4240-49-ndabilpuram@marvell.com", "date": "2021-06-23T04:46:48", "name": "[v4,48/62] net/cnxk: add support to configure npc", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "a3a729af2755dc0688b9850ecf5054b08ecdc024", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-49-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 17449, "url": "https://patches.dpdk.org/api/series/17449/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17449", "date": "2021-06-23T04:46:00", "name": "Marvell CNXK Ethdev Driver", "version": 4, "mbox": "https://patches.dpdk.org/series/17449/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94744/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94744/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 254F8A0C41;\n\tWed, 23 Jun 2021 06:52:38 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6907441167;\n\tWed, 23 Jun 2021 06:49:57 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 197B741167\n for <dev@dpdk.org>; Wed, 23 Jun 2021 06:49:55 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15N4jXMU026976 for <dev@dpdk.org>; Tue, 22 Jun 2021 21:49:55 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 39bx5j80xt-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 22 Jun 2021 21:49:55 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 22 Jun 2021 21:49:53 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 22 Jun 2021 21:49:53 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 132F75B6939;\n Tue, 22 Jun 2021 21:49:50 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=6iDg+I2/6HcKU1xzMdqK46SVLiz+3QURRhuClt/9Ivs=;\n b=cNc4u+HVIw0BjlRgTtHDm0EVNlmj7kjWCGjmGbNkJ559HoqYBGDfNZd6x5BpPWOjRZxP\n 5sEhGuuaggHYG9+EQaFa5SOF2aF0iPxPpEKo6TRC/HH/P2X/s/WT0Z+MUyLBcPexX/y3\n iVDswUDy2XWFnLH71s7StBhYwuIO8VEwnp0ObIAf9htecQYODs7TVQJ/8hptJsooFvAO\n OwC+rxUrItn1RekuzeWq9PyaIFyStqDgKf96c0Ypjl0yxED16QKmZlIbexkc8VB2e0LY\n 7tdmYuaw4oj/Dhl0MgyheRoepo/VUtHa1mDEhquplf1IY3ZufVo84qlKVoOP1cUDcQ7Y Gg==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, <hkalra@marvell.com>", "Date": "Wed, 23 Jun 2021 10:16:48 +0530", "Message-ID": "<20210623044702.4240-49-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210623044702.4240-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210623044702.4240-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "QQZdnlzfo1Qv3iTgUGQr9n6Rm4_tnIaD", "X-Proofpoint-GUID": "QQZdnlzfo1Qv3iTgUGQr9n6Rm4_tnIaD", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-23_01:2021-06-22,\n 2021-06-23 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 48/62] net/cnxk: add support to configure npc", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding support to configure NPC on device initialization. This involves\nreading the MKEX and initializing the necessary data.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\n---\n drivers/net/cnxk/cnxk_ethdev.c | 25 ++++++++++++++++++++++---\n drivers/net/cnxk/cnxk_ethdev.h | 3 +++\n drivers/net/cnxk/cnxk_ethdev_devargs.c | 3 +++\n 3 files changed, 28 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex 529adf7..7088e67 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -8,7 +8,8 @@ nix_get_rx_offload_capa(struct cnxk_eth_dev *dev)\n {\n \tuint64_t capa = CNXK_NIX_RX_OFFLOAD_CAPA;\n \n-\tif (roc_nix_is_vf_or_sdp(&dev->nix))\n+\tif (roc_nix_is_vf_or_sdp(&dev->nix) ||\n+\t dev->npc.switch_header_type == ROC_PRIV_FLAGS_HIGIG)\n \t\tcapa &= ~DEV_RX_OFFLOAD_TIMESTAMP;\n \n \treturn capa;\n@@ -120,6 +121,7 @@ nix_update_flow_ctrl_config(struct rte_eth_dev *eth_dev)\n \n \t/* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */\n \tif (roc_model_is_cn96_ax() &&\n+\t dev->npc.switch_header_type != ROC_PRIV_FLAGS_HIGIG &&\n \t (fc_cfg.mode == RTE_FC_FULL || fc_cfg.mode == RTE_FC_RX_PAUSE)) {\n \t\tfc_cfg.mode =\n \t\t\t\t(fc_cfg.mode == RTE_FC_FULL ||\n@@ -419,8 +421,10 @@ cnxk_rss_ethdev_to_nix(struct cnxk_eth_dev *dev, uint64_t ethdev_rss,\n \n \tdev->ethdev_rss_hf = ethdev_rss;\n \n-\tif (ethdev_rss & ETH_RSS_L2_PAYLOAD)\n+\tif (ethdev_rss & ETH_RSS_L2_PAYLOAD &&\n+\t dev->npc.switch_header_type == ROC_PRIV_FLAGS_LEN_90B) {\n \t\tflowkey_cfg |= FLOW_KEY_TYPE_CH_LEN_90B;\n+\t}\n \n \tif (ethdev_rss & ETH_RSS_C_VLAN)\n \t\tflowkey_cfg |= FLOW_KEY_TYPE_VLAN;\n@@ -849,11 +853,18 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev)\n \troc_nix_err_intr_ena_dis(nix, true);\n \troc_nix_ras_intr_ena_dis(nix, true);\n \n-\tif (nix->rx_ptp_ena) {\n+\tif (nix->rx_ptp_ena &&\n+\t dev->npc.switch_header_type == ROC_PRIV_FLAGS_HIGIG) {\n \t\tplt_err(\"Both PTP and switch header enabled\");\n \t\tgoto free_nix_lf;\n \t}\n \n+\trc = roc_nix_switch_hdr_set(nix, dev->npc.switch_header_type);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to enable switch type nix_lf rc=%d\", rc);\n+\t\tgoto free_nix_lf;\n+\t}\n+\n \t/* Setup LSO if needed */\n \trc = nix_lso_fmt_setup(dev);\n \tif (rc) {\n@@ -1305,6 +1316,11 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev)\n \tdev->speed_capa = nix_get_speed_capa(dev);\n \n \t/* Initialize roc npc */\n+\tdev->npc.roc_nix = nix;\n+\trc = roc_npc_init(&dev->npc);\n+\tif (rc)\n+\t\tgoto free_mac_addrs;\n+\n \tplt_nix_dbg(\"Port=%d pf=%d vf=%d ver=%s hwcap=0x%\" PRIx64\n \t\t \" rxoffload_capa=0x%\" PRIx64 \" txoffload_capa=0x%\" PRIx64,\n \t\t eth_dev->data->port_id, roc_nix_get_pf(nix),\n@@ -1338,6 +1354,9 @@ cnxk_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool reset)\n \n \troc_nix_npc_rx_ena_dis(nix, false);\n \n+\t/* Disable and free rte_flow entries */\n+\troc_npc_fini(&dev->npc);\n+\n \t/* Disable link status events */\n \troc_nix_mac_link_event_start_stop(nix, false);\n \ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex 1c4403c..4879ef9 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -133,6 +133,9 @@ struct cnxk_eth_dev {\n \t/* ROC NIX */\n \tstruct roc_nix nix;\n \n+\t/* ROC NPC */\n+\tstruct roc_npc npc;\n+\n \t/* ROC RQs, SQs and CQs */\n \tstruct roc_nix_rq *rqs;\n \tstruct roc_nix_sq *sqs;\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c b/drivers/net/cnxk/cnxk_ethdev_devargs.c\nindex 4af2803..7fd06eb 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_devargs.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c\n@@ -150,6 +150,9 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev)\n \tdev->nix.rss_tag_as_xor = !!rss_tag_as_xor;\n \tdev->nix.max_sqb_count = sqb_count;\n \tdev->nix.reta_sz = reta_sz;\n+\tdev->npc.flow_prealloc_size = flow_prealloc_size;\n+\tdev->npc.flow_max_priority = flow_max_priority;\n+\tdev->npc.switch_header_type = switch_header_type;\n \treturn 0;\n \n exit:\n", "prefixes": [ "v4", "48/62" ] }