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GET /api/patches/94729/?format=api
{ "id": 94729, "url": "https://patches.dpdk.org/api/patches/94729/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-34-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210623044702.4240-34-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210623044702.4240-34-ndabilpuram@marvell.com", "date": "2021-06-23T04:46:33", "name": "[v4,33/62] net/cnxk: add MTU set device operation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "05c6b96e8877494a95f4f3ff061c9624a7470c48", "submitter": { "id": 1202, "url": "https://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-34-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 17449, "url": "https://patches.dpdk.org/api/series/17449/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17449", "date": "2021-06-23T04:46:00", "name": "Marvell CNXK Ethdev Driver", "version": 4, "mbox": "https://patches.dpdk.org/series/17449/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94729/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94729/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 57CBCA0C41;\n\tWed, 23 Jun 2021 06:51:12 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A5BF34118A;\n\tWed, 23 Jun 2021 06:49:10 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 063134114D\n for <dev@dpdk.org>; Wed, 23 Jun 2021 06:49:08 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15N4jY9e026990 for <dev@dpdk.org>; Tue, 22 Jun 2021 21:49:08 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 39bx5j80u0-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 22 Jun 2021 21:49:08 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 22 Jun 2021 21:49:06 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 22 Jun 2021 21:49:06 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 09E835B6936;\n Tue, 22 Jun 2021 21:49:03 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=1LRYcpLKq2PSdJm0eO9V+x1ewyuyAGYYxjF8vnBKGkc=;\n b=fGbV0BpE3Q42lWORBLsIFfKYjnE4QoWSYfgIpUQTNnOdP88kAEHNd7B1nMX5jnTESk1r\n 8NovIq4OYG/Wkb508K2khNGfGBY6B0NP7pMnYes8V3Rsq4cRG9p62vDywJSHghzO/21K\n 43DblHfgrzc5Q+gEBYiGYwftOp8hZexqJDmnOdcvj+Sk4tiltSM/4VihLMZnNMabiMQF\n 0JhXy1yYkUVuGspvpl0fr2NZhoEH6dOizemChm3Zzq+fNMqTKZn0walBtlKjZpuhjWIM\n 2htiFCqs0nguZubHGBTgixDDALQjXuATyKW1AvGkgPPaxRKjyvNS7FOCj4DQ/Sz3Zu8T Bg==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, <hkalra@marvell.com>", "Date": "Wed, 23 Jun 2021 10:16:33 +0530", "Message-ID": "<20210623044702.4240-34-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210623044702.4240-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210623044702.4240-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "cYXFiFYha4qWO8Vm4PplszvN-WSduBTF", "X-Proofpoint-GUID": "cYXFiFYha4qWO8Vm4PplszvN-WSduBTF", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-23_01:2021-06-22,\n 2021-06-23 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 33/62] net/cnxk: add MTU set device operation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nThis Patch implements mtu set dev op for cn9k and cn10k platforms.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n doc/guides/nics/cnxk.rst | 1 +\n doc/guides/nics/features/cnxk.ini | 1 +\n doc/guides/nics/features/cnxk_vec.ini | 1 +\n doc/guides/nics/features/cnxk_vf.ini | 1 +\n drivers/net/cnxk/cnxk_ethdev.c | 51 +++++++++++++++++++++++\n drivers/net/cnxk/cnxk_ethdev.h | 5 ++-\n drivers/net/cnxk/cnxk_ethdev_ops.c | 77 ++++++++++++++++++++++++++++++++++-\n 7 files changed, 135 insertions(+), 2 deletions(-)", "diff": "diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst\nindex 15911ee..d34d3fa 100644\n--- a/doc/guides/nics/cnxk.rst\n+++ b/doc/guides/nics/cnxk.rst\n@@ -24,6 +24,7 @@ Features of the CNXK Ethdev PMD are:\n - Receiver Side Scaling (RSS)\n - Inner and Outer Checksum offload\n - Link state information\n+- MTU update\n - Scatter-Gather IO support\n - Vector Poll mode driver\n \ndiff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 02be26b..6fef725 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -15,6 +15,7 @@ Runtime Tx queue setup = Y\n Fast mbuf free = Y\n Free Tx mbuf on demand = Y\n Queue start/stop = Y\n+MTU update = Y\n TSO = Y\n RSS hash = Y\n Inner RSS = Y\ndiff --git a/doc/guides/nics/features/cnxk_vec.ini b/doc/guides/nics/features/cnxk_vec.ini\nindex 8c63853..79cb1e2 100644\n--- a/doc/guides/nics/features/cnxk_vec.ini\n+++ b/doc/guides/nics/features/cnxk_vec.ini\n@@ -15,6 +15,7 @@ Runtime Tx queue setup = Y\n Fast mbuf free = Y\n Free Tx mbuf on demand = Y\n Queue start/stop = Y\n+MTU update = Y\n RSS hash = Y\n Inner RSS = Y\n Jumbo frame = Y\ndiff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini\nindex a1bd49b..5cc9f3f 100644\n--- a/doc/guides/nics/features/cnxk_vf.ini\n+++ b/doc/guides/nics/features/cnxk_vf.ini\n@@ -14,6 +14,7 @@ Runtime Tx queue setup = Y\n Fast mbuf free = Y\n Free Tx mbuf on demand = Y\n Queue start/stop = Y\n+MTU update = Y\n TSO = Y\n RSS hash = Y\n Inner RSS = Y\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex 58d2f7d..3f92780 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -37,6 +37,50 @@ nix_get_speed_capa(struct cnxk_eth_dev *dev)\n \treturn speed_capa;\n }\n \n+static void\n+nix_enable_mseg_on_jumbo(struct cnxk_eth_rxq_sp *rxq)\n+{\n+\tstruct rte_pktmbuf_pool_private *mbp_priv;\n+\tstruct rte_eth_dev *eth_dev;\n+\tstruct cnxk_eth_dev *dev;\n+\tuint32_t buffsz;\n+\n+\tdev = rxq->dev;\n+\teth_dev = dev->eth_dev;\n+\n+\t/* Get rx buffer size */\n+\tmbp_priv = rte_mempool_get_priv(rxq->qconf.mp);\n+\tbuffsz = mbp_priv->mbuf_data_room_size - RTE_PKTMBUF_HEADROOM;\n+\n+\tif (eth_dev->data->dev_conf.rxmode.max_rx_pkt_len > buffsz) {\n+\t\tdev->rx_offloads |= DEV_RX_OFFLOAD_SCATTER;\n+\t\tdev->tx_offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;\n+\t}\n+}\n+\n+static int\n+nix_recalc_mtu(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct cnxk_eth_rxq_sp *rxq;\n+\tuint16_t mtu;\n+\tint rc;\n+\n+\trxq = ((struct cnxk_eth_rxq_sp *)data->rx_queues[0]) - 1;\n+\t/* Setup scatter mode if needed by jumbo */\n+\tnix_enable_mseg_on_jumbo(rxq);\n+\n+\t/* Setup MTU based on max_rx_pkt_len */\n+\tmtu = data->dev_conf.rxmode.max_rx_pkt_len - CNXK_NIX_L2_OVERHEAD +\n+\t\t\t\tCNXK_NIX_MAX_VTAG_ACT_SIZE;\n+\n+\trc = cnxk_nix_mtu_set(eth_dev, mtu);\n+\tif (rc)\n+\t\tplt_err(\"Failed to set default MTU size, rc=%d\", rc);\n+\n+\treturn rc;\n+}\n+\n uint64_t\n cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev)\n {\n@@ -1002,6 +1046,12 @@ cnxk_nix_dev_start(struct rte_eth_dev *eth_dev)\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \tint rc, i;\n \n+\tif (eth_dev->data->nb_rx_queues != 0) {\n+\t\trc = nix_recalc_mtu(eth_dev);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\t}\n+\n \t/* Start rx queues */\n \tfor (i = 0; i < eth_dev->data->nb_rx_queues; i++) {\n \t\trc = cnxk_nix_rx_queue_start(eth_dev, i);\n@@ -1046,6 +1096,7 @@ cnxk_nix_dev_start(struct rte_eth_dev *eth_dev)\n \n /* CNXK platform independent eth dev ops */\n struct eth_dev_ops cnxk_eth_dev_ops = {\n+\t.mtu_set = cnxk_nix_mtu_set,\n \t.mac_addr_set = cnxk_nix_mac_addr_set,\n \t.dev_infos_get = cnxk_nix_info_get,\n \t.link_update = cnxk_nix_link_update,\ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex a5380a5..c216dd5 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -28,7 +28,9 @@\n #define CNXK_NIX_MAX_VTAG_ACT_SIZE (4 * CNXK_NIX_MAX_VTAG_INS)\n \n /* ETH_HLEN+ETH_FCS+2*VLAN_HLEN */\n-#define CNXK_NIX_L2_OVERHEAD (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + 8)\n+#define CNXK_NIX_L2_OVERHEAD (RTE_ETHER_HDR_LEN + \\\n+\t\t\t RTE_ETHER_CRC_LEN + \\\n+\t\t\t CNXK_NIX_MAX_VTAG_ACT_SIZE)\n \n #define CNXK_NIX_RX_MIN_DESC\t 16\n #define CNXK_NIX_RX_MIN_DESC_ALIGN 16\n@@ -218,6 +220,7 @@ extern struct eth_dev_ops cnxk_eth_dev_ops;\n int cnxk_nix_probe(struct rte_pci_driver *pci_drv,\n \t\t struct rte_pci_device *pci_dev);\n int cnxk_nix_remove(struct rte_pci_device *pci_dev);\n+int cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu);\n int cnxk_nix_mac_addr_set(struct rte_eth_dev *eth_dev,\n \t\t\t struct rte_ether_addr *addr);\n int cnxk_nix_info_get(struct rte_eth_dev *eth_dev,\ndiff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c\nindex 87cf4ee..21b55c4 100644\n--- a/drivers/net/cnxk/cnxk_ethdev_ops.c\n+++ b/drivers/net/cnxk/cnxk_ethdev_ops.c\n@@ -20,7 +20,8 @@ cnxk_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)\n \tdevinfo->max_tx_queues = RTE_MAX_QUEUES_PER_PORT;\n \tdevinfo->max_mac_addrs = dev->max_mac_entries;\n \tdevinfo->max_vfs = pci_dev->max_vfs;\n-\tdevinfo->max_mtu = devinfo->max_rx_pktlen - CNXK_NIX_L2_OVERHEAD;\n+\tdevinfo->max_mtu = devinfo->max_rx_pktlen -\n+\t\t\t\t(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN);\n \tdevinfo->min_mtu = devinfo->min_rx_bufsize - CNXK_NIX_L2_OVERHEAD;\n \n \tdevinfo->rx_offload_capa = dev->rx_offload_capa;\n@@ -98,3 +99,77 @@ cnxk_nix_mac_addr_set(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr)\n exit:\n \treturn rc;\n }\n+\n+int\n+cnxk_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)\n+{\n+\tuint32_t old_frame_size, frame_size = mtu + CNXK_NIX_L2_OVERHEAD;\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix *nix = &dev->nix;\n+\tint rc = -EINVAL;\n+\tuint32_t buffsz;\n+\n+\t/* Check if MTU is within the allowed range */\n+\tif ((frame_size - RTE_ETHER_CRC_LEN) < NIX_MIN_HW_FRS) {\n+\t\tplt_err(\"MTU is lesser than minimum\");\n+\t\tgoto exit;\n+\t}\n+\n+\tif ((frame_size - RTE_ETHER_CRC_LEN) >\n+\t ((uint32_t)roc_nix_max_pkt_len(nix))) {\n+\t\tplt_err(\"MTU is greater than maximum\");\n+\t\tgoto exit;\n+\t}\n+\n+\tbuffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;\n+\told_frame_size = data->mtu + CNXK_NIX_L2_OVERHEAD;\n+\n+\t/* Refuse MTU that requires the support of scattered packets\n+\t * when this feature has not been enabled before.\n+\t */\n+\tif (data->dev_started && frame_size > buffsz &&\n+\t !(dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)) {\n+\t\tplt_err(\"Scatter offload is not enabled for mtu\");\n+\t\tgoto exit;\n+\t}\n+\n+\t/* Check <seg size> * <max_seg> >= max_frame */\n+\tif ((dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\t&&\n+\t frame_size > (buffsz * CNXK_NIX_RX_NB_SEG_MAX)) {\n+\t\tplt_err(\"Greater than maximum supported packet length\");\n+\t\tgoto exit;\n+\t}\n+\n+\tframe_size -= RTE_ETHER_CRC_LEN;\n+\n+\t/* Update mtu on Tx */\n+\trc = roc_nix_mac_mtu_set(nix, frame_size);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to set MTU, rc=%d\", rc);\n+\t\tgoto exit;\n+\t}\n+\n+\t/* Sync same frame size on Rx */\n+\trc = roc_nix_mac_max_rx_len_set(nix, frame_size);\n+\tif (rc) {\n+\t\t/* Rollback to older mtu */\n+\t\troc_nix_mac_mtu_set(nix,\n+\t\t\t\t old_frame_size - RTE_ETHER_CRC_LEN);\n+\t\tplt_err(\"Failed to max Rx frame length, rc=%d\", rc);\n+\t\tgoto exit;\n+\t}\n+\n+\tframe_size += RTE_ETHER_CRC_LEN;\n+\n+\tif (frame_size > RTE_ETHER_MAX_LEN)\n+\t\tdev->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;\n+\telse\n+\t\tdev->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;\n+\n+\t/* Update max_rx_pkt_len */\n+\tdata->dev_conf.rxmode.max_rx_pkt_len = frame_size;\n+\n+exit:\n+\treturn rc;\n+}\n", "prefixes": [ "v4", "33/62" ] }