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GET /api/patches/94714/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 94714,
    "url": "https://patches.dpdk.org/api/patches/94714/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-19-ndabilpuram@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210623044702.4240-19-ndabilpuram@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210623044702.4240-19-ndabilpuram@marvell.com",
    "date": "2021-06-23T04:46:18",
    "name": "[v4,18/62] net/cnxk: support queue start and stop",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "a89967ca6bb1e7f199501d904cb807960dd21958",
    "submitter": {
        "id": 1202,
        "url": "https://patches.dpdk.org/api/people/1202/?format=api",
        "name": "Nithin Dabilpuram",
        "email": "ndabilpuram@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623044702.4240-19-ndabilpuram@marvell.com/mbox/",
    "series": [
        {
            "id": 17449,
            "url": "https://patches.dpdk.org/api/series/17449/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17449",
            "date": "2021-06-23T04:46:00",
            "name": "Marvell CNXK Ethdev Driver",
            "version": 4,
            "mbox": "https://patches.dpdk.org/series/17449/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/94714/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/94714/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 114B2A0C41;\n\tWed, 23 Jun 2021 06:49:29 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8D53641124;\n\tWed, 23 Jun 2021 06:48:20 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 578F9410EA\n for <dev@dpdk.org>; Wed, 23 Jun 2021 06:48:19 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15N4k6Yi025521 for <dev@dpdk.org>; Tue, 22 Jun 2021 21:48:18 -0700",
            "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 39bptj1gkg-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 22 Jun 2021 21:48:18 -0700",
            "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 22 Jun 2021 21:48:16 -0700",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 22 Jun 2021 21:48:16 -0700",
            "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id AABF15B6937;\n Tue, 22 Jun 2021 21:48:13 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=MjDpp/1JzigSkXZhtvx0EXp9kTnMqgjXbqenAy7j7rM=;\n b=Xo/AJlWFt0a5to/e/DfaQjrAclX7G8VF3i4+buHIVeng2gr6s6glPUSkH8CuP/mi8eFJ\n 5rBfb9FY5d8MtFHWqLYuXE4xRebbiZEKtzUzga2lP74r1V59OAJeShTqSFaf9BMkID6q\n ns/NgDVm4zqlUp4aetYIEVmyym2K61kpMlFoU1IXQXVvXSW+svW2WrehuV/nogViLBG5\n qGT9qNHKwjOrg0/F1Dr8jDHeiQUzCZ2Et2KRFipbMTewiCiXx7fXH2bMhGptllDK9pZY\n bcCLNXerInutCCsw+9QYeWsmCleg4pwzAucDnVhMZypZkfLo/bXVsYi4bgUS/WDJ9R4T Xw==",
        "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, <hkalra@marvell.com>,\n \"Nithin Dabilpuram\" <ndabilpuram@marvell.com>",
        "Date": "Wed, 23 Jun 2021 10:16:18 +0530",
        "Message-ID": "<20210623044702.4240-19-ndabilpuram@marvell.com>",
        "X-Mailer": "git-send-email 2.8.4",
        "In-Reply-To": "<20210623044702.4240-1-ndabilpuram@marvell.com>",
        "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210623044702.4240-1-ndabilpuram@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-ORIG-GUID": "GmOprVzwcG91rzgnDsj3hKBqDpmN1Ik_",
        "X-Proofpoint-GUID": "GmOprVzwcG91rzgnDsj3hKBqDpmN1Ik_",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-23_01:2021-06-22,\n 2021-06-23 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v4 18/62] net/cnxk: support queue start and stop",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add Rx/Tx queue start and stop callbacks for\nCN9K and CN10K.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n doc/guides/nics/features/cnxk.ini     |  1 +\n doc/guides/nics/features/cnxk_vec.ini |  1 +\n doc/guides/nics/features/cnxk_vf.ini  |  1 +\n drivers/net/cnxk/cn10k_ethdev.c       | 16 ++++++\n drivers/net/cnxk/cn9k_ethdev.c        | 16 ++++++\n drivers/net/cnxk/cnxk_ethdev.c        | 92 +++++++++++++++++++++++++++++++++++\n drivers/net/cnxk/cnxk_ethdev.h        |  1 +\n 7 files changed, 128 insertions(+)",
    "diff": "diff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 503582c..712f8d5 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -12,6 +12,7 @@ Link status          = Y\n Link status event    = Y\n Runtime Rx queue setup = Y\n Runtime Tx queue setup = Y\n+Queue start/stop     = Y\n RSS hash             = Y\n Inner RSS            = Y\n Packet type parsing  = Y\ndiff --git a/doc/guides/nics/features/cnxk_vec.ini b/doc/guides/nics/features/cnxk_vec.ini\nindex 9ad225a..82f2af0 100644\n--- a/doc/guides/nics/features/cnxk_vec.ini\n+++ b/doc/guides/nics/features/cnxk_vec.ini\n@@ -12,6 +12,7 @@ Link status          = Y\n Link status event    = Y\n Runtime Rx queue setup = Y\n Runtime Tx queue setup = Y\n+Queue start/stop     = Y\n RSS hash             = Y\n Inner RSS            = Y\n Packet type parsing  = Y\ndiff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini\nindex 8c93ba7..61fed11 100644\n--- a/doc/guides/nics/features/cnxk_vf.ini\n+++ b/doc/guides/nics/features/cnxk_vf.ini\n@@ -11,6 +11,7 @@ Link status          = Y\n Link status event    = Y\n Runtime Rx queue setup = Y\n Runtime Tx queue setup = Y\n+Queue start/stop     = Y\n RSS hash             = Y\n Inner RSS            = Y\n Packet type parsing  = Y\ndiff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c\nindex f79d03c..d70ab00 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.c\n+++ b/drivers/net/cnxk/cn10k_ethdev.c\n@@ -138,6 +138,21 @@ cn10k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n }\n \n static int\n+cn10k_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)\n+{\n+\tstruct cn10k_eth_txq *txq = eth_dev->data->tx_queues[qidx];\n+\tint rc;\n+\n+\trc = cnxk_nix_tx_queue_stop(eth_dev, qidx);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Clear fc cache pkts to trigger worker stop */\n+\ttxq->fc_cache_pkts = 0;\n+\treturn 0;\n+}\n+\n+static int\n cn10k_nix_configure(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n@@ -169,6 +184,7 @@ nix_eth_dev_ops_override(void)\n \tcnxk_eth_dev_ops.dev_configure = cn10k_nix_configure;\n \tcnxk_eth_dev_ops.tx_queue_setup = cn10k_nix_tx_queue_setup;\n \tcnxk_eth_dev_ops.rx_queue_setup = cn10k_nix_rx_queue_setup;\n+\tcnxk_eth_dev_ops.tx_queue_stop = cn10k_nix_tx_queue_stop;\n \tcnxk_eth_dev_ops.dev_ptypes_set = cn10k_nix_ptypes_set;\n }\n \ndiff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c\nindex 19b3727..806e95f 100644\n--- a/drivers/net/cnxk/cn9k_ethdev.c\n+++ b/drivers/net/cnxk/cn9k_ethdev.c\n@@ -136,6 +136,21 @@ cn9k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n }\n \n static int\n+cn9k_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)\n+{\n+\tstruct cn9k_eth_txq *txq = eth_dev->data->tx_queues[qidx];\n+\tint rc;\n+\n+\trc = cnxk_nix_tx_queue_stop(eth_dev, qidx);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Clear fc cache pkts to trigger worker stop */\n+\ttxq->fc_cache_pkts = 0;\n+\treturn 0;\n+}\n+\n+static int\n cn9k_nix_configure(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n@@ -178,6 +193,7 @@ nix_eth_dev_ops_override(void)\n \tcnxk_eth_dev_ops.dev_configure = cn9k_nix_configure;\n \tcnxk_eth_dev_ops.tx_queue_setup = cn9k_nix_tx_queue_setup;\n \tcnxk_eth_dev_ops.rx_queue_setup = cn9k_nix_rx_queue_setup;\n+\tcnxk_eth_dev_ops.tx_queue_stop = cn9k_nix_tx_queue_stop;\n \tcnxk_eth_dev_ops.dev_ptypes_set = cn9k_nix_ptypes_set;\n }\n \ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex b1ed046..6c20098 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -866,12 +866,104 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev)\n \treturn rc;\n }\n \n+static int\n+cnxk_nix_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qid)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix_sq *sq = &dev->sqs[qid];\n+\tint rc = -EINVAL;\n+\n+\tif (data->tx_queue_state[qid] == RTE_ETH_QUEUE_STATE_STARTED)\n+\t\treturn 0;\n+\n+\trc = roc_nix_tm_sq_aura_fc(sq, true);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to enable sq aura fc, txq=%u, rc=%d\", qid, rc);\n+\t\tgoto done;\n+\t}\n+\n+\tdata->tx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STARTED;\n+done:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qid)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix_sq *sq = &dev->sqs[qid];\n+\tint rc;\n+\n+\tif (data->tx_queue_state[qid] == RTE_ETH_QUEUE_STATE_STOPPED)\n+\t\treturn 0;\n+\n+\trc = roc_nix_tm_sq_aura_fc(sq, false);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to disable sqb aura fc, txq=%u, rc=%d\", qid,\n+\t\t\trc);\n+\t\tgoto done;\n+\t}\n+\n+\tdata->tx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STOPPED;\n+done:\n+\treturn rc;\n+}\n+\n+static int\n+cnxk_nix_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qid)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix_rq *rq = &dev->rqs[qid];\n+\tint rc;\n+\n+\tif (data->rx_queue_state[qid] == RTE_ETH_QUEUE_STATE_STARTED)\n+\t\treturn 0;\n+\n+\trc = roc_nix_rq_ena_dis(rq, true);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to enable rxq=%u, rc=%d\", qid, rc);\n+\t\tgoto done;\n+\t}\n+\n+\tdata->rx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STARTED;\n+done:\n+\treturn rc;\n+}\n+\n+static int\n+cnxk_nix_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qid)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix_rq *rq = &dev->rqs[qid];\n+\tint rc;\n+\n+\tif (data->rx_queue_state[qid] == RTE_ETH_QUEUE_STATE_STOPPED)\n+\t\treturn 0;\n+\n+\trc = roc_nix_rq_ena_dis(rq, false);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to disable rxq=%u, rc=%d\", qid, rc);\n+\t\tgoto done;\n+\t}\n+\n+\tdata->rx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STOPPED;\n+done:\n+\treturn rc;\n+}\n+\n /* CNXK platform independent eth dev ops */\n struct eth_dev_ops cnxk_eth_dev_ops = {\n \t.dev_infos_get = cnxk_nix_info_get,\n \t.link_update = cnxk_nix_link_update,\n \t.tx_queue_release = cnxk_nix_tx_queue_release,\n \t.rx_queue_release = cnxk_nix_rx_queue_release,\n+\t.tx_queue_start = cnxk_nix_tx_queue_start,\n+\t.rx_queue_start = cnxk_nix_rx_queue_start,\n+\t.rx_queue_stop = cnxk_nix_rx_queue_stop,\n \t.dev_supported_ptypes_get = cnxk_nix_supported_ptypes_get,\n };\n \ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex b23df4a..5a52489 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -214,6 +214,7 @@ int cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n \t\t\t    uint16_t nb_desc, uint16_t fp_rx_q_sz,\n \t\t\t    const struct rte_eth_rxconf *rx_conf,\n \t\t\t    struct rte_mempool *mp);\n+int cnxk_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qid);\n \n uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev);\n \n",
    "prefixes": [
        "v4",
        "18/62"
    ]
}