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GET /api/patches/94686/?format=api
{ "id": 94686, "url": "https://patches.dpdk.org/api/patches/94686/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210623000349.631468-1-xuemingl@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210623000349.631468-1-xuemingl@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210623000349.631468-1-xuemingl@nvidia.com", "date": "2021-06-23T00:03:48", "name": "[v5,1/2] devargs: add common key definition", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e129a45d229b0c8d5f05b81d9a693da77f5ad81e", "submitter": { "id": 1904, "url": "https://patches.dpdk.org/api/people/1904/?format=api", "name": "Xueming Li", "email": "xuemingl@nvidia.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210623000349.631468-1-xuemingl@nvidia.com/mbox/", "series": [ { "id": 17446, "url": "https://patches.dpdk.org/api/series/17446/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17446", "date": "2021-06-23T00:03:48", "name": "[v5,1/2] devargs: add common key definition", "version": 5, "mbox": "https://patches.dpdk.org/series/17446/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94686/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/94686/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": 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header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Xueming Li <xuemingl@nvidia.com>", "To": "", "CC": "<dev@dpdk.org>, <xuemingl@nvidia.com>, Thomas Monjalon\n <thomas@monjalon.net>, Matan Azrad <matan@nvidia.com>, Shahaf Shuler\n <shahafs@nvidia.com>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>, \"Andrew\n Rybchenko\" <andrew.rybchenko@oktetlabs.ru>, Chas Williams <chas3@att.com>,\n \"Min Hu (Connor)\" <humin29@huawei.com>, Beilei Xing <beilei.xing@intel.com>,\n Jingjing Wu <jingjing.wu@intel.com>", "Date": "Wed, 23 Jun 2021 03:03:48 +0300", "Message-ID": "<20210623000349.631468-1-xuemingl@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20210613125846.19852-1-xuemingl@nvidia.com>", "References": "<20210613125846.19852-1-xuemingl@nvidia.com>", "MIME-Version": "1.0", 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SFS:(4636009)(39860400002)(346002)(396003)(376002)(136003)(36840700001)(46966006)(2616005)(55016002)(2906002)(478600001)(82310400003)(5660300002)(426003)(36756003)(47076005)(336012)(6286002)(4326008)(1076003)(36860700001)(109986005)(8676002)(6666004)(86362001)(356005)(70206006)(186003)(70586007)(83380400001)(16526019)(82740400003)(7696005)(26005)(7636003)(36906005)(54906003)(8936002)(316002)(266003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "23 Jun 2021 00:04:33.8164 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n d4659301-ea5c-45d0-f436-08d935da7b68", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT066.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR12MB3296", "Subject": "[dpdk-dev] [PATCH v5 1/2] devargs: add common key definition", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Adds common devargs key definition for \"bus\", \"class\" and \"driver\".\n\nCc: Thomas Monjalon <thomas@monjalon.net>\nSigned-off-by: Xueming Li <xuemingl@nvidia.com>\n---\n drivers/common/mlx5/mlx5_common.h | 2 --\n drivers/common/mlx5/mlx5_common_pci.c | 2 +-\n drivers/common/sfc_efx/sfc_efx.c | 7 +++----\n drivers/common/sfc_efx/sfc_efx.h | 2 --\n drivers/net/bonding/rte_eth_bond_args.c | 2 +-\n drivers/net/i40e/i40e_ethdev_vf.c | 5 ++---\n drivers/net/iavf/iavf_ethdev.c | 5 ++---\n drivers/net/mlx5/mlx5.c | 4 ++--\n drivers/net/sfc/sfc_kvargs.c | 2 +-\n drivers/vdpa/mlx5/mlx5_vdpa.c | 2 +-\n lib/eal/common/eal_common_devargs.c | 12 ++++++------\n lib/eal/include/rte_devargs.h | 24 ++++++++++++++++++++++++\n 12 files changed, 43 insertions(+), 26 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h\nindex 1fbefe0fa6..306f2f1ab7 100644\n--- a/drivers/common/mlx5/mlx5_common.h\n+++ b/drivers/common/mlx5/mlx5_common.h\n@@ -208,8 +208,6 @@ __rte_internal\n int mlx5_get_ifname_sysfs(const char *ibdev_path, char *ifname);\n \n \n-#define MLX5_CLASS_ARG_NAME \"class\"\n-\n enum mlx5_class {\n \tMLX5_CLASS_INVALID,\n \tMLX5_CLASS_NET = RTE_BIT64(0),\ndiff --git a/drivers/common/mlx5/mlx5_common_pci.c b/drivers/common/mlx5/mlx5_common_pci.c\nindex 3f16cd21cf..34747c4e07 100644\n--- a/drivers/common/mlx5/mlx5_common_pci.c\n+++ b/drivers/common/mlx5/mlx5_common_pci.c\n@@ -118,7 +118,7 @@ bus_cmdline_options_handler(__rte_unused const char *key,\n static int\n parse_class_options(const struct rte_devargs *devargs)\n {\n-\tconst char *key = MLX5_CLASS_ARG_NAME;\n+\tconst char *key = RTE_DEVARGS_KEY_CLASS;\n \tstruct rte_kvargs *kvlist;\n \tint ret = 0;\n \ndiff --git a/drivers/common/sfc_efx/sfc_efx.c b/drivers/common/sfc_efx/sfc_efx.c\nindex 0b78933d9f..2dc5545760 100644\n--- a/drivers/common/sfc_efx/sfc_efx.c\n+++ b/drivers/common/sfc_efx/sfc_efx.c\n@@ -42,7 +42,6 @@ enum sfc_efx_dev_class\n sfc_efx_dev_class_get(struct rte_devargs *devargs)\n {\n \tstruct rte_kvargs *kvargs;\n-\tconst char *key = SFC_EFX_KVARG_DEV_CLASS;\n \tenum sfc_efx_dev_class dev_class = SFC_EFX_DEV_CLASS_NET;\n \n \tif (devargs == NULL)\n@@ -52,9 +51,9 @@ sfc_efx_dev_class_get(struct rte_devargs *devargs)\n \tif (kvargs == NULL)\n \t\treturn dev_class;\n \n-\tif (rte_kvargs_count(kvargs, key) != 0) {\n-\t\trte_kvargs_process(kvargs, key, sfc_efx_kvarg_dev_class_handler,\n-\t\t\t\t &dev_class);\n+\tif (rte_kvargs_count(kvargs, RTE_DEVARGS_KEY_CLASS) != 0) {\n+\t\trte_kvargs_process(kvargs, RTE_DEVARGS_KEY_CLASS,\n+\t\t\t\t sfc_efx_kvarg_dev_class_handler, &dev_class);\n \t}\n \n \trte_kvargs_free(kvargs);\ndiff --git a/drivers/common/sfc_efx/sfc_efx.h b/drivers/common/sfc_efx/sfc_efx.h\nindex 6b6164cb1f..c16eca60f3 100644\n--- a/drivers/common/sfc_efx/sfc_efx.h\n+++ b/drivers/common/sfc_efx/sfc_efx.h\n@@ -19,8 +19,6 @@\n extern \"C\" {\n #endif\n \n-#define SFC_EFX_KVARG_DEV_CLASS\t\"class\"\n-\n enum sfc_efx_dev_class {\n \tSFC_EFX_DEV_CLASS_INVALID = 0,\n \tSFC_EFX_DEV_CLASS_NET,\ndiff --git a/drivers/net/bonding/rte_eth_bond_args.c b/drivers/net/bonding/rte_eth_bond_args.c\nindex 764b1b8c8e..5406e1c934 100644\n--- a/drivers/net/bonding/rte_eth_bond_args.c\n+++ b/drivers/net/bonding/rte_eth_bond_args.c\n@@ -18,7 +18,7 @@ const char *pmd_bond_init_valid_arguments[] = {\n \tPMD_BOND_SOCKET_ID_KVARG,\n \tPMD_BOND_MAC_ADDR_KVARG,\n \tPMD_BOND_AGG_MODE_KVARG,\n-\t\"driver\",\n+\tRTE_DEVARGS_KEY_DRIVER,\n \tNULL\n };\n \ndiff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c\nindex 385ebedcd3..0cfe13b7b2 100644\n--- a/drivers/net/i40e/i40e_ethdev_vf.c\n+++ b/drivers/net/i40e/i40e_ethdev_vf.c\n@@ -1660,7 +1660,6 @@ static int\n i40evf_driver_selected(struct rte_devargs *devargs)\n {\n \tstruct rte_kvargs *kvlist;\n-\tconst char *key = \"driver\";\n \tint ret = 0;\n \n \tif (devargs == NULL)\n@@ -1670,13 +1669,13 @@ i40evf_driver_selected(struct rte_devargs *devargs)\n \tif (kvlist == NULL)\n \t\treturn 0;\n \n-\tif (!rte_kvargs_count(kvlist, key))\n+\tif (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER))\n \t\tgoto exit;\n \n \t/* i40evf driver selected when there's a key-value pair:\n \t * driver=i40evf\n \t */\n-\tif (rte_kvargs_process(kvlist, key,\n+\tif (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER,\n \t\t\t i40evf_check_driver_handler, NULL) < 0)\n \t\tgoto exit;\n \ndiff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c\nindex a7ef7a6d4d..6793bcef08 100644\n--- a/drivers/net/iavf/iavf_ethdev.c\n+++ b/drivers/net/iavf/iavf_ethdev.c\n@@ -2448,7 +2448,6 @@ static int\n iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id)\n {\n \tstruct rte_kvargs *kvlist;\n-\tconst char *key = \"driver\";\n \tint ret = 0;\n \n \tif (device_id != IAVF_DEV_ID_VF &&\n@@ -2464,13 +2463,13 @@ iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id)\n \tif (kvlist == NULL)\n \t\treturn 0;\n \n-\tif (!rte_kvargs_count(kvlist, key))\n+\tif (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER))\n \t\tgoto exit;\n \n \t/* i40evf driver selected when there's a key-value pair:\n \t * driver=i40evf\n \t */\n-\tif (rte_kvargs_process(kvlist, key,\n+\tif (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER,\n \t\t\t iavf_drv_i40evf_check_handler, NULL) < 0)\n \t\tgoto exit;\n \ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex cf1815cb74..d0faa45944 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -1931,7 +1931,7 @@ mlx5_args_check(const char *key, const char *val, void *opaque)\n \t\tconfig->max_dump_files_num = tmp;\n \t} else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {\n \t\tconfig->lro.timeout = tmp;\n-\t} else if (strcmp(MLX5_CLASS_ARG_NAME, key) == 0) {\n+\t} else if (strcmp(RTE_DEVARGS_KEY_CLASS, key) == 0) {\n \t\tDRV_LOG(DEBUG, \"class argument is %s.\", val);\n \t} else if (strcmp(MLX5_HP_BUF_SIZE, key) == 0) {\n \t\tconfig->log_hp_size = tmp;\n@@ -2002,7 +2002,7 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)\n \t\tMLX5_REPRESENTOR,\n \t\tMLX5_MAX_DUMP_FILES_NUM,\n \t\tMLX5_LRO_TIMEOUT_USEC,\n-\t\tMLX5_CLASS_ARG_NAME,\n+\t\tRTE_DEVARGS_KEY_CLASS,\n \t\tMLX5_HP_BUF_SIZE,\n \t\tMLX5_RECLAIM_MEM,\n \t\tMLX5_SYS_MEM_EN,\ndiff --git a/drivers/net/sfc/sfc_kvargs.c b/drivers/net/sfc/sfc_kvargs.c\nindex 0efa92ed28..974c05e68e 100644\n--- a/drivers/net/sfc/sfc_kvargs.c\n+++ b/drivers/net/sfc/sfc_kvargs.c\n@@ -28,7 +28,7 @@ sfc_kvargs_parse(struct sfc_adapter *sa)\n \t\tSFC_KVARG_TX_DATAPATH,\n \t\tSFC_KVARG_FW_VARIANT,\n \t\tSFC_KVARG_RXD_WAIT_TIMEOUT_NS,\n-\t\tSFC_EFX_KVARG_DEV_CLASS,\n+\t\tRTE_DEVARGS_KEY_CLASS,\n \t\tNULL,\n \t};\n \ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c\nindex e5e03e6582..8b5bfd8c3d 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c\n@@ -588,7 +588,7 @@ mlx5_vdpa_args_check_handler(const char *key, const char *val, void *opaque)\n \tunsigned long tmp;\n \tint n_cores = sysconf(_SC_NPROCESSORS_ONLN);\n \n-\tif (strcmp(key, \"class\") == 0)\n+\tif (strcmp(key, RTE_DEVARGS_KEY_CLASS) == 0)\n \t\treturn 0;\n \terrno = 0;\n \ttmp = strtoul(val, NULL, 0);\ndiff --git a/lib/eal/common/eal_common_devargs.c b/lib/eal/common/eal_common_devargs.c\nindex b31ac879a9..23aaf8b7e4 100644\n--- a/lib/eal/common/eal_common_devargs.c\n+++ b/lib/eal/common/eal_common_devargs.c\n@@ -49,9 +49,9 @@ rte_devargs_layers_parse(struct rte_devargs *devargs,\n \t\tconst char *str;\n \t\tstruct rte_kvargs *kvlist;\n \t} layers[] = {\n-\t\t{ \"bus=\", NULL, NULL, },\n-\t\t{ \"class=\", NULL, NULL, },\n-\t\t{ \"driver=\", NULL, NULL, },\n+\t\t{ RTE_DEVARGS_KEY_BUS \"=\", NULL, NULL, },\n+\t\t{ RTE_DEVARGS_KEY_CLASS \"=\", NULL, NULL, },\n+\t\t{ RTE_DEVARGS_KEY_DRIVER \"=\", NULL, NULL, },\n \t};\n \tstruct rte_kvargs_pair *kv = NULL;\n \tstruct rte_class *cls = NULL;\n@@ -118,7 +118,7 @@ rte_devargs_layers_parse(struct rte_devargs *devargs,\n \t\tif (layers[i].kvlist == NULL)\n \t\t\tcontinue;\n \t\tkv = &layers[i].kvlist->pairs[0];\n-\t\tif (strcmp(kv->key, \"bus\") == 0) {\n+\t\tif (strcmp(kv->key, RTE_DEVARGS_KEY_BUS) == 0) {\n \t\t\tbus = rte_bus_find_by_name(kv->value);\n \t\t\tif (bus == NULL) {\n \t\t\t\tRTE_LOG(ERR, EAL, \"Could not find bus \\\"%s\\\"\\n\",\n@@ -126,7 +126,7 @@ rte_devargs_layers_parse(struct rte_devargs *devargs,\n \t\t\t\tret = -EFAULT;\n \t\t\t\tgoto get_out;\n \t\t\t}\n-\t\t} else if (strcmp(kv->key, \"class\") == 0) {\n+\t\t} else if (strcmp(kv->key, RTE_DEVARGS_KEY_CLASS) == 0) {\n \t\t\tcls = rte_class_find_by_name(kv->value);\n \t\t\tif (cls == NULL) {\n \t\t\t\tRTE_LOG(ERR, EAL, \"Could not find class \\\"%s\\\"\\n\",\n@@ -134,7 +134,7 @@ rte_devargs_layers_parse(struct rte_devargs *devargs,\n \t\t\t\tret = -EFAULT;\n \t\t\t\tgoto get_out;\n \t\t\t}\n-\t\t} else if (strcmp(kv->key, \"driver\") == 0) {\n+\t\t} else if (strcmp(kv->key, RTE_DEVARGS_KEY_DRIVER) == 0) {\n \t\t\t/* Ignore */\n \t\t\tcontinue;\n \t\t}\ndiff --git a/lib/eal/include/rte_devargs.h b/lib/eal/include/rte_devargs.h\nindex 1e595b3c51..cd90944fe8 100644\n--- a/lib/eal/include/rte_devargs.h\n+++ b/lib/eal/include/rte_devargs.h\n@@ -25,6 +25,30 @@ extern \"C\" {\n #include <rte_compat.h>\n #include <rte_bus.h>\n \n+/**\n+ * Bus type key in global devargs syntax.\n+ *\n+ * Legacy devargs parser doesn't use this key as bus type\n+ * is resolved as first optional value separated by \":\".\n+ */\n+#define RTE_DEVARGS_KEY_BUS \"bus\"\n+\n+/**\n+ * Class type key in global devargs syntax.\n+ *\n+ * Legacy devargs parser doesn't parse class type. PMD driver is\n+ * encouraged to use this key to resolve class type.\n+ */\n+#define RTE_DEVARGS_KEY_CLASS \"class\"\n+\n+/**\n+ * Driver type key in global devargs syntax.\n+ *\n+ * Legacy devargs parser doesn't parse driver type. PMD driver is\n+ * encouraged to use this key to resolve driver type.\n+ */\n+#define RTE_DEVARGS_KEY_DRIVER \"driver\"\n+\n /**\n * Type of generic device\n */\n", "prefixes": [ "v5", "1/2" ] }