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GET /api/patches/94653/?format=api
{ "id": 94653, "url": "https://patches.dpdk.org/api/patches/94653/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210621150449.19070-29-tduszynski@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210621150449.19070-29-tduszynski@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210621150449.19070-29-tduszynski@marvell.com", "date": "2021-06-21T15:04:45", "name": "[v3,28/32] raw/cnxk_bphy: support for interrupt init and cleanup", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "d2b53260abaf06c54995e46a13dd8633965fdcc5", "submitter": { "id": 2215, "url": "https://patches.dpdk.org/api/people/2215/?format=api", "name": "Tomasz Duszynski", "email": "tduszynski@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210621150449.19070-29-tduszynski@marvell.com/mbox/", "series": [ { "id": 17426, "url": "https://patches.dpdk.org/api/series/17426/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17426", "date": "2021-06-21T15:04:17", "name": "add support for baseband phy", "version": 3, "mbox": "https://patches.dpdk.org/series/17426/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94653/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94653/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5347CA0547;\n\tMon, 21 Jun 2021 17:08:18 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7BB73411D7;\n\tMon, 21 Jun 2021 17:06:16 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id B49964124B\n for <dev@dpdk.org>; Mon, 21 Jun 2021 17:06:14 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15LF5D0p008464; Mon, 21 Jun 2021 08:06:14 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 39aj2xja44-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 21 Jun 2021 08:06:13 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 21 Jun 2021 08:06:12 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 21 Jun 2021 08:06:12 -0700", "from EH-LT0048.marvell.com (unknown [10.193.32.52])\n by maili.marvell.com (Postfix) with ESMTP id 11F863F705E;\n Mon, 21 Jun 2021 08:06:10 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=AMo2W02cPwyxuEsIdy0Cj118GkgwrWuzgfcCReLNgDA=;\n b=NsfTv9a0+62zNBl3YvZOYR/Hr765IoA4TRS3wkGbhtQ/2H5h09ORmp6A681deEwfdjKE\n lu9UgBgNOmW9v9izktluhoRYAgV3+GBVQFDh2HGP8mTh4jZgvKNnxBn2MV3fUPQkWoyE\n 1E/chw2JdJfsBSX1DoFxZYXtD4id01YiSDBHpZVG/CWmX4M+ZwMXcoO/Jse6Q+cbm8Ij\n 0usI5s5stk7ocvhmDKMstKLJuZUzuvKF3wUDSyOPbMevgT5FjjafIJeJ5rC1sL6LNCO4\n HxV1AKirLzJSUtfmSRJm6bmEvPoipNTDpBKwoOFumQgNzYCqHAHUuYsizLSGRibhgXL3 hg==", "From": "Tomasz Duszynski <tduszynski@marvell.com>", "To": "Jakub Palider <jpalider@marvell.com>, Tomasz Duszynski\n <tduszynski@marvell.com>", "CC": "<thomas@monjalon.net>, <dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>", "Date": "Mon, 21 Jun 2021 17:04:45 +0200", "Message-ID": "<20210621150449.19070-29-tduszynski@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210621150449.19070-1-tduszynski@marvell.com>", "References": "<20210531214142.30167-1-tduszynski@marvell.com>\n <20210621150449.19070-1-tduszynski@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "ENznfFlM6OimJCurlj5v8zi5fsRZdeqj", "X-Proofpoint-ORIG-GUID": "ENznfFlM6OimJCurlj5v8zi5fsRZdeqj", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-21_06:2021-06-21,\n 2021-06-21 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 28/32] raw/cnxk_bphy: support for interrupt\n init and cleanup", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add support for interrupt initialization and cleanup. Internally\ninterrupt initialization performs low level setup that allows\ncustom interrupt handler registration later on.\n\nInterrupt initialization and cleanup are related hence they\nare in the same patch.\n\nSigned-off-by: Jakub Palider <jpalider@marvell.com>\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\nReviewed-by: Jerin Jacob <jerinj@marvell.com>\n---\n doc/guides/rawdevs/cnxk_bphy.rst | 20 ++++++++++++\n drivers/raw/cnxk_bphy/cnxk_bphy.c | 6 ++++\n drivers/raw/cnxk_bphy/cnxk_bphy_irq.c | 47 +++++++++++++++++++++++++++\n drivers/raw/cnxk_bphy/cnxk_bphy_irq.h | 5 +++\n drivers/raw/cnxk_bphy/meson.build | 1 +\n drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 41 +++++++++++++++++++++++\n 6 files changed, 120 insertions(+)\n create mode 100644 drivers/raw/cnxk_bphy/cnxk_bphy_irq.c", "diff": "diff --git a/doc/guides/rawdevs/cnxk_bphy.rst b/doc/guides/rawdevs/cnxk_bphy.rst\nindex 120f953fb..b69c5f39a 100644\n--- a/doc/guides/rawdevs/cnxk_bphy.rst\n+++ b/doc/guides/rawdevs/cnxk_bphy.rst\n@@ -37,6 +37,9 @@ To perform data transfer use standard ``rte_rawdev_enqueue_buffers()`` and\n ``rte_rawdev_dequeue_buffers()`` APIs. Not all messages produce sensible\n responses hence dequeueing is not always necessary.\n \n+BPHY CGX/RPM PMD\n+----------------\n+\n BPHY CGX/RPM PMD accepts ``struct cnxk_bphy_cgx_msg`` messages which differ by type and payload.\n Message types along with description are listed below. As for the usage examples please refer to\n ``cnxk_bphy_cgx_dev_selftest()``.\n@@ -95,6 +98,23 @@ Message must have type set to ``CNXK_BPHY_CGX_MSG_TYPE_START_RXTX`` or\n ``CNXK_BPHY_CGX_MSG_TYPE_STOP_RXTX``. Former will enable traffic while the latter will\n do the opposite.\n \n+BPHY PMD\n+--------\n+\n+BPHY PMD accepts ``struct cnxk_bphy_irq_msg`` messages which differ by type and payload.\n+Message types along with description are listed below. For some usage examples please refer to\n+``bphy_rawdev_selftest()``.\n+\n+Initialize or finalize interrupt handling\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+Message is used to setup low level interrupt handling.\n+\n+Message must have type set to ``CNXK_BPHY_IRQ_MSG_TYPE_INIT`` or ``CNXK_BPHY_IRQ_MSG_TYPE_FINI``.\n+The former will setup low level interrupt handling while the latter will tear everything down. There\n+are also two convenience functions namely ``rte_pmd_bphy_intr_init()`` and\n+``rte_pmd_bphy_intr_fini()`` that take care of all details.\n+\n Self test\n ---------\n \ndiff --git a/drivers/raw/cnxk_bphy/cnxk_bphy.c b/drivers/raw/cnxk_bphy/cnxk_bphy.c\nindex 7e541bac4..3f8679534 100644\n--- a/drivers/raw/cnxk_bphy/cnxk_bphy.c\n+++ b/drivers/raw/cnxk_bphy/cnxk_bphy.c\n@@ -47,6 +47,12 @@ cnxk_bphy_irq_enqueue_bufs(struct rte_rawdev *dev,\n \t\treturn 0;\n \n \tswitch (msg->type) {\n+\tcase CNXK_BPHY_IRQ_MSG_TYPE_INIT:\n+\t\tret = cnxk_bphy_intr_init(dev->dev_id);\n+\t\tbreak;\n+\tcase CNXK_BPHY_IRQ_MSG_TYPE_FINI:\n+\t\tcnxk_bphy_intr_fini(dev->dev_id);\n+\t\tbreak;\n \tdefault:\n \t\tret = -EINVAL;\n \t}\ndiff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c\nnew file mode 100644\nindex 000000000..c4df539cd\n--- /dev/null\n+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.c\n@@ -0,0 +1,47 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+#include <rte_bus_pci.h>\n+#include <rte_pci.h>\n+#include <rte_rawdev.h>\n+#include <rte_rawdev_pmd.h>\n+\n+#include <roc_api.h>\n+#include <roc_bphy_irq.h>\n+\n+#include \"cnxk_bphy_irq.h\"\n+\n+static struct bphy_device *\n+cnxk_bphy_get_bphy_dev_by_dev_id(uint16_t dev_id)\n+{\n+\tstruct rte_rawdev *rawdev;\n+\n+\tif (!rte_rawdev_pmd_is_valid_dev(dev_id))\n+\t\treturn NULL;\n+\n+\trawdev = &rte_rawdevs[dev_id];\n+\n+\treturn (struct bphy_device *)rawdev->dev_private;\n+}\n+\n+int\n+cnxk_bphy_intr_init(uint16_t dev_id)\n+{\n+\tstruct bphy_device *bphy_dev = cnxk_bphy_get_bphy_dev_by_dev_id(dev_id);\n+\n+\tbphy_dev->irq_chip = roc_bphy_intr_init();\n+\tif (bphy_dev->irq_chip == NULL)\n+\t\treturn -ENOMEM;\n+\n+\treturn 0;\n+}\n+\n+void\n+cnxk_bphy_intr_fini(uint16_t dev_id)\n+{\n+\tstruct bphy_device *bphy_dev = cnxk_bphy_get_bphy_dev_by_dev_id(dev_id);\n+\tstruct roc_bphy_irq_chip *irq_chip = bphy_dev->irq_chip;\n+\n+\troc_bphy_intr_fini(irq_chip);\n+\tbphy_dev->irq_chip = NULL;\n+}\ndiff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h\nindex 16243efc9..3acc47fe8 100644\n--- a/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h\n+++ b/drivers/raw/cnxk_bphy/cnxk_bphy_irq.h\n@@ -10,6 +10,8 @@\n \n #include <roc_api.h>\n \n+typedef void (*cnxk_bphy_intr_handler_t)(int irq_num, void *isr_data);\n+\n struct bphy_mem {\n \tstruct rte_mem_resource res0;\n \tstruct rte_mem_resource res2;\n@@ -27,4 +29,7 @@ struct bphy_device {\n \tstruct bphy_irq_queue queues[1];\n };\n \n+int cnxk_bphy_intr_init(uint16_t dev_id);\n+void cnxk_bphy_intr_fini(uint16_t dev_id);\n+\n #endif /* _CNXK_BPHY_IRQ_ */\ndiff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build\nindex f2868fd68..14147feaf 100644\n--- a/drivers/raw/cnxk_bphy/meson.build\n+++ b/drivers/raw/cnxk_bphy/meson.build\n@@ -7,5 +7,6 @@ sources = files(\n 'cnxk_bphy.c',\n 'cnxk_bphy_cgx.c',\n 'cnxk_bphy_cgx_test.c',\n+ 'cnxk_bphy_irq.c',\n )\n headers = files('rte_pmd_bphy.h')\ndiff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\nindex eb39654f1..c667d984e 100644\n--- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\n+++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h\n@@ -5,6 +5,8 @@\n #ifndef _CNXK_BPHY_H_\n #define _CNXK_BPHY_H_\n \n+#include \"cnxk_bphy_irq.h\"\n+\n enum cnxk_bphy_cgx_msg_type {\n \tCNXK_BPHY_CGX_MSG_TYPE_GET_LINKINFO,\n \tCNXK_BPHY_CGX_MSG_TYPE_INTLBK_DISABLE,\n@@ -101,6 +103,8 @@ struct cnxk_bphy_cgx_msg {\n \tvoid *data;\n };\n \n+#define CNXK_BPHY_DEF_QUEUE 0\n+\n enum cnxk_bphy_irq_msg_type {\n \tCNXK_BPHY_IRQ_MSG_TYPE_INIT,\n \tCNXK_BPHY_IRQ_MSG_TYPE_FINI,\n@@ -114,4 +118,41 @@ struct cnxk_bphy_irq_msg {\n \tvoid *data;\n };\n \n+struct cnxk_bphy_irq_info {\n+\tint irq_num;\n+\tcnxk_bphy_intr_handler_t handler;\n+\tvoid *data;\n+\tint cpu;\n+};\n+\n+static __rte_always_inline int\n+rte_pmd_bphy_intr_init(uint16_t dev_id)\n+{\n+\tstruct cnxk_bphy_irq_msg msg = {\n+\t\t.type = CNXK_BPHY_IRQ_MSG_TYPE_INIT,\n+\t};\n+\tstruct rte_rawdev_buf *bufs[1];\n+\tstruct rte_rawdev_buf buf;\n+\n+\tbuf.buf_addr = &msg;\n+\tbufs[0] = &buf;\n+\n+\treturn rte_rawdev_enqueue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE);\n+}\n+\n+static __rte_always_inline void\n+rte_pmd_bphy_intr_fini(uint16_t dev_id)\n+{\n+\tstruct cnxk_bphy_irq_msg msg = {\n+\t\t.type = CNXK_BPHY_IRQ_MSG_TYPE_FINI,\n+\t};\n+\tstruct rte_rawdev_buf *bufs[1];\n+\tstruct rte_rawdev_buf buf;\n+\n+\tbuf.buf_addr = &msg;\n+\tbufs[0] = &buf;\n+\n+\trte_rawdev_enqueue_buffers(dev_id, bufs, 1, CNXK_BPHY_DEF_QUEUE);\n+}\n+\n #endif /* _CNXK_BPHY_H_ */\n", "prefixes": [ "v3", "28/32" ] }