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GET /api/patches/94641/?format=api
{ "id": 94641, "url": "https://patches.dpdk.org/api/patches/94641/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210621150449.19070-17-tduszynski@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210621150449.19070-17-tduszynski@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210621150449.19070-17-tduszynski@marvell.com", "date": "2021-06-21T15:04:33", "name": "[v3,16/32] common/cnxk: support for baseband PHY irq setup", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "1590b77227fc0ec62a4ab9db0bfee46ac30b4e97", "submitter": { "id": 2215, "url": "https://patches.dpdk.org/api/people/2215/?format=api", "name": "Tomasz Duszynski", "email": "tduszynski@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210621150449.19070-17-tduszynski@marvell.com/mbox/", "series": [ { "id": 17426, "url": "https://patches.dpdk.org/api/series/17426/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17426", "date": "2021-06-21T15:04:17", "name": "add support for baseband phy", "version": 3, "mbox": "https://patches.dpdk.org/series/17426/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/94641/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/94641/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 24B5DA0547;\n\tMon, 21 Jun 2021 17:07:03 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D18CF41215;\n\tMon, 21 Jun 2021 17:05:48 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id C56D3411B9\n for <dev@dpdk.org>; Mon, 21 Jun 2021 17:05:47 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 15LF5EUi008501; Mon, 21 Jun 2021 08:05:44 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 39aj2xja1t-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 21 Jun 2021 08:05:44 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 21 Jun 2021 08:05:43 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 21 Jun 2021 08:05:43 -0700", "from EH-LT0048.marvell.com (unknown [10.193.32.52])\n by maili.marvell.com (Postfix) with ESMTP id B262B3F705B;\n Mon, 21 Jun 2021 08:05:40 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=dPLTINyO74HBOj3233+HmvUS6gLP7USD24NUpujgArw=;\n b=NcF3ycXbCH1Wq5Uhf+tEB6qRByO9339Zmnz/C9CbcszYp3rlzxJqIlAUjMO7zjl9UpPY\n naMMkLzX9rNAzs3K8BxyHa9xjGheyBNKe4Y467oool3U5FHdD8qkxCWAU7PPIrm/14jt\n nw2rJE4yGwNOVFUbMRkaf0fgtl0RVYQ6A8/bcQCS0NRblcvjzbOKkdpKCJfwjUBQrS+Z\n wuP/8fxGvP+J/EC+syQKKXD9gJQ1e9Nx9OesGzdy+rI5h+J6gbNP/JON3YOvko/AqFwU\n 9Y07ALNhusb0ScyPmISH+eZpm+sLQ6xwoK2NrYWoJqurw9nfWNIz5qMji2EFO4bubycX 7w==", "From": "Tomasz Duszynski <tduszynski@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>, Neil Horman\n <nhorman@tuxdriver.com>", "CC": "<thomas@monjalon.net>, <dev@dpdk.org>, Tomasz Duszynski\n <tduszynski@marvell.com>, Jakub Palider <jpalider@marvell.com>, Jerin Jacob\n <jerinj@marvell.com>", "Date": "Mon, 21 Jun 2021 17:04:33 +0200", "Message-ID": "<20210621150449.19070-17-tduszynski@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210621150449.19070-1-tduszynski@marvell.com>", "References": "<20210531214142.30167-1-tduszynski@marvell.com>\n <20210621150449.19070-1-tduszynski@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "hHPlJl-SSrGHrsD7nla_GQQQ3EEVjht7", "X-Proofpoint-ORIG-GUID": "hHPlJl-SSrGHrsD7nla_GQQQ3EEVjht7", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790\n definitions=2021-06-21_06:2021-06-21,\n 2021-06-21 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 16/32] common/cnxk: support for baseband PHY\n irq setup", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add support for initializing baseband phy irqs. While at it\nalso add support for reverting back to the default state.\n\nSigned-off-by: Jakub Palider <jpalider@marvell.com>\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\nReviewed-by: Jerin Jacob <jerinj@marvell.com>\n---\n drivers/common/cnxk/meson.build | 1 +\n drivers/common/cnxk/roc_bphy_irq.c | 96 ++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_bphy_irq.h | 27 +++++++++\n drivers/common/cnxk/version.map | 2 +\n 4 files changed, 126 insertions(+)\n create mode 100644 drivers/common/cnxk/roc_bphy_irq.c\n create mode 100644 drivers/common/cnxk/roc_bphy_irq.h", "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex 946b98f46..c0ec54932 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -13,6 +13,7 @@ deps = ['eal', 'pci', 'bus_pci', 'mbuf']\n sources = files(\n 'roc_bphy.c',\n 'roc_bphy_cgx.c',\n+ 'roc_bphy_irq.c',\n 'roc_dev.c',\n 'roc_idev.c',\n 'roc_irq.c',\ndiff --git a/drivers/common/cnxk/roc_bphy_irq.c b/drivers/common/cnxk/roc_bphy_irq.c\nnew file mode 100644\nindex 000000000..c57506542\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_bphy_irq.c\n@@ -0,0 +1,96 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+#include <fcntl.h>\n+#include <sys/ioctl.h>\n+#include <unistd.h>\n+\n+#include \"roc_api.h\"\n+#include \"roc_bphy_irq.h\"\n+\n+#define ROC_BPHY_MEMZONE_NAME \"roc_bphy_mz\"\n+#define ROC_BPHY_CTR_DEV_PATH \"/dev/otx-bphy-ctr\"\n+\n+#define ROC_BPHY_IOC_MAGIC 0xF3\n+#define ROC_BPHY_IOC_GET_BPHY_MAX_IRQ\t_IOR(ROC_BPHY_IOC_MAGIC, 3, uint64_t)\n+#define ROC_BPHY_IOC_GET_BPHY_BMASK_IRQ _IOR(ROC_BPHY_IOC_MAGIC, 4, uint64_t)\n+\n+struct roc_bphy_irq_chip *\n+roc_bphy_intr_init(void)\n+{\n+\tstruct roc_bphy_irq_chip *irq_chip;\n+\tuint64_t max_irq, i, avail_irqs;\n+\tint fd, ret;\n+\n+\tfd = open(ROC_BPHY_CTR_DEV_PATH, O_RDWR | O_SYNC);\n+\tif (fd < 0) {\n+\t\tplt_err(\"Failed to open %s\", ROC_BPHY_CTR_DEV_PATH);\n+\t\treturn NULL;\n+\t}\n+\n+\tret = ioctl(fd, ROC_BPHY_IOC_GET_BPHY_MAX_IRQ, &max_irq);\n+\tif (ret < 0) {\n+\t\tplt_err(\"Failed to get max irq number via ioctl\");\n+\t\tgoto err_ioctl;\n+\t}\n+\n+\tret = ioctl(fd, ROC_BPHY_IOC_GET_BPHY_BMASK_IRQ, &avail_irqs);\n+\tif (ret < 0) {\n+\t\tplt_err(\"Failed to get available irqs bitmask via ioctl\");\n+\t\tgoto err_ioctl;\n+\t}\n+\n+\tirq_chip = plt_zmalloc(sizeof(*irq_chip), 0);\n+\tif (irq_chip == NULL) {\n+\t\tplt_err(\"Failed to alloc irq_chip\");\n+\t\tgoto err_alloc_chip;\n+\t}\n+\n+\tirq_chip->intfd = fd;\n+\tirq_chip->max_irq = max_irq;\n+\tirq_chip->avail_irq_bmask = avail_irqs;\n+\tirq_chip->irq_vecs =\n+\t\tplt_zmalloc(irq_chip->max_irq * sizeof(*irq_chip->irq_vecs), 0);\n+\tif (irq_chip->irq_vecs == NULL) {\n+\t\tplt_err(\"Failed to alloc irq_chip irq_vecs\");\n+\t\tgoto err_alloc_irq;\n+\t}\n+\n+\tirq_chip->mz_name = plt_zmalloc(strlen(ROC_BPHY_MEMZONE_NAME) + 1, 0);\n+\tif (irq_chip->mz_name == NULL) {\n+\t\tplt_err(\"Failed to alloc irq_chip name\");\n+\t\tgoto err_alloc_name;\n+\t}\n+\tplt_strlcpy(irq_chip->mz_name, ROC_BPHY_MEMZONE_NAME,\n+\t\t strlen(ROC_BPHY_MEMZONE_NAME) + 1);\n+\n+\tfor (i = 0; i < irq_chip->max_irq; i++) {\n+\t\tirq_chip->irq_vecs[i].fd = -1;\n+\t\tirq_chip->irq_vecs[i].handler_cpu = -1;\n+\t}\n+\n+\treturn irq_chip;\n+\n+err_alloc_name:\n+\tplt_free(irq_chip->irq_vecs);\n+\n+err_alloc_irq:\n+\tplt_free(irq_chip);\n+\n+err_ioctl:\n+err_alloc_chip:\n+\tclose(fd);\n+\treturn NULL;\n+}\n+\n+void\n+roc_bphy_intr_fini(struct roc_bphy_irq_chip *irq_chip)\n+{\n+\tif (irq_chip == NULL)\n+\t\treturn;\n+\n+\tclose(irq_chip->intfd);\n+\tplt_free(irq_chip->mz_name);\n+\tplt_free(irq_chip->irq_vecs);\n+\tplt_free(irq_chip);\n+}\ndiff --git a/drivers/common/cnxk/roc_bphy_irq.h b/drivers/common/cnxk/roc_bphy_irq.h\nnew file mode 100644\nindex 000000000..b5200786b\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_bphy_irq.h\n@@ -0,0 +1,27 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef _ROC_BPHY_IRQ_\n+#define _ROC_BPHY_IRQ_\n+\n+struct roc_bphy_irq_vec {\n+\tint fd;\n+\tint handler_cpu;\n+\tvoid (*handler)(int irq_num, void *isr_data);\n+\tvoid *isr_data;\n+};\n+\n+struct roc_bphy_irq_chip {\n+\tstruct roc_bphy_irq_vec *irq_vecs;\n+\tuint64_t max_irq;\n+\tuint64_t avail_irq_bmask;\n+\tint intfd;\n+\tint n_handlers;\n+\tchar *mz_name;\n+};\n+\n+__roc_api struct roc_bphy_irq_chip *roc_bphy_intr_init(void);\n+__roc_api void roc_bphy_intr_fini(struct roc_bphy_irq_chip *irq_chip);\n+\n+#endif /* _ROC_BPHY_IRQ_ */\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 25083d9d4..483e52018 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -22,6 +22,8 @@ INTERNAL {\n \troc_bphy_cgx_stop_rxtx;\n \troc_bphy_dev_fini;\n \troc_bphy_dev_init;\n+\troc_bphy_intr_fini;\n+\troc_bphy_intr_init;\n \troc_clk_freq_get;\n \troc_error_msg_get;\n \troc_idev_lmt_base_addr_get;\n", "prefixes": [ "v3", "16/32" ] }