get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/94603/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 94603,
    "url": "https://patches.dpdk.org/api/patches/94603/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210621075206.4020456-6-robinx.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210621075206.4020456-6-robinx.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210621075206.4020456-6-robinx.zhang@intel.com",
    "date": "2021-06-21T07:51:56",
    "name": "[v3,05/15] net/i40e/base: define new Shadow RAM pointers",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5739f6fad10d6e03d8068cb318a535a823151e05",
    "submitter": {
        "id": 2004,
        "url": "https://patches.dpdk.org/api/people/2004/?format=api",
        "name": "Robin Zhang",
        "email": "robinx.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210621075206.4020456-6-robinx.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 17420,
            "url": "https://patches.dpdk.org/api/series/17420/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17420",
            "date": "2021-06-21T07:51:52",
            "name": "i40e base code update",
            "version": 3,
            "mbox": "https://patches.dpdk.org/series/17420/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/94603/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/94603/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 05D6AA0547;\n\tMon, 21 Jun 2021 10:02:49 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E018041197;\n\tMon, 21 Jun 2021 10:02:43 +0200 (CEST)",
            "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id 37FE041191\n for <dev@dpdk.org>; Mon, 21 Jun 2021 10:02:43 +0200 (CEST)",
            "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Jun 2021 01:02:42 -0700",
            "from unknown (HELO intel-npg-odc-srv03.cd.intel.com)\n ([10.240.178.145])\n by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Jun 2021 01:02:40 -0700"
        ],
        "IronPort-SDR": [
            "\n I5ecP7CKl98iCziPCCgPae59WYv16/w9ipx+lAr0preJDe312VJoeAvx83R/BPoB+4e0cE6u8l\n lAISse3scNnA==",
            "\n f9f0GFyDDWkgpCuydgPdv5w07F9JR/angJ9ypHpF32BO1Z3uSKp35H2QfGXPmmFBQHF+0N8Rl+\n v06TtFDuW8LQ=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,10021\"; a=\"270643194\"",
            "E=Sophos;i=\"5.83,289,1616482800\"; d=\"scan'208\";a=\"270643194\"",
            "E=Sophos;i=\"5.83,289,1616482800\"; d=\"scan'208\";a=\"452101864\""
        ],
        "From": "Robin Zhang <robinx.zhang@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "beilei.xing@intel.com, junfeng.guo@intel.com, stevex.yang@intel.com,\n Robin Zhang <robinx.zhang@intel.com>,\n Stanislaw Grzeszczak <stanislaw.a.grzeszczak@intel.com>",
        "Date": "Mon, 21 Jun 2021 07:51:56 +0000",
        "Message-Id": "<20210621075206.4020456-6-robinx.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20210621075206.4020456-1-robinx.zhang@intel.com>",
        "References": "<20210618063851.3694702-1-robinx.zhang@intel.com>\n <20210621075206.4020456-1-robinx.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v3 05/15] net/i40e/base: define new Shadow RAM\n pointers",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add definitions for Shadow RAM pointers: 6th FPA module, 5th FPA module\nin X722 and Preservation Rules Module.\n\nSigned-off-by: Stanislaw Grzeszczak <stanislaw.a.grzeszczak@intel.com>\nSigned-off-by: Robin Zhang <robinx.zhang@intel.com>\n---\n drivers/net/i40e/base/i40e_type.h | 3 +++\n 1 file changed, 3 insertions(+)",
    "diff": "diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h\nindex cf41345834..e5a3729183 100644\n--- a/drivers/net/i40e/base/i40e_type.h\n+++ b/drivers/net/i40e/base/i40e_type.h\n@@ -1555,6 +1555,9 @@ struct i40e_hw_port_stats {\n #define I40E_SR_FEATURE_CONFIGURATION_PTR\t0x49\n #define I40E_SR_CONFIGURATION_METADATA_PTR\t0x4D\n #define I40E_SR_IMMEDIATE_VALUES_PTR\t\t0x4E\n+#define I40E_SR_PRESERVATION_RULES_PTR\t\t0x70\n+#define I40E_X722_SR_5TH_FREE_PROVISION_AREA_PTR\t0x71\n+#define I40E_SR_6TH_FREE_PROVISION_AREA_PTR\t0x71\n \n /* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */\n #define I40E_SR_VPD_MODULE_MAX_SIZE\t\t1024\n",
    "prefixes": [
        "v3",
        "05/15"
    ]
}