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GET /api/patches/94334/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 94334,
    "url": "https://patches.dpdk.org/api/patches/94334/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210617110005.4132926-10-jiawenwu@trustnetic.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210617110005.4132926-10-jiawenwu@trustnetic.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210617110005.4132926-10-jiawenwu@trustnetic.com",
    "date": "2021-06-17T10:59:55",
    "name": "[v6,09/19] net/ngbe: store MAC address",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "3f56eab4e5b82182d52acc24206e232eb26f2794",
    "submitter": {
        "id": 1932,
        "url": "https://patches.dpdk.org/api/people/1932/?format=api",
        "name": "Jiawen Wu",
        "email": "jiawenwu@trustnetic.com"
    },
    "delegate": {
        "id": 3961,
        "url": "https://patches.dpdk.org/api/users/3961/?format=api",
        "username": "arybchenko",
        "first_name": "Andrew",
        "last_name": "Rybchenko",
        "email": "andrew.rybchenko@oktetlabs.ru"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210617110005.4132926-10-jiawenwu@trustnetic.com/mbox/",
    "series": [
        {
            "id": 17372,
            "url": "https://patches.dpdk.org/api/series/17372/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17372",
            "date": "2021-06-17T10:59:46",
            "name": "net: ngbe PMD",
            "version": 6,
            "mbox": "https://patches.dpdk.org/series/17372/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/94334/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/94334/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B63EFA0C4D;\n\tThu, 17 Jun 2021 12:59:19 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 863B041145;\n\tThu, 17 Jun 2021 12:58:28 +0200 (CEST)",
            "from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166])\n by mails.dpdk.org (Postfix) with ESMTP id B1C5A40687\n for <dev@dpdk.org>; Thu, 17 Jun 2021 12:58:25 +0200 (CEST)",
            "from wxdbg.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Thu, 17 Jun 2021 18:58:20 +0800 (CST)"
        ],
        "X-QQ-mid": "bizesmtp46t1623927501ty5i8vyx",
        "X-QQ-SSF": "01400000000000D0E000B00A0000000",
        "X-QQ-FEAT": "6Urm6peds7VCMIus9ImH74NrRjRYnIpqQhiZTzt1DaoiRFASujgxGs5y7rSRT\n E52GhzeNAqt+Rw23tsnQBdzZNt/0x2afPIFNQVOCbEWK4tWeIGf0tgTgySHwOFKb+wXkxIQ\n AFpM3OjMh9tjkxmhplVhIbQmCnE597FgY+UMM3BTUUE4LY/02fhDcT39GhkV5LNvnDUp8t2\n DEPg8Xd0yuRMzmj6Te05gp2gSQqEpwZkcJuiNxedoxJETgAKPeT9MEsPrqT7Iw4W9PM+Els\n ihuRVLe2A+dHBRIQ5AAMTJE4NXdZXkhGSgy5Dqt30lLJkXh9/3KUQ1DO43bpkK9/3U1hiZ1\n EjYCKiP+lK57nV+grNq8yFZ7T15Hg==",
        "X-QQ-GoodBg": "2",
        "From": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "To": "dev@dpdk.org",
        "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>",
        "Date": "Thu, 17 Jun 2021 18:59:55 +0800",
        "Message-Id": "<20210617110005.4132926-10-jiawenwu@trustnetic.com>",
        "X-Mailer": "git-send-email 2.27.0",
        "In-Reply-To": "<20210617110005.4132926-1-jiawenwu@trustnetic.com>",
        "References": "<20210617110005.4132926-1-jiawenwu@trustnetic.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-QQ-SENDSIZE": "520",
        "Feedback-ID": "bizesmtp:trustnetic.com:qybgforeign:qybgforeign1",
        "X-QQ-Bgrelay": "1",
        "Subject": "[dpdk-dev] [PATCH v6 09/19] net/ngbe: store MAC address",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Store MAC addresses and init receive address filters.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n drivers/net/ngbe/base/ngbe_dummy.h |  33 +++\n drivers/net/ngbe/base/ngbe_hw.c    | 323 +++++++++++++++++++++++++++++\n drivers/net/ngbe/base/ngbe_hw.h    |  13 ++\n drivers/net/ngbe/base/ngbe_type.h  |  19 ++\n drivers/net/ngbe/ngbe_ethdev.c     |  25 +++\n drivers/net/ngbe/ngbe_ethdev.h     |   2 +\n 6 files changed, 415 insertions(+)",
    "diff": "diff --git a/drivers/net/ngbe/base/ngbe_dummy.h b/drivers/net/ngbe/base/ngbe_dummy.h\nindex 15017cfd82..8462d6d1cb 100644\n--- a/drivers/net/ngbe/base/ngbe_dummy.h\n+++ b/drivers/net/ngbe/base/ngbe_dummy.h\n@@ -51,6 +51,10 @@ static inline s32 ngbe_mac_stop_hw_dummy(struct ngbe_hw *TUP0)\n {\n \treturn NGBE_ERR_OPS_DUMMY;\n }\n+static inline s32 ngbe_mac_get_mac_addr_dummy(struct ngbe_hw *TUP0, u8 *TUP1)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0,\n \t\t\t\t\tu32 TUP1)\n {\n@@ -60,6 +64,29 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct ngbe_hw *TUP0,\n \t\t\t\t\tu32 TUP1)\n {\n }\n+static inline s32 ngbe_mac_set_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1,\n+\t\t\t\t\tu8 *TUP2, u32 TUP3, u32 TUP4)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 ngbe_mac_clear_rar_dummy(struct ngbe_hw *TUP0, u32 TUP1)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 ngbe_mac_set_vmdq_dummy(struct ngbe_hw *TUP0, u32 TUP1,\n+\t\t\t\t\tu32 TUP2)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 ngbe_mac_clear_vmdq_dummy(struct ngbe_hw *TUP0, u32 TUP1,\n+\t\t\t\t\tu32 TUP2)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n+static inline s32 ngbe_mac_init_rx_addrs_dummy(struct ngbe_hw *TUP0)\n+{\n+\treturn NGBE_ERR_OPS_DUMMY;\n+}\n static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct ngbe_hw *TUP0)\n {\n \treturn NGBE_ERR_OPS_DUMMY;\n@@ -105,8 +132,14 @@ static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)\n \thw->mac.init_hw = ngbe_mac_init_hw_dummy;\n \thw->mac.reset_hw = ngbe_mac_reset_hw_dummy;\n \thw->mac.stop_hw = ngbe_mac_stop_hw_dummy;\n+\thw->mac.get_mac_addr = ngbe_mac_get_mac_addr_dummy;\n \thw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;\n \thw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;\n+\thw->mac.set_rar = ngbe_mac_set_rar_dummy;\n+\thw->mac.clear_rar = ngbe_mac_clear_rar_dummy;\n+\thw->mac.set_vmdq = ngbe_mac_set_vmdq_dummy;\n+\thw->mac.clear_vmdq = ngbe_mac_clear_vmdq_dummy;\n+\thw->mac.init_rx_addrs = ngbe_mac_init_rx_addrs_dummy;\n \thw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;\n \thw->mac.check_overtemp = ngbe_mac_check_overtemp_dummy;\n \thw->phy.identify = ngbe_phy_identify_dummy;\ndiff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c\nindex 5723213209..7f20d6c807 100644\n--- a/drivers/net/ngbe/base/ngbe_hw.c\n+++ b/drivers/net/ngbe/base/ngbe_hw.c\n@@ -142,9 +142,49 @@ s32 ngbe_reset_hw_em(struct ngbe_hw *hw)\n \n \tmsec_delay(50);\n \n+\t/* Store the permanent mac address */\n+\thw->mac.get_mac_addr(hw, hw->mac.perm_addr);\n+\n+\t/*\n+\t * Store MAC address from RAR0, clear receive address registers, and\n+\t * clear the multicast table.\n+\t */\n+\thw->mac.num_rar_entries = NGBE_EM_RAR_ENTRIES;\n+\thw->mac.init_rx_addrs(hw);\n+\n \treturn status;\n }\n \n+/**\n+ *  ngbe_get_mac_addr - Generic get MAC address\n+ *  @hw: pointer to hardware structure\n+ *  @mac_addr: Adapter MAC address\n+ *\n+ *  Reads the adapter's MAC address from first Receive Address Register (RAR0)\n+ *  A reset of the adapter must be performed prior to calling this function\n+ *  in order for the MAC address to have been loaded from the EEPROM into RAR0\n+ **/\n+s32 ngbe_get_mac_addr(struct ngbe_hw *hw, u8 *mac_addr)\n+{\n+\tu32 rar_high;\n+\tu32 rar_low;\n+\tu16 i;\n+\n+\tDEBUGFUNC(\"ngbe_get_mac_addr\");\n+\n+\twr32(hw, NGBE_ETHADDRIDX, 0);\n+\trar_high = rd32(hw, NGBE_ETHADDRH);\n+\trar_low = rd32(hw, NGBE_ETHADDRL);\n+\n+\tfor (i = 0; i < 2; i++)\n+\t\tmac_addr[i] = (u8)(rar_high >> (1 - i) * 8);\n+\n+\tfor (i = 0; i < 4; i++)\n+\t\tmac_addr[i + 2] = (u8)(rar_low >> (3 - i) * 8);\n+\n+\treturn 0;\n+}\n+\n /**\n  *  ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices\n  *  @hw: pointer to the HW structure\n@@ -215,6 +255,196 @@ s32 ngbe_stop_hw(struct ngbe_hw *hw)\n \treturn 0;\n }\n \n+/**\n+ *  ngbe_validate_mac_addr - Validate MAC address\n+ *  @mac_addr: pointer to MAC address.\n+ *\n+ *  Tests a MAC address to ensure it is a valid Individual Address.\n+ **/\n+s32 ngbe_validate_mac_addr(u8 *mac_addr)\n+{\n+\ts32 status = 0;\n+\n+\tDEBUGFUNC(\"ngbe_validate_mac_addr\");\n+\n+\t/* Make sure it is not a multicast address */\n+\tif (NGBE_IS_MULTICAST((struct rte_ether_addr *)mac_addr)) {\n+\t\tstatus = NGBE_ERR_INVALID_MAC_ADDR;\n+\t/* Not a broadcast address */\n+\t} else if (NGBE_IS_BROADCAST((struct rte_ether_addr *)mac_addr)) {\n+\t\tstatus = NGBE_ERR_INVALID_MAC_ADDR;\n+\t/* Reject the zero address */\n+\t} else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&\n+\t\t   mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {\n+\t\tstatus = NGBE_ERR_INVALID_MAC_ADDR;\n+\t}\n+\treturn status;\n+}\n+\n+/**\n+ *  ngbe_set_rar - Set Rx address register\n+ *  @hw: pointer to hardware structure\n+ *  @index: Receive address register to write\n+ *  @addr: Address to put into receive address register\n+ *  @vmdq: VMDq \"set\" or \"pool\" index\n+ *  @enable_addr: set flag that address is active\n+ *\n+ *  Puts an ethernet address into a receive address register.\n+ **/\n+s32 ngbe_set_rar(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,\n+\t\t\t  u32 enable_addr)\n+{\n+\tu32 rar_low, rar_high;\n+\tu32 rar_entries = hw->mac.num_rar_entries;\n+\n+\tDEBUGFUNC(\"ngbe_set_rar\");\n+\n+\t/* Make sure we are using a valid rar index range */\n+\tif (index >= rar_entries) {\n+\t\tDEBUGOUT(\"RAR index %d is out of range.\\n\", index);\n+\t\treturn NGBE_ERR_INVALID_ARGUMENT;\n+\t}\n+\n+\t/* setup VMDq pool selection before this RAR gets enabled */\n+\thw->mac.set_vmdq(hw, index, vmdq);\n+\n+\t/*\n+\t * HW expects these in little endian so we reverse the byte\n+\t * order from network order (big endian) to little endian\n+\t */\n+\trar_low = NGBE_ETHADDRL_AD0(addr[5]) |\n+\t\t  NGBE_ETHADDRL_AD1(addr[4]) |\n+\t\t  NGBE_ETHADDRL_AD2(addr[3]) |\n+\t\t  NGBE_ETHADDRL_AD3(addr[2]);\n+\t/*\n+\t * Some parts put the VMDq setting in the extra RAH bits,\n+\t * so save everything except the lower 16 bits that hold part\n+\t * of the address and the address valid bit.\n+\t */\n+\trar_high = rd32(hw, NGBE_ETHADDRH);\n+\trar_high &= ~NGBE_ETHADDRH_AD_MASK;\n+\trar_high |= (NGBE_ETHADDRH_AD4(addr[1]) |\n+\t\t     NGBE_ETHADDRH_AD5(addr[0]));\n+\n+\trar_high &= ~NGBE_ETHADDRH_VLD;\n+\tif (enable_addr != 0)\n+\t\trar_high |= NGBE_ETHADDRH_VLD;\n+\n+\twr32(hw, NGBE_ETHADDRIDX, index);\n+\twr32(hw, NGBE_ETHADDRL, rar_low);\n+\twr32(hw, NGBE_ETHADDRH, rar_high);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ *  ngbe_clear_rar - Remove Rx address register\n+ *  @hw: pointer to hardware structure\n+ *  @index: Receive address register to write\n+ *\n+ *  Clears an ethernet address from a receive address register.\n+ **/\n+s32 ngbe_clear_rar(struct ngbe_hw *hw, u32 index)\n+{\n+\tu32 rar_high;\n+\tu32 rar_entries = hw->mac.num_rar_entries;\n+\n+\tDEBUGFUNC(\"ngbe_clear_rar\");\n+\n+\t/* Make sure we are using a valid rar index range */\n+\tif (index >= rar_entries) {\n+\t\tDEBUGOUT(\"RAR index %d is out of range.\\n\", index);\n+\t\treturn NGBE_ERR_INVALID_ARGUMENT;\n+\t}\n+\n+\t/*\n+\t * Some parts put the VMDq setting in the extra RAH bits,\n+\t * so save everything except the lower 16 bits that hold part\n+\t * of the address and the address valid bit.\n+\t */\n+\twr32(hw, NGBE_ETHADDRIDX, index);\n+\trar_high = rd32(hw, NGBE_ETHADDRH);\n+\trar_high &= ~(NGBE_ETHADDRH_AD_MASK | NGBE_ETHADDRH_VLD);\n+\n+\twr32(hw, NGBE_ETHADDRL, 0);\n+\twr32(hw, NGBE_ETHADDRH, rar_high);\n+\n+\t/* clear VMDq pool/queue selection for this RAR */\n+\thw->mac.clear_vmdq(hw, index, BIT_MASK32);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ *  ngbe_init_rx_addrs - Initializes receive address filters.\n+ *  @hw: pointer to hardware structure\n+ *\n+ *  Places the MAC address in receive address register 0 and clears the rest\n+ *  of the receive address registers. Clears the multicast table. Assumes\n+ *  the receiver is in reset when the routine is called.\n+ **/\n+s32 ngbe_init_rx_addrs(struct ngbe_hw *hw)\n+{\n+\tu32 i;\n+\tu32 psrctl;\n+\tu32 rar_entries = hw->mac.num_rar_entries;\n+\n+\tDEBUGFUNC(\"ngbe_init_rx_addrs\");\n+\n+\t/*\n+\t * If the current mac address is valid, assume it is a software override\n+\t * to the permanent address.\n+\t * Otherwise, use the permanent address from the eeprom.\n+\t */\n+\tif (ngbe_validate_mac_addr(hw->mac.addr) ==\n+\t    NGBE_ERR_INVALID_MAC_ADDR) {\n+\t\t/* Get the MAC address from the RAR0 for later reference */\n+\t\thw->mac.get_mac_addr(hw, hw->mac.addr);\n+\n+\t\tDEBUGOUT(\" Keeping Current RAR0 Addr =%.2X %.2X %.2X \",\n+\t\t\t  hw->mac.addr[0], hw->mac.addr[1],\n+\t\t\t  hw->mac.addr[2]);\n+\t\tDEBUGOUT(\"%.2X %.2X %.2X\\n\", hw->mac.addr[3],\n+\t\t\t  hw->mac.addr[4], hw->mac.addr[5]);\n+\t} else {\n+\t\t/* Setup the receive address. */\n+\t\tDEBUGOUT(\"Overriding MAC Address in RAR[0]\\n\");\n+\t\tDEBUGOUT(\" New MAC Addr =%.2X %.2X %.2X \",\n+\t\t\t  hw->mac.addr[0], hw->mac.addr[1],\n+\t\t\t  hw->mac.addr[2]);\n+\t\tDEBUGOUT(\"%.2X %.2X %.2X\\n\", hw->mac.addr[3],\n+\t\t\t  hw->mac.addr[4], hw->mac.addr[5]);\n+\n+\t\thw->mac.set_rar(hw, 0, hw->mac.addr, 0, true);\n+\t}\n+\n+\t/* clear VMDq pool/queue selection for RAR 0 */\n+\thw->mac.clear_vmdq(hw, 0, BIT_MASK32);\n+\n+\t/* Zero out the other receive addresses. */\n+\tDEBUGOUT(\"Clearing RAR[1-%d]\\n\", rar_entries - 1);\n+\tfor (i = 1; i < rar_entries; i++) {\n+\t\twr32(hw, NGBE_ETHADDRIDX, i);\n+\t\twr32(hw, NGBE_ETHADDRL, 0);\n+\t\twr32(hw, NGBE_ETHADDRH, 0);\n+\t}\n+\n+\t/* Clear the MTA */\n+\thw->addr_ctrl.mta_in_use = 0;\n+\tpsrctl = rd32(hw, NGBE_PSRCTL);\n+\tpsrctl &= ~(NGBE_PSRCTL_ADHF12_MASK | NGBE_PSRCTL_MCHFENA);\n+\tpsrctl |= NGBE_PSRCTL_ADHF12(hw->mac.mc_filter_type);\n+\twr32(hw, NGBE_PSRCTL, psrctl);\n+\n+\tDEBUGOUT(\" Clearing MTA\\n\");\n+\tfor (i = 0; i < hw->mac.mcft_size; i++)\n+\t\twr32(hw, NGBE_MCADDRTBL(i), 0);\n+\n+\tngbe_init_uta_tables(hw);\n+\n+\treturn 0;\n+}\n+\n /**\n  *  ngbe_acquire_swfw_sync - Acquire SWFW semaphore\n  *  @hw: pointer to hardware structure\n@@ -286,6 +516,89 @@ void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask)\n \tngbe_release_eeprom_semaphore(hw);\n }\n \n+/**\n+ *  ngbe_clear_vmdq - Disassociate a VMDq pool index from a rx address\n+ *  @hw: pointer to hardware struct\n+ *  @rar: receive address register index to disassociate\n+ *  @vmdq: VMDq pool index to remove from the rar\n+ **/\n+s32 ngbe_clear_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq)\n+{\n+\tu32 mpsar;\n+\tu32 rar_entries = hw->mac.num_rar_entries;\n+\n+\tDEBUGFUNC(\"ngbe_clear_vmdq\");\n+\n+\t/* Make sure we are using a valid rar index range */\n+\tif (rar >= rar_entries) {\n+\t\tDEBUGOUT(\"RAR index %d is out of range.\\n\", rar);\n+\t\treturn NGBE_ERR_INVALID_ARGUMENT;\n+\t}\n+\n+\twr32(hw, NGBE_ETHADDRIDX, rar);\n+\tmpsar = rd32(hw, NGBE_ETHADDRASS);\n+\n+\tif (NGBE_REMOVED(hw->hw_addr))\n+\t\tgoto done;\n+\n+\tif (!mpsar)\n+\t\tgoto done;\n+\n+\tmpsar &= ~(1 << vmdq);\n+\twr32(hw, NGBE_ETHADDRASS, mpsar);\n+\n+\t/* was that the last pool using this rar? */\n+\tif (mpsar == 0 && rar != 0)\n+\t\thw->mac.clear_rar(hw, rar);\n+done:\n+\treturn 0;\n+}\n+\n+/**\n+ *  ngbe_set_vmdq - Associate a VMDq pool index with a rx address\n+ *  @hw: pointer to hardware struct\n+ *  @rar: receive address register index to associate with a VMDq index\n+ *  @vmdq: VMDq pool index\n+ **/\n+s32 ngbe_set_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq)\n+{\n+\tu32 mpsar;\n+\tu32 rar_entries = hw->mac.num_rar_entries;\n+\n+\tDEBUGFUNC(\"ngbe_set_vmdq\");\n+\n+\t/* Make sure we are using a valid rar index range */\n+\tif (rar >= rar_entries) {\n+\t\tDEBUGOUT(\"RAR index %d is out of range.\\n\", rar);\n+\t\treturn NGBE_ERR_INVALID_ARGUMENT;\n+\t}\n+\n+\twr32(hw, NGBE_ETHADDRIDX, rar);\n+\n+\tmpsar = rd32(hw, NGBE_ETHADDRASS);\n+\tmpsar |= 1 << vmdq;\n+\twr32(hw, NGBE_ETHADDRASS, mpsar);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ *  ngbe_init_uta_tables - Initialize the Unicast Table Array\n+ *  @hw: pointer to hardware structure\n+ **/\n+s32 ngbe_init_uta_tables(struct ngbe_hw *hw)\n+{\n+\tint i;\n+\n+\tDEBUGFUNC(\"ngbe_init_uta_tables\");\n+\tDEBUGOUT(\" Clearing UTA\\n\");\n+\n+\tfor (i = 0; i < 128; i++)\n+\t\twr32(hw, NGBE_UCADDRTBL(i), 0);\n+\n+\treturn 0;\n+}\n+\n /**\n  *  ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds\n  *  @hw: pointer to hardware structure\n@@ -481,10 +794,18 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw)\n \t/* MAC */\n \tmac->init_hw = ngbe_init_hw;\n \tmac->reset_hw = ngbe_reset_hw_em;\n+\tmac->get_mac_addr = ngbe_get_mac_addr;\n \tmac->stop_hw = ngbe_stop_hw;\n \tmac->acquire_swfw_sync = ngbe_acquire_swfw_sync;\n \tmac->release_swfw_sync = ngbe_release_swfw_sync;\n \n+\t/* RAR */\n+\tmac->set_rar = ngbe_set_rar;\n+\tmac->clear_rar = ngbe_clear_rar;\n+\tmac->init_rx_addrs = ngbe_init_rx_addrs;\n+\tmac->set_vmdq = ngbe_set_vmdq;\n+\tmac->clear_vmdq = ngbe_clear_vmdq;\n+\n \t/* Manageability interface */\n \tmac->init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh;\n \tmac->check_overtemp = ngbe_mac_check_overtemp;\n@@ -493,6 +814,8 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw)\n \trom->init_params = ngbe_init_eeprom_params;\n \trom->validate_checksum = ngbe_validate_eeprom_checksum_em;\n \n+\tmac->mcft_size\t\t= NGBE_EM_MC_TBL_SIZE;\n+\tmac->num_rar_entries\t= NGBE_EM_RAR_ENTRIES;\n \tmac->max_rx_queues\t= NGBE_EM_MAX_RX_QUEUES;\n \tmac->max_tx_queues\t= NGBE_EM_MAX_TX_QUEUES;\n \ndiff --git a/drivers/net/ngbe/base/ngbe_hw.h b/drivers/net/ngbe/base/ngbe_hw.h\nindex 3c8e646bb7..0b3d60ae29 100644\n--- a/drivers/net/ngbe/base/ngbe_hw.h\n+++ b/drivers/net/ngbe/base/ngbe_hw.h\n@@ -10,16 +10,29 @@\n \n #define NGBE_EM_MAX_TX_QUEUES 8\n #define NGBE_EM_MAX_RX_QUEUES 8\n+#define NGBE_EM_RAR_ENTRIES   32\n+#define NGBE_EM_MC_TBL_SIZE   32\n \n s32 ngbe_init_hw(struct ngbe_hw *hw);\n s32 ngbe_reset_hw_em(struct ngbe_hw *hw);\n s32 ngbe_stop_hw(struct ngbe_hw *hw);\n+s32 ngbe_get_mac_addr(struct ngbe_hw *hw, u8 *mac_addr);\n \n void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw);\n \n+s32 ngbe_set_rar(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,\n+\t\t\t  u32 enable_addr);\n+s32 ngbe_clear_rar(struct ngbe_hw *hw, u32 index);\n+s32 ngbe_init_rx_addrs(struct ngbe_hw *hw);\n+\n+s32 ngbe_validate_mac_addr(u8 *mac_addr);\n s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask);\n void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask);\n \n+s32 ngbe_set_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq);\n+s32 ngbe_clear_vmdq(struct ngbe_hw *hw, u32 rar, u32 vmdq);\n+s32 ngbe_init_uta_tables(struct ngbe_hw *hw);\n+\n s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw);\n s32 ngbe_mac_check_overtemp(struct ngbe_hw *hw);\n void ngbe_disable_rx(struct ngbe_hw *hw);\ndiff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h\nindex 8ed14560c3..517db3380d 100644\n--- a/drivers/net/ngbe/base/ngbe_type.h\n+++ b/drivers/net/ngbe/base/ngbe_type.h\n@@ -63,6 +63,10 @@ enum ngbe_media_type {\n \n struct ngbe_hw;\n \n+struct ngbe_addr_filter_info {\n+\tu32 mta_in_use;\n+};\n+\n /* Bus parameters */\n struct ngbe_bus_info {\n \tvoid (*set_lan_id)(struct ngbe_hw *hw);\n@@ -89,14 +93,28 @@ struct ngbe_mac_info {\n \ts32 (*init_hw)(struct ngbe_hw *hw);\n \ts32 (*reset_hw)(struct ngbe_hw *hw);\n \ts32 (*stop_hw)(struct ngbe_hw *hw);\n+\ts32 (*get_mac_addr)(struct ngbe_hw *hw, u8 *mac_addr);\n \ts32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);\n \tvoid (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);\n \n+\t/* RAR */\n+\ts32 (*set_rar)(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,\n+\t\t\t  u32 enable_addr);\n+\ts32 (*clear_rar)(struct ngbe_hw *hw, u32 index);\n+\ts32 (*set_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);\n+\ts32 (*clear_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);\n+\ts32 (*init_rx_addrs)(struct ngbe_hw *hw);\n+\n \t/* Manageability interface */\n \ts32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw);\n \ts32 (*check_overtemp)(struct ngbe_hw *hw);\n \n \tenum ngbe_mac_type type;\n+\tu8 addr[ETH_ADDR_LEN];\n+\tu8 perm_addr[ETH_ADDR_LEN];\n+\ts32 mc_filter_type;\n+\tu32 mcft_size;\n+\tu32 num_rar_entries;\n \tu32 max_tx_queues;\n \tu32 max_rx_queues;\n \tstruct ngbe_thermal_sensor_data  thermal_sensor_data;\n@@ -128,6 +146,7 @@ struct ngbe_hw {\n \tvoid IOMEM *hw_addr;\n \tvoid *back;\n \tstruct ngbe_mac_info mac;\n+\tstruct ngbe_addr_filter_info addr_ctrl;\n \tstruct ngbe_phy_info phy;\n \tstruct ngbe_rom_info rom;\n \tstruct ngbe_bus_info bus;\ndiff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c\nindex 31d4dda976..deca64137d 100644\n--- a/drivers/net/ngbe/ngbe_ethdev.c\n+++ b/drivers/net/ngbe/ngbe_ethdev.c\n@@ -116,6 +116,31 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)\n \t\treturn -EIO;\n \t}\n \n+\t/* Allocate memory for storing MAC addresses */\n+\teth_dev->data->mac_addrs = rte_zmalloc(\"ngbe\", RTE_ETHER_ADDR_LEN *\n+\t\t\t\t\t       hw->mac.num_rar_entries, 0);\n+\tif (eth_dev->data->mac_addrs == NULL) {\n+\t\tPMD_INIT_LOG(ERR,\n+\t\t\t     \"Failed to allocate %u bytes needed to store \"\n+\t\t\t     \"MAC addresses\",\n+\t\t\t     RTE_ETHER_ADDR_LEN * hw->mac.num_rar_entries);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\t/* Copy the permanent MAC address */\n+\trte_ether_addr_copy((struct rte_ether_addr *)hw->mac.perm_addr,\n+\t\t\t&eth_dev->data->mac_addrs[0]);\n+\n+\t/* Allocate memory for storing hash filter MAC addresses */\n+\teth_dev->data->hash_mac_addrs = rte_zmalloc(\"ngbe\",\n+\t\t\tRTE_ETHER_ADDR_LEN * NGBE_VMDQ_NUM_UC_MAC, 0);\n+\tif (eth_dev->data->hash_mac_addrs == NULL) {\n+\t\tPMD_INIT_LOG(ERR,\n+\t\t\t     \"Failed to allocate %d bytes needed to store MAC addresses\",\n+\t\t\t     RTE_ETHER_ADDR_LEN * NGBE_VMDQ_NUM_UC_MAC);\n+\t\treturn -ENOMEM;\n+\t}\n+\n \treturn 0;\n }\n \ndiff --git a/drivers/net/ngbe/ngbe_ethdev.h b/drivers/net/ngbe/ngbe_ethdev.h\nindex d4d02c6bd8..87cc1cff6b 100644\n--- a/drivers/net/ngbe/ngbe_ethdev.h\n+++ b/drivers/net/ngbe/ngbe_ethdev.h\n@@ -30,4 +30,6 @@ ngbe_dev_hw(struct rte_eth_dev *dev)\n \treturn hw;\n }\n \n+#define NGBE_VMDQ_NUM_UC_MAC         4096 /* Maximum nb. of UC MAC addr. */\n+\n #endif /* _NGBE_ETHDEV_H_ */\n",
    "prefixes": [
        "v6",
        "09/19"
    ]
}