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GET /api/patches/93840/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 93840,
    "url": "https://patches.dpdk.org/api/patches/93840/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/e5ae2bd1a012380171de2d7b65b572d25bf7b882.1622676125.git.rahul.lakkireddy@chelsio.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<e5ae2bd1a012380171de2d7b65b572d25bf7b882.1622676125.git.rahul.lakkireddy@chelsio.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/e5ae2bd1a012380171de2d7b65b572d25bf7b882.1622676125.git.rahul.lakkireddy@chelsio.com",
    "date": "2021-06-02T21:57:50",
    "name": "[1/2] net/cxgbe: use C11 atomics instead of rte_atomic ops",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "67fe45cc598cec07a21c983c633372759fc9b551",
    "submitter": {
        "id": 241,
        "url": "https://patches.dpdk.org/api/people/241/?format=api",
        "name": "Rahul Lakkireddy",
        "email": "rahul.lakkireddy@chelsio.com"
    },
    "delegate": {
        "id": 3961,
        "url": "https://patches.dpdk.org/api/users/3961/?format=api",
        "username": "arybchenko",
        "first_name": "Andrew",
        "last_name": "Rybchenko",
        "email": "andrew.rybchenko@oktetlabs.ru"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/e5ae2bd1a012380171de2d7b65b572d25bf7b882.1622676125.git.rahul.lakkireddy@chelsio.com/mbox/",
    "series": [
        {
            "id": 17217,
            "url": "https://patches.dpdk.org/api/series/17217/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=17217",
            "date": "2021-06-02T21:57:49",
            "name": "net/cxgbe: add RAW MAC matchall filter support",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/17217/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/93840/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/93840/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 12C5AA0524;\n\tThu,  3 Jun 2021 01:58:54 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7D2CD410E1;\n\tThu,  3 Jun 2021 01:58:51 +0200 (CEST)",
            "from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8])\n by mails.dpdk.org (Postfix) with ESMTP id 5E28640FDF\n for <dev@dpdk.org>; Thu,  3 Jun 2021 01:58:50 +0200 (CEST)",
            "from localhost (scalar.blr.asicdesigners.com [10.193.185.94])\n by stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id 152NwlEC007560\n for <dev@dpdk.org>; Wed, 2 Jun 2021 16:58:48 -0700"
        ],
        "From": "Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>",
        "To": "dev@dpdk.org",
        "Date": "Thu,  3 Jun 2021 03:27:50 +0530",
        "Message-Id": "\n <e5ae2bd1a012380171de2d7b65b572d25bf7b882.1622676125.git.rahul.lakkireddy@chelsio.com>",
        "X-Mailer": "git-send-email 2.5.3",
        "In-Reply-To": [
            "<cover.1622676125.git.rahul.lakkireddy@chelsio.com>",
            "<cover.1622676125.git.rahul.lakkireddy@chelsio.com>"
        ],
        "References": [
            "<cover.1622676125.git.rahul.lakkireddy@chelsio.com>",
            "<cover.1622676125.git.rahul.lakkireddy@chelsio.com>"
        ],
        "Subject": "[dpdk-dev] [PATCH 1/2] net/cxgbe: use C11 atomics instead of\n rte_atomic ops",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Replace rte_atomic ops with C11 atomics.\n\nSigned-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>\n---\n drivers/net/cxgbe/base/t4_hw.c   |  1 -\n drivers/net/cxgbe/clip_tbl.c     | 13 +++++++------\n drivers/net/cxgbe/clip_tbl.h     |  2 +-\n drivers/net/cxgbe/cxgbe_ethdev.c |  1 -\n drivers/net/cxgbe/cxgbe_main.c   | 23 ++++++++++++-----------\n drivers/net/cxgbe/cxgbe_ofld.h   |  6 +++---\n drivers/net/cxgbe/l2t.c          | 14 +++++++-------\n drivers/net/cxgbe/l2t.h          |  2 +-\n drivers/net/cxgbe/mps_tcam.c     | 12 ++++++------\n drivers/net/cxgbe/mps_tcam.h     |  2 +-\n drivers/net/cxgbe/sge.c          |  1 -\n drivers/net/cxgbe/smt.c          | 14 +++++++-------\n drivers/net/cxgbe/smt.h          |  2 +-\n 13 files changed, 46 insertions(+), 47 deletions(-)",
    "diff": "diff --git a/drivers/net/cxgbe/base/t4_hw.c b/drivers/net/cxgbe/base/t4_hw.c\nindex 7ebf4a9a70..b60bcdc3bc 100644\n--- a/drivers/net/cxgbe/base/t4_hw.c\n+++ b/drivers/net/cxgbe/base/t4_hw.c\n@@ -9,7 +9,6 @@\n #include <rte_log.h>\n #include <rte_debug.h>\n #include <rte_pci.h>\n-#include <rte_atomic.h>\n #include <rte_branch_prediction.h>\n #include <rte_memory.h>\n #include <rte_tailq.h>\ndiff --git a/drivers/net/cxgbe/clip_tbl.c b/drivers/net/cxgbe/clip_tbl.c\nindex a0ab2a6ac8..072fc74f68 100644\n--- a/drivers/net/cxgbe/clip_tbl.c\n+++ b/drivers/net/cxgbe/clip_tbl.c\n@@ -55,7 +55,7 @@ void cxgbe_clip_release(struct rte_eth_dev *dev, struct clip_entry *ce)\n \tint ret;\n \n \tt4_os_lock(&ce->lock);\n-\tif (rte_atomic32_dec_and_test(&ce->refcnt)) {\n+\tif (__atomic_sub_fetch(&ce->refcnt, 1, __ATOMIC_RELAXED) == 0) {\n \t\tret = clip6_release_mbox(dev, ce->addr);\n \t\tif (ret)\n \t\t\tdev_debug(adap, \"CLIP FW DEL CMD failed: %d\", ret);\n@@ -79,7 +79,7 @@ static struct clip_entry *find_or_alloc_clipe(struct clip_tbl *c,\n \tunsigned int clipt_size = c->clipt_size;\n \n \tfor (e = &c->cl_list[0], end = &c->cl_list[clipt_size]; e != end; ++e) {\n-\t\tif (rte_atomic32_read(&e->refcnt) == 0) {\n+\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n \t\t\tif (!first_free)\n \t\t\t\tfirst_free = e;\n \t\t} else {\n@@ -114,11 +114,12 @@ static struct clip_entry *t4_clip_alloc(struct rte_eth_dev *dev,\n \tce = find_or_alloc_clipe(ctbl, lip);\n \tif (ce) {\n \t\tt4_os_lock(&ce->lock);\n-\t\tif (!rte_atomic32_read(&ce->refcnt)) {\n+\t\tif (__atomic_load_n(&ce->refcnt, __ATOMIC_RELAXED) == 0) {\n \t\t\trte_memcpy(ce->addr, lip, sizeof(ce->addr));\n \t\t\tif (v6) {\n \t\t\t\tce->type = FILTER_TYPE_IPV6;\n-\t\t\t\trte_atomic32_set(&ce->refcnt, 1);\n+\t\t\t\t__atomic_store_n(&ce->refcnt, 1,\n+\t\t\t\t\t\t __ATOMIC_RELAXED);\n \t\t\t\tret = clip6_get_mbox(dev, lip);\n \t\t\t\tif (ret)\n \t\t\t\t\tdev_debug(adap,\n@@ -128,7 +129,7 @@ static struct clip_entry *t4_clip_alloc(struct rte_eth_dev *dev,\n \t\t\t\tce->type = FILTER_TYPE_IPV4;\n \t\t\t}\n \t\t} else {\n-\t\t\trte_atomic32_inc(&ce->refcnt);\n+\t\t\t__atomic_add_fetch(&ce->refcnt, 1, __ATOMIC_RELAXED);\n \t\t}\n \t\tt4_os_unlock(&ce->lock);\n \t}\n@@ -177,7 +178,7 @@ struct clip_tbl *t4_init_clip_tbl(unsigned int clipt_start,\n \n \tfor (i = 0; i < ctbl->clipt_size; i++) {\n \t\tt4_os_lock_init(&ctbl->cl_list[i].lock);\n-\t\trte_atomic32_set(&ctbl->cl_list[i].refcnt, 0);\n+\t\tctbl->cl_list[i].refcnt = 0;\n \t}\n \n \treturn ctbl;\ndiff --git a/drivers/net/cxgbe/clip_tbl.h b/drivers/net/cxgbe/clip_tbl.h\nindex 737ccc6911..d7689f4b7a 100644\n--- a/drivers/net/cxgbe/clip_tbl.h\n+++ b/drivers/net/cxgbe/clip_tbl.h\n@@ -13,7 +13,7 @@ struct clip_entry {\n \tenum filter_type type;       /* entry type */\n \tu32 addr[4];                 /* IPV4 or IPV6 address */\n \trte_spinlock_t lock;         /* entry lock */\n-\trte_atomic32_t refcnt;       /* entry reference count */\n+\tu32 refcnt;                  /* entry reference count */\n };\n \n struct clip_tbl {\ndiff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c\nindex a12a98157c..b88f80fd3e 100644\n--- a/drivers/net/cxgbe/cxgbe_ethdev.c\n+++ b/drivers/net/cxgbe/cxgbe_ethdev.c\n@@ -21,7 +21,6 @@\n #include <rte_debug.h>\n #include <rte_pci.h>\n #include <rte_bus_pci.h>\n-#include <rte_atomic.h>\n #include <rte_branch_prediction.h>\n #include <rte_memory.h>\n #include <rte_tailq.h>\ndiff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c\nindex c759d97f8c..b14ce283ed 100644\n--- a/drivers/net/cxgbe/cxgbe_main.c\n+++ b/drivers/net/cxgbe/cxgbe_main.c\n@@ -20,7 +20,6 @@\n #include <rte_log.h>\n #include <rte_debug.h>\n #include <rte_pci.h>\n-#include <rte_atomic.h>\n #include <rte_branch_prediction.h>\n #include <rte_memory.h>\n #include <rte_tailq.h>\n@@ -417,13 +416,15 @@ void cxgbe_remove_tid(struct tid_info *t, unsigned int chan, unsigned int tid,\n \n \tif (t->tid_tab[tid]) {\n \t\tt->tid_tab[tid] = NULL;\n-\t\trte_atomic32_dec(&t->conns_in_use);\n+\t\t__atomic_sub_fetch(&t->conns_in_use, 1, __ATOMIC_RELAXED);\n \t\tif (t->hash_base && tid >= t->hash_base) {\n \t\t\tif (family == FILTER_TYPE_IPV4)\n-\t\t\t\trte_atomic32_dec(&t->hash_tids_in_use);\n+\t\t\t\t__atomic_sub_fetch(&t->hash_tids_in_use, 1,\n+\t\t\t\t\t\t   __ATOMIC_RELAXED);\n \t\t} else {\n \t\t\tif (family == FILTER_TYPE_IPV4)\n-\t\t\t\trte_atomic32_dec(&t->tids_in_use);\n+\t\t\t\t__atomic_sub_fetch(&t->tids_in_use, 1,\n+\t\t\t\t\t\t   __ATOMIC_RELAXED);\n \t\t}\n \t}\n \n@@ -445,13 +446,15 @@ void cxgbe_insert_tid(struct tid_info *t, void *data, unsigned int tid,\n \tt->tid_tab[tid] = data;\n \tif (t->hash_base && tid >= t->hash_base) {\n \t\tif (family == FILTER_TYPE_IPV4)\n-\t\t\trte_atomic32_inc(&t->hash_tids_in_use);\n+\t\t\t__atomic_add_fetch(&t->hash_tids_in_use, 1,\n+\t\t\t\t\t   __ATOMIC_RELAXED);\n \t} else {\n \t\tif (family == FILTER_TYPE_IPV4)\n-\t\t\trte_atomic32_inc(&t->tids_in_use);\n+\t\t\t__atomic_add_fetch(&t->tids_in_use, 1,\n+\t\t\t\t\t   __ATOMIC_RELAXED);\n \t}\n \n-\trte_atomic32_inc(&t->conns_in_use);\n+\t__atomic_add_fetch(&t->conns_in_use, 1, __ATOMIC_RELAXED);\n }\n \n /**\n@@ -504,10 +507,8 @@ static int tid_init(struct tid_info *t)\n \n \tt->afree = NULL;\n \tt->atids_in_use = 0;\n-\trte_atomic32_init(&t->tids_in_use);\n-\trte_atomic32_set(&t->tids_in_use, 0);\n-\trte_atomic32_init(&t->conns_in_use);\n-\trte_atomic32_set(&t->conns_in_use, 0);\n+\tt->tids_in_use = 0;\n+\tt->conns_in_use = 0;\n \n \t/* Setup the free list for atid_tab and clear the stid bitmap. */\n \tif (natids) {\ndiff --git a/drivers/net/cxgbe/cxgbe_ofld.h b/drivers/net/cxgbe/cxgbe_ofld.h\nindex 50931ed048..33697c7628 100644\n--- a/drivers/net/cxgbe/cxgbe_ofld.h\n+++ b/drivers/net/cxgbe/cxgbe_ofld.h\n@@ -60,10 +60,10 @@ struct tid_info {\n \tunsigned int atids_in_use;\n \n \t/* TIDs in the TCAM */\n-\trte_atomic32_t tids_in_use;\n+\tu32 tids_in_use;\n \t/* TIDs in the HASH */\n-\trte_atomic32_t hash_tids_in_use;\n-\trte_atomic32_t conns_in_use;\n+\tu32 hash_tids_in_use;\n+\tu32 conns_in_use;\n \n \trte_spinlock_t atid_lock __rte_cache_aligned;\n \trte_spinlock_t ftid_lock;\ndiff --git a/drivers/net/cxgbe/l2t.c b/drivers/net/cxgbe/l2t.c\nindex f9d651fe09..66f578908a 100644\n--- a/drivers/net/cxgbe/l2t.c\n+++ b/drivers/net/cxgbe/l2t.c\n@@ -14,8 +14,8 @@\n  */\n void cxgbe_l2t_release(struct l2t_entry *e)\n {\n-\tif (rte_atomic32_read(&e->refcnt) != 0)\n-\t\trte_atomic32_dec(&e->refcnt);\n+\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) != 0)\n+\t\t__atomic_sub_fetch(&e->refcnt, 1, __ATOMIC_RELAXED);\n }\n \n /**\n@@ -112,7 +112,7 @@ static struct l2t_entry *find_or_alloc_l2e(struct l2t_data *d, u16 vlan,\n \tstruct l2t_entry *first_free = NULL;\n \n \tfor (e = &d->l2tab[0], end = &d->l2tab[d->l2t_size]; e != end; ++e) {\n-\t\tif (rte_atomic32_read(&e->refcnt) == 0) {\n+\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n \t\t\tif (!first_free)\n \t\t\t\tfirst_free = e;\n \t\t} else {\n@@ -151,18 +151,18 @@ static struct l2t_entry *t4_l2t_alloc_switching(struct rte_eth_dev *dev,\n \te = find_or_alloc_l2e(d, vlan, port, eth_addr);\n \tif (e) {\n \t\tt4_os_lock(&e->lock);\n-\t\tif (!rte_atomic32_read(&e->refcnt)) {\n+\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n \t\t\te->state = L2T_STATE_SWITCHING;\n \t\t\te->vlan = vlan;\n \t\t\te->lport = port;\n \t\t\trte_memcpy(e->dmac, eth_addr, RTE_ETHER_ADDR_LEN);\n-\t\t\trte_atomic32_set(&e->refcnt, 1);\n+\t\t\t__atomic_store_n(&e->refcnt, 1, __ATOMIC_RELAXED);\n \t\t\tret = write_l2e(dev, e, 0, !L2T_LPBK, !L2T_ARPMISS);\n \t\t\tif (ret < 0)\n \t\t\t\tdev_debug(adap, \"Failed to write L2T entry: %d\",\n \t\t\t\t\t  ret);\n \t\t} else {\n-\t\t\trte_atomic32_inc(&e->refcnt);\n+\t\t\t__atomic_add_fetch(&e->refcnt, 1, __ATOMIC_RELAXED);\n \t\t}\n \t\tt4_os_unlock(&e->lock);\n \t}\n@@ -213,7 +213,7 @@ struct l2t_data *t4_init_l2t(unsigned int l2t_start, unsigned int l2t_end)\n \t\td->l2tab[i].idx = i;\n \t\td->l2tab[i].state = L2T_STATE_UNUSED;\n \t\tt4_os_lock_init(&d->l2tab[i].lock);\n-\t\trte_atomic32_set(&d->l2tab[i].refcnt, 0);\n+\t\td->l2tab[i].refcnt = 0;\n \t}\n \n \treturn d;\ndiff --git a/drivers/net/cxgbe/l2t.h b/drivers/net/cxgbe/l2t.h\nindex 2c489e4aa2..9845c9f981 100644\n--- a/drivers/net/cxgbe/l2t.h\n+++ b/drivers/net/cxgbe/l2t.h\n@@ -30,7 +30,7 @@ struct l2t_entry {\n \tu8  lport;                  /* destination port */\n \tu8  dmac[RTE_ETHER_ADDR_LEN];   /* destination MAC address */\n \trte_spinlock_t lock;        /* entry lock */\n-\trte_atomic32_t refcnt;      /* entry reference count */\n+\tu32 refcnt;                 /* entry reference count */\n };\n \n struct l2t_data {\ndiff --git a/drivers/net/cxgbe/mps_tcam.c b/drivers/net/cxgbe/mps_tcam.c\nindex 6e5fae9928..178921b701 100644\n--- a/drivers/net/cxgbe/mps_tcam.c\n+++ b/drivers/net/cxgbe/mps_tcam.c\n@@ -75,7 +75,7 @@ int cxgbe_mpstcam_alloc(struct port_info *pi, const u8 *eth_addr,\n \tt4_os_write_lock(&mpstcam->lock);\n \tentry = cxgbe_mpstcam_lookup(adap->mpstcam, eth_addr, mask);\n \tif (entry) {\n-\t\trte_atomic32_add(&entry->refcnt, 1);\n+\t\t__atomic_add_fetch(&entry->refcnt, 1, __ATOMIC_RELAXED);\n \t\tt4_os_write_unlock(&mpstcam->lock);\n \t\treturn entry->idx;\n \t}\n@@ -97,7 +97,7 @@ int cxgbe_mpstcam_alloc(struct port_info *pi, const u8 *eth_addr,\n \tentry = &mpstcam->entry[ret];\n \tmemcpy(entry->eth_addr, eth_addr, RTE_ETHER_ADDR_LEN);\n \tmemcpy(entry->mask, mask, RTE_ETHER_ADDR_LEN);\n-\trte_atomic32_set(&entry->refcnt, 1);\n+\t__atomic_store_n(&entry->refcnt, 1, __ATOMIC_RELAXED);\n \tentry->state = MPS_ENTRY_USED;\n \n \tif (cxgbe_update_free_idx(mpstcam))\n@@ -146,7 +146,7 @@ int cxgbe_mpstcam_modify(struct port_info *pi, int idx, const u8 *addr)\n \t * provided value is -1\n \t */\n \tif (entry->state == MPS_ENTRY_UNUSED) {\n-\t\trte_atomic32_set(&entry->refcnt, 1);\n+\t\t__atomic_store_n(&entry->refcnt, 1, __ATOMIC_RELAXED);\n \t\tentry->state = MPS_ENTRY_USED;\n \t}\n \n@@ -164,7 +164,7 @@ static inline void reset_mpstcam_entry(struct mps_tcam_entry *entry)\n {\n \tmemset(entry->eth_addr, 0, RTE_ETHER_ADDR_LEN);\n \tmemset(entry->mask, 0, RTE_ETHER_ADDR_LEN);\n-\trte_atomic32_clear(&entry->refcnt);\n+\t__atomic_store_n(&entry->refcnt, 0, __ATOMIC_RELAXED);\n \tentry->state = MPS_ENTRY_UNUSED;\n }\n \n@@ -189,12 +189,12 @@ int cxgbe_mpstcam_remove(struct port_info *pi, u16 idx)\n \t\treturn -EINVAL;\n \t}\n \n-\tif (rte_atomic32_read(&entry->refcnt) == 1)\n+\tif (__atomic_load_n(&entry->refcnt, __ATOMIC_RELAXED) == 1)\n \t\tret = t4_free_raw_mac_filt(adap, pi->viid, entry->eth_addr,\n \t\t\t\t\t   entry->mask, idx, 1, pi->port_id,\n \t\t\t\t\t   false);\n \telse\n-\t\tret = rte_atomic32_sub_return(&entry->refcnt, 1);\n+\t\tret = __atomic_sub_fetch(&entry->refcnt, 1, __ATOMIC_RELAXED);\n \n \tif (ret == 0) {\n \t\treset_mpstcam_entry(entry);\ndiff --git a/drivers/net/cxgbe/mps_tcam.h b/drivers/net/cxgbe/mps_tcam.h\nindex 3d1e8d3dbf..998c2b59df 100644\n--- a/drivers/net/cxgbe/mps_tcam.h\n+++ b/drivers/net/cxgbe/mps_tcam.h\n@@ -28,7 +28,7 @@ struct mps_tcam_entry {\n \tu8 mask[RTE_ETHER_ADDR_LEN];\n \n \tstruct mpstcam_table *mpstcam; /* backptr */\n-\trte_atomic32_t refcnt;\n+\tu32 refcnt;\n };\n \n struct mpstcam_table {\ndiff --git a/drivers/net/cxgbe/sge.c b/drivers/net/cxgbe/sge.c\nindex 56b8ec1f33..e5f7721dc4 100644\n--- a/drivers/net/cxgbe/sge.c\n+++ b/drivers/net/cxgbe/sge.c\n@@ -20,7 +20,6 @@\n #include <rte_log.h>\n #include <rte_debug.h>\n #include <rte_pci.h>\n-#include <rte_atomic.h>\n #include <rte_branch_prediction.h>\n #include <rte_memory.h>\n #include <rte_memzone.h>\ndiff --git a/drivers/net/cxgbe/smt.c b/drivers/net/cxgbe/smt.c\nindex b7b5a4a025..810c757184 100644\n--- a/drivers/net/cxgbe/smt.c\n+++ b/drivers/net/cxgbe/smt.c\n@@ -119,7 +119,7 @@ static struct smt_entry *find_or_alloc_smte(struct smt_data *s, u8 *smac)\n \tstruct smt_entry *e, *end, *first_free = NULL;\n \n \tfor (e = &s->smtab[0], end = &s->smtab[s->smt_size]; e != end; ++e) {\n-\t\tif (!rte_atomic32_read(&e->refcnt)) {\n+\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n \t\t\tif (!first_free)\n \t\t\t\tfirst_free = e;\n \t\t} else {\n@@ -156,7 +156,7 @@ static struct smt_entry *t4_smt_alloc_switching(struct rte_eth_dev *dev,\n \te = find_or_alloc_smte(s, smac);\n \tif (e) {\n \t\tt4_os_lock(&e->lock);\n-\t\tif (!rte_atomic32_read(&e->refcnt)) {\n+\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n \t\t\te->pfvf = pfvf;\n \t\t\trte_memcpy(e->src_mac, smac, RTE_ETHER_ADDR_LEN);\n \t\t\tret = write_smt_entry(dev, e);\n@@ -168,9 +168,9 @@ static struct smt_entry *t4_smt_alloc_switching(struct rte_eth_dev *dev,\n \t\t\t\tgoto out_write_unlock;\n \t\t\t}\n \t\t\te->state = SMT_STATE_SWITCHING;\n-\t\t\trte_atomic32_set(&e->refcnt, 1);\n+\t\t\t__atomic_store_n(&e->refcnt, 1, __ATOMIC_RELAXED);\n \t\t} else {\n-\t\t\trte_atomic32_inc(&e->refcnt);\n+\t\t\t__atomic_add_fetch(&e->refcnt, 1, __ATOMIC_RELAXED);\n \t\t}\n \t\tt4_os_unlock(&e->lock);\n \t}\n@@ -195,8 +195,8 @@ struct smt_entry *cxgbe_smt_alloc_switching(struct rte_eth_dev *dev, u8 *smac)\n \n void cxgbe_smt_release(struct smt_entry *e)\n {\n-\tif (rte_atomic32_read(&e->refcnt))\n-\t\trte_atomic32_dec(&e->refcnt);\n+\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) != 0)\n+\t\t__atomic_sub_fetch(&e->refcnt, 1, __ATOMIC_RELAXED);\n }\n \n /**\n@@ -221,7 +221,7 @@ struct smt_data *t4_init_smt(u32 smt_start_idx, u32 smt_size)\n \t\ts->smtab[i].state = SMT_STATE_UNUSED;\n \t\tmemset(&s->smtab[i].src_mac, 0, RTE_ETHER_ADDR_LEN);\n \t\tt4_os_lock_init(&s->smtab[i].lock);\n-\t\trte_atomic32_set(&s->smtab[i].refcnt, 0);\n+\t\ts->smtab[i].refcnt = 0;\n \t}\n \treturn s;\n }\ndiff --git a/drivers/net/cxgbe/smt.h b/drivers/net/cxgbe/smt.h\nindex 92c63c8760..e6e8aea964 100644\n--- a/drivers/net/cxgbe/smt.h\n+++ b/drivers/net/cxgbe/smt.h\n@@ -23,7 +23,7 @@ struct smt_entry {\n \tu16 pfvf;\n \tu16 hw_idx;\n \tu8 src_mac[RTE_ETHER_ADDR_LEN];\n-\trte_atomic32_t refcnt;\n+\tu32 refcnt;\n \trte_spinlock_t lock;\n };\n \n",
    "prefixes": [
        "1/2"
    ]
}