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GET /api/patches/93255/?format=api
{ "id": 93255, "url": "https://patches.dpdk.org/api/patches/93255/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1620911283-55627-3-git-send-email-fengchengwen@huawei.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1620911283-55627-3-git-send-email-fengchengwen@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1620911283-55627-3-git-send-email-fengchengwen@huawei.com", "date": "2021-05-13T13:08:03", "name": "[v4,2/2] net/hns3: refactor SVE code compile method", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "138fd028c9a0fd40ed570ab11d1f0b2403870976", "submitter": { "id": 2146, "url": "https://patches.dpdk.org/api/people/2146/?format=api", "name": "fengchengwen", "email": "fengchengwen@huawei.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1620911283-55627-3-git-send-email-fengchengwen@huawei.com/mbox/", "series": [ { "id": 16985, "url": "https://patches.dpdk.org/api/series/16985/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16985", "date": "2021-05-13T13:08:03", "name": "bugfix for Kunpeng SVE compile", "version": 4, "mbox": "https://patches.dpdk.org/series/16985/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/93255/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/93255/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B13BDA0A02;\n\tThu, 13 May 2021 15:11:11 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 97D104069D;\n\tThu, 13 May 2021 15:11:11 +0200 (CEST)", "from szxga05-in.huawei.com (szxga05-in.huawei.com [45.249.212.191])\n by mails.dpdk.org (Postfix) with ESMTP id 0F4414003F\n for <dev@dpdk.org>; Thu, 13 May 2021 15:11:10 +0200 (CEST)", "from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.59])\n by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FgsQQ2VHhzQjHZ;\n Thu, 13 May 2021 21:07:42 +0800 (CST)", "from localhost.localdomain (10.67.165.24) by\n DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id\n 14.3.498.0; Thu, 13 May 2021 21:11:03 +0800" ], "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<thomas@monjalon.net>, <ferruh.yigit@intel.com>", "CC": "<dev@dpdk.org>, <jerinj@marvell.com>, <ruifeng.wang@arm.com>,\n <viktorin@rehivetech.com>, <bruce.richardson@intel.com>,\n <Honnappa.Nagarahalli@arm.com>, <jerinjacobk@gmail.com>,\n <juraj.linkes@pantheon.tech>, <nd@arm.com>", "Date": "Thu, 13 May 2021 21:08:03 +0800", "Message-ID": "<1620911283-55627-3-git-send-email-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.8.1", "In-Reply-To": "<1620911283-55627-1-git-send-email-fengchengwen@huawei.com>", "References": "<1620808126-18876-1-git-send-email-fengchengwen@huawei.com>\n <1620911283-55627-1-git-send-email-fengchengwen@huawei.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.67.165.24]", "X-CFilter-Loop": "Reflected", "Subject": "[dpdk-dev] [PATCH v4 2/2] net/hns3: refactor SVE code compile method", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently, the SVE code is compiled only when -march supports SVE\n(e.g. '-march=armv8.2a+sve'), there maybe some problem[1] with this\napproach.\n\nThe solution:\na. If the minimum instruction set support SVE then compiles it.\nb. Else if the compiler support SVE then compiles it.\nc. Otherwise don't compile it.\n\n[1] https://mails.dpdk.org/archives/dev/2021-April/208189.html\n\nFixes: 8c25b02b082a (\"net/hns3: fix enabling SVE Rx/Tx\")\nFixes: 952ebacce4f2 (\"net/hns3: support SVE Rx\")\nCc: stable@dpdk.org\n\nSigned-off-by: Chengwen Feng <fengchengwen@huawei.com>\n---\n drivers/net/hns3/hns3_rxtx.c | 2 +-\n drivers/net/hns3/meson.build | 13 +++++++++++++\n 2 files changed, 14 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c\nindex 1d7a769..4ef20c6 100644\n--- a/drivers/net/hns3/hns3_rxtx.c\n+++ b/drivers/net/hns3/hns3_rxtx.c\n@@ -2808,7 +2808,7 @@ hns3_get_default_vec_support(void)\n static bool\n hns3_get_sve_support(void)\n {\n-#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_SVE)\n+#if defined(CC_SVE_SUPPORT)\n \tif (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_256)\n \t\treturn false;\n \tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SVE))\ndiff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build\nindex 53c7df7..8563d70 100644\n--- a/drivers/net/hns3/meson.build\n+++ b/drivers/net/hns3/meson.build\n@@ -35,7 +35,20 @@ deps += ['hash']\n \n if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')\n sources += files('hns3_rxtx_vec.c')\n+\n+ # compile SVE when:\n+ # a. support SVE in minimum instruction set baseline\n+ # b. it's not minimum instruction set, but compiler support\n if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''\n+ cflags += ['-DCC_SVE_SUPPORT']\n sources += files('hns3_rxtx_vec_sve.c')\n+ elif cc.has_argument('-march=armv8.2-a+sve')\n+ cflags += ['-DCC_SVE_SUPPORT']\n+ hns3_sve_lib = static_library('hns3_sve_lib',\n+ 'hns3_rxtx_vec_sve.c',\n+ dependencies: [static_rte_ethdev],\n+ include_directories: includes,\n+ c_args: [cflags, '-march=armv8.2-a+sve'])\n+ objs += hns3_sve_lib.extract_objects('hns3_rxtx_vec_sve.c')\n endif\n endif\n", "prefixes": [ "v4", "2/2" ] }