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GET /api/patches/93052/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 93052,
    "url": "https://patches.dpdk.org/api/patches/93052/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210508012032.14860-1-alvinx.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210508012032.14860-1-alvinx.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210508012032.14860-1-alvinx.zhang@intel.com",
    "date": "2021-05-08T01:20:32",
    "name": "[v2] net/ice: fix txq vector path selection",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "c773a48a13b046fb049d000f03ea64b5ffdd497a",
    "submitter": {
        "id": 1398,
        "url": "https://patches.dpdk.org/api/people/1398/?format=api",
        "name": "Alvin Zhang",
        "email": "alvinx.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210508012032.14860-1-alvinx.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 16878,
            "url": "https://patches.dpdk.org/api/series/16878/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16878",
            "date": "2021-05-08T01:20:32",
            "name": "[v2] net/ice: fix txq vector path selection",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/16878/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/93052/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/93052/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D9479A0A0A;\n\tSat,  8 May 2021 03:20:44 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 799CB40140;\n\tSat,  8 May 2021 03:20:44 +0200 (CEST)",
            "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by mails.dpdk.org (Postfix) with ESMTP id 1D6224013F;\n Sat,  8 May 2021 03:20:41 +0200 (CEST)",
            "from fmsmga004.fm.intel.com ([10.253.24.48])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 May 2021 18:20:39 -0700",
            "from shwdenpg235.ccr.corp.intel.com ([10.240.182.60])\n by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 May 2021 18:20:37 -0700"
        ],
        "IronPort-SDR": [
            "\n jxxM7N3l8kO15V5v8jVD7l3bg4FBdI6cUoiRaeUOhgnlyD1bFBd6H+Vgp9v7DZL0VkSt27BFSE\n AzNbrocidiXQ==",
            "\n TCZbjAZPXCxxXPwZG8VBXkcf+aHTrsvsOo8LZsT7bsj5Kzq2y1F38RKrt8kDMVkJc+jaZaf+YL\n HRtJ9zk+hEDg=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,9977\"; a=\"260119441\"",
            "E=Sophos;i=\"5.82,282,1613462400\"; d=\"scan'208\";a=\"260119441\"",
            "E=Sophos;i=\"5.82,282,1613462400\"; d=\"scan'208\";a=\"453304954\""
        ],
        "From": "Alvin Zhang <alvinx.zhang@intel.com>",
        "To": "qi.z.zhang@intel.com,\n\tferruh.yigit@intel.com",
        "Cc": "dev@dpdk.org,\n\tAlvin Zhang <alvinx.zhang@intel.com>,\n\tstable@dpdk.org",
        "Date": "Sat,  8 May 2021 09:20:32 +0800",
        "Message-Id": "<20210508012032.14860-1-alvinx.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.21.0.windows.1",
        "In-Reply-To": "<20210425092639.1428-1-alvinx.zhang@intel.com>",
        "References": "<20210425092639.1428-1-alvinx.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v2] net/ice: fix txq vector path selection",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "If Tx vector mode is disabled, the txq vector mode should be\ndisabled too.\n\nThis patch adds checking of Tx vector mode before enabling txq\nvector mode.\n\nFixes: 28f9002ab67f (\"net/ice: add Tx AVX512 offload path\")\nCc: stable@dpdk.org\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\n---\n\nv2: Update commit log.\n---\n drivers/net/ice/ice_rxtx.c | 16 +++++++++-------\n 1 file changed, 9 insertions(+), 7 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex 92fbbc1..49abcb2 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -3303,13 +3303,6 @@\n \t\tif (tx_check_ret >= 0 &&\n \t\t    rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {\n \t\t\tad->tx_vec_allowed = true;\n-\t\t\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n-\t\t\t\ttxq = dev->data->tx_queues[i];\n-\t\t\t\tif (txq && ice_txq_vec_setup(txq)) {\n-\t\t\t\t\tad->tx_vec_allowed = false;\n-\t\t\t\t\tbreak;\n-\t\t\t\t}\n-\t\t\t}\n \n \t\t\tif (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512 &&\n \t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&\n@@ -3329,6 +3322,15 @@\n \t\t\tif (!use_avx512 && tx_check_ret == ICE_VECTOR_OFFLOAD_PATH)\n \t\t\t\tad->tx_vec_allowed = false;\n \n+\t\t\tif (ad->tx_vec_allowed) {\n+\t\t\t\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\t\t\t\ttxq = dev->data->tx_queues[i];\n+\t\t\t\t\tif (txq && ice_txq_vec_setup(txq)) {\n+\t\t\t\t\t\tad->tx_vec_allowed = false;\n+\t\t\t\t\t\tbreak;\n+\t\t\t\t\t}\n+\t\t\t\t}\n+\t\t\t}\n \t\t} else {\n \t\t\tad->tx_vec_allowed = false;\n \t\t}\n",
    "prefixes": [
        "v2"
    ]
}