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GET /api/patches/92845/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 92845,
    "url": "https://patches.dpdk.org/api/patches/92845/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210505071917.31802-13-bingz@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210505071917.31802-13-bingz@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210505071917.31802-13-bingz@nvidia.com",
    "date": "2021-05-05T07:19:12",
    "name": "[v4,12/17] net/mlx5: add translation of CT item",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5a652f53f909156b42a350f3ebd7b7b37a98aa38",
    "submitter": {
        "id": 1976,
        "url": "https://patches.dpdk.org/api/people/1976/?format=api",
        "name": "Bing Zhao",
        "email": "bingz@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "https://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210505071917.31802-13-bingz@nvidia.com/mbox/",
    "series": [
        {
            "id": 16819,
            "url": "https://patches.dpdk.org/api/series/16819/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16819",
            "date": "2021-05-05T07:19:00",
            "name": "conntrack support in mlx5 PMD",
            "version": 4,
            "mbox": "https://patches.dpdk.org/series/16819/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/92845/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/92845/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Bing Zhao <bingz@nvidia.com>",
        "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>, <thomas@monjalon.net>",
        "CC": "<dev@dpdk.org>, <orika@nvidia.com>, <rasland@nvidia.com>",
        "Date": "Wed, 5 May 2021 10:19:12 +0300",
        "Message-ID": "<20210505071917.31802-13-bingz@nvidia.com>",
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        "References": "<20210427153811.11554-1-bingz@nvidia.com>\n <20210505071917.31802-1-bingz@nvidia.com>",
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        "Subject": "[dpdk-dev] [PATCH v4 12/17] net/mlx5: add translation of CT item",
        "X-BeenThere": "dev@dpdk.org",
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    },
    "content": "The return register of the DR action will be used for matching.\nAfter the ASO CT checking of a TCP packet, the syndrome is filled in\nthe register. Only the 8 LSB should be used. A converting from\nRTE_FLOW_CONNTRACK_FLAG* to the syndrome should be done after\nchecing the spec and mask fields.\n\nSigned-off-by: Bing Zhao <bingz@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow.h    |  7 ++++\n drivers/net/mlx5/mlx5_flow_dv.c | 62 +++++++++++++++++++++++++++++++++\n 2 files changed, 69 insertions(+)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 286e3fb6a4..eb0bb42161 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -405,6 +405,13 @@ enum mlx5_feature_name {\n /* Maximum number of fields to modify in MODIFY_FIELD */\n #define MLX5_ACT_MAX_MOD_FIELDS 5\n \n+/* Syndrome bits definition for connection tracking. */\n+#define MLX5_CT_SYNDROME_VALID\t\t(0x0 << 6)\n+#define MLX5_CT_SYNDROME_INVALID\t(0x1 << 6)\n+#define MLX5_CT_SYNDROME_TRAP\t\t(0x2 << 6)\n+#define MLX5_CT_SYNDROME_STATE_CHANGE\t(0x1 << 1)\n+#define MLX5_CT_SYNDROME_BAD_PACKET\t(0x1 << 0)\n+\n enum mlx5_flow_drv_type {\n \tMLX5_FLOW_TYPE_MIN,\n \tMLX5_FLOW_TYPE_DV,\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 14af900267..b0858e3df8 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -9379,6 +9379,64 @@ flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,\n \t}\n }\n \n+/*\n+ * Add connection tracking status item to matcher\n+ *\n+ * @param[in] dev\n+ *   The devich to configure through.\n+ * @param[in, out] matcher\n+ *   Flow matcher.\n+ * @param[in, out] key\n+ *   Flow matcher value.\n+ * @param[in] item\n+ *   Flow pattern to translate.\n+ */\n+static void\n+flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,\n+\t\t\t      void *matcher, void *key,\n+\t\t\t      const struct rte_flow_item *item)\n+{\n+\tuint32_t reg_value = 0;\n+\tint reg_id;\n+\t/* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */\n+\tuint32_t reg_mask = 0;\n+\tconst struct rte_flow_item_conntrack *spec = item->spec;\n+\tconst struct rte_flow_item_conntrack *mask = item->mask;\n+\tuint32_t flags;\n+\tstruct rte_flow_error error;\n+\n+\tif (!mask)\n+\t\tmask = &rte_flow_item_conntrack_mask;\n+\tif (!spec || !mask->flags)\n+\t\treturn;\n+\tflags = spec->flags & mask->flags;\n+\t/* The conflict should be checked in the validation. */\n+\tif (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)\n+\t\treg_value |= MLX5_CT_SYNDROME_VALID;\n+\tif (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)\n+\t\treg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;\n+\tif (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)\n+\t\treg_value |= MLX5_CT_SYNDROME_INVALID;\n+\tif (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)\n+\t\treg_value |= MLX5_CT_SYNDROME_TRAP;\n+\tif (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)\n+\t\treg_value |= MLX5_CT_SYNDROME_BAD_PACKET;\n+\tif (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |\n+\t\t\t   RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |\n+\t\t\t   RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))\n+\t\treg_mask |= 0xc0;\n+\tif (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)\n+\t\treg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;\n+\tif (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)\n+\t\treg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;\n+\t/* The REG_C_x value could be saved during startup. */\n+\treg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);\n+\tif (reg_id == REG_NON)\n+\t\treturn;\n+\tflow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,\n+\t\t\t       reg_value, reg_mask);\n+}\n+\n static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };\n \n #define HEADER_IS_ZERO(match_criteria, headers)\t\t\t\t     \\\n@@ -12322,6 +12380,10 @@ flow_dv_translate(struct rte_eth_dev *dev,\n \t\t\t/* No other protocol should follow eCPRI layer. */\n \t\t\tlast_item = MLX5_FLOW_LAYER_ECPRI;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_CONNTRACK:\n+\t\t\tflow_dv_translate_item_aso_ct(dev, match_mask,\n+\t\t\t\t\t\t      match_value, items);\n+\t\t\tbreak;\n \t\tdefault:\n \t\t\tbreak;\n \t\t}\n",
    "prefixes": [
        "v4",
        "12/17"
    ]
}