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GET /api/patches/92544/?format=api
{ "id": 92544, "url": "https://patches.dpdk.org/api/patches/92544/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210430135336.2749-33-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210430135336.2749-33-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210430135336.2749-33-pbhagavatula@marvell.com", "date": "2021-04-30T13:53:35", "name": "[v3,32/33] event/cnxk: add timer adapter start and stop", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "2b604029533206a32e3568ab1b99833dc59b288b", "submitter": { "id": 1183, "url": "https://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210430135336.2749-33-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 16775, "url": "https://patches.dpdk.org/api/series/16775/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16775", "date": "2021-04-30T13:53:03", "name": "Marvell CNXK Event device Driver", "version": 3, "mbox": "https://patches.dpdk.org/series/16775/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/92544/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/92544/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6E897A0546;\n\tFri, 30 Apr 2021 15:57:42 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9FB7F41336;\n\tFri, 30 Apr 2021 15:55:22 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 2A392411DF\n for <dev@dpdk.org>; Fri, 30 Apr 2021 15:55:18 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 13UDtGnT022846 for <dev@dpdk.org>; Fri, 30 Apr 2021 06:55:17 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 387rpneaym-3\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 30 Apr 2021 06:55:17 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Fri, 30 Apr 2021 06:55:11 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Fri, 30 Apr 2021 06:55:11 -0700", "from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176])\n by maili.marvell.com (Postfix) with ESMTP id 932AF3F703F;\n Fri, 30 Apr 2021 06:55:09 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Ux8UPAEKVRmN/cl7dCFWVf7Kaar1hHC1ysMQsyst6ko=;\n b=T1o10sZN33R1SPwkIt0o07lRYADCS8VGei9P7YGVoYBkXTXKimJI8PtmDQ+y7Jf4pbkJ\n pElizhAMLxWIeEBOhKAWzeDF35tEtqBq72jxMF3fsovdQpt2nmH8ZXccGtVA5J3DdAzZ\n 3xpSw0fNlKLr+kmdIOCSJ6T3e07B+dVbzKdr9FFzRMlAqdlz150D+QzUGUvPHsxurc96\n ep1xUvc3jF6TsL+ArQDfFTCUf5JqZiZsuG0lHyadykrby6lBOJMrJH/vLt1u5iwoTm0X\n 1WGTjbmhfQ7/V8M2k6jzfI31tPNhn6Vgk+IMUb4xbOoGgxJqNJ/hKdC8bWZZrqeFwPXl tg==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Fri, 30 Apr 2021 19:23:35 +0530", "Message-ID": "<20210430135336.2749-33-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210430135336.2749-1-pbhagavatula@marvell.com>", "References": "<20210426174441.2302-1-pbhagavatula@marvell.com>\n <20210430135336.2749-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "kgSqCd0MeHtdwFqwwhhSnIOsgFF5-kVm", "X-Proofpoint-ORIG-GUID": "kgSqCd0MeHtdwFqwwhhSnIOsgFF5-kVm", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761\n definitions=2021-04-30_08:2021-04-30,\n 2021-04-30 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 32/33] event/cnxk: add timer adapter start and\n stop", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Shijith Thotton <sthotton@marvell.com>\n\nAdd event timer adapter start and stop functions.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\n---\n drivers/event/cnxk/cnxk_tim_evdev.c | 71 ++++++++++++++++++++++++++++-\n 1 file changed, 70 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c\nindex a73ca33d8..19b71b4f5 100644\n--- a/drivers/event/cnxk/cnxk_tim_evdev.c\n+++ b/drivers/event/cnxk/cnxk_tim_evdev.c\n@@ -246,6 +246,73 @@ cnxk_tim_ring_free(struct rte_event_timer_adapter *adptr)\n \treturn 0;\n }\n \n+static void\n+cnxk_tim_calibrate_start_tsc(struct cnxk_tim_ring *tim_ring)\n+{\n+#define CNXK_TIM_CALIB_ITER 1E6\n+\tuint32_t real_bkt, bucket;\n+\tint icount, ecount = 0;\n+\tuint64_t bkt_cyc;\n+\n+\tfor (icount = 0; icount < CNXK_TIM_CALIB_ITER; icount++) {\n+\t\treal_bkt = plt_read64(tim_ring->base + TIM_LF_RING_REL) >> 44;\n+\t\tbkt_cyc = cnxk_tim_cntvct();\n+\t\tbucket = (bkt_cyc - tim_ring->ring_start_cyc) /\n+\t\t\t tim_ring->tck_int;\n+\t\tbucket = bucket % (tim_ring->nb_bkts);\n+\t\ttim_ring->ring_start_cyc =\n+\t\t\tbkt_cyc - (real_bkt * tim_ring->tck_int);\n+\t\tif (bucket != real_bkt)\n+\t\t\tecount++;\n+\t}\n+\ttim_ring->last_updt_cyc = bkt_cyc;\n+\tplt_tim_dbg(\"Bucket mispredict %3.2f distance %d\\n\",\n+\t\t 100 - (((double)(icount - ecount) / (double)icount) * 100),\n+\t\t bucket - real_bkt);\n+}\n+\n+static int\n+cnxk_tim_ring_start(const struct rte_event_timer_adapter *adptr)\n+{\n+\tstruct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv;\n+\tstruct cnxk_tim_evdev *dev = cnxk_tim_priv_get();\n+\tint rc;\n+\n+\tif (dev == NULL)\n+\t\treturn -ENODEV;\n+\n+\trc = roc_tim_lf_enable(&dev->tim, tim_ring->ring_id,\n+\t\t\t &tim_ring->ring_start_cyc, NULL);\n+\tif (rc < 0)\n+\t\treturn rc;\n+\n+\ttim_ring->tck_int = NSEC2TICK(tim_ring->tck_nsec, cnxk_tim_cntfrq());\n+\ttim_ring->tot_int = tim_ring->tck_int * tim_ring->nb_bkts;\n+\ttim_ring->fast_div = rte_reciprocal_value_u64(tim_ring->tck_int);\n+\ttim_ring->fast_bkt = rte_reciprocal_value_u64(tim_ring->nb_bkts);\n+\n+\tcnxk_tim_calibrate_start_tsc(tim_ring);\n+\n+\treturn rc;\n+}\n+\n+static int\n+cnxk_tim_ring_stop(const struct rte_event_timer_adapter *adptr)\n+{\n+\tstruct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv;\n+\tstruct cnxk_tim_evdev *dev = cnxk_tim_priv_get();\n+\tint rc;\n+\n+\tif (dev == NULL)\n+\t\treturn -ENODEV;\n+\n+\trc = roc_tim_lf_disable(&dev->tim, tim_ring->ring_id);\n+\tif (rc < 0)\n+\t\tplt_err(\"Failed to disable timer ring\");\n+\n+\treturn rc;\n+}\n+\n static int\n cnxk_tim_stats_get(const struct rte_event_timer_adapter *adapter,\n \t\t struct rte_event_timer_adapter_stats *stats)\n@@ -278,13 +345,14 @@ cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n \tstruct cnxk_tim_evdev *dev = cnxk_tim_priv_get();\n \n \tRTE_SET_USED(flags);\n-\tRTE_SET_USED(ops);\n \n \tif (dev == NULL)\n \t\treturn -ENODEV;\n \n \tcnxk_tim_ops.init = cnxk_tim_ring_create;\n \tcnxk_tim_ops.uninit = cnxk_tim_ring_free;\n+\tcnxk_tim_ops.start = cnxk_tim_ring_start;\n+\tcnxk_tim_ops.stop = cnxk_tim_ring_stop;\n \tcnxk_tim_ops.get_info = cnxk_tim_ring_info_get;\n \n \tif (dev->enable_stats) {\n@@ -295,6 +363,7 @@ cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n \t/* Store evdev pointer for later use. */\n \tdev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev;\n \t*caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;\n+\t*ops = &cnxk_tim_ops;\n \n \treturn 0;\n }\n", "prefixes": [ "v3", "32/33" ] }