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GET /api/patches/92533/?format=api
{ "id": 92533, "url": "https://patches.dpdk.org/api/patches/92533/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210430135336.2749-22-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210430135336.2749-22-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210430135336.2749-22-pbhagavatula@marvell.com", "date": "2021-04-30T13:53:24", "name": "[v3,21/33] event/cnxk: add timer adapter capabilities", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fe8da768b496f677f713968ac78c3a3fe0b180bf", "submitter": { "id": 1183, "url": "https://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210430135336.2749-22-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 16775, "url": "https://patches.dpdk.org/api/series/16775/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16775", "date": "2021-04-30T13:53:03", "name": "Marvell CNXK Event device Driver", "version": 3, "mbox": "https://patches.dpdk.org/series/16775/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/92533/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/92533/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 71EEDA0546;\n\tFri, 30 Apr 2021 15:56:29 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7FBA341335;\n\tFri, 30 Apr 2021 15:54:48 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 9CDEF4133F\n for <dev@dpdk.org>; Fri, 30 Apr 2021 15:54:44 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 13UDpJId016402 for <dev@dpdk.org>; Fri, 30 Apr 2021 06:54:44 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 387rpneawy-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 30 Apr 2021 06:54:43 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Fri, 30 Apr 2021 06:54:42 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Fri, 30 Apr 2021 06:54:41 -0700", "from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176])\n by maili.marvell.com (Postfix) with ESMTP id EB4843F703F;\n Fri, 30 Apr 2021 06:54:39 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=36rTcej0V3XJLHHHHI2nuZBmv9/6pB/Mm4neMLvnb6M=;\n b=WM6ZPllrRoWFf1zec1yOJVIhOXg/QtBaJLuoG39sQL9BkkRnPLbjtn7EFtmuZgIzBU6t\n dhXFqKJrvTKxT4WbBvml1vGUP+4S9jfhlRycjwSyiprd2jQqlcMMqfKNx1PqVH5hN3eY\n a3Ylf+gHgspPxg6X8WDBFdzuYXf5qpUdqnjxkLwey3MY9cxw3H5wOYgXaNhXjX3SJ3g3\n F4+GG/Pf8Qwvd8jfyjEfd0fmG8pLB8GbZTwT7I00jvDC4cCWwxyW9b1rcJQ0sY3FA+qF\n vgW7pxiFblDAs5Yn0ZjGu9rRpJ6g73R2/6NZFhP3o+BItTrUTGbSQPayEIBDddZF9Opa Hg==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Fri, 30 Apr 2021 19:23:24 +0530", "Message-ID": "<20210430135336.2749-22-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210430135336.2749-1-pbhagavatula@marvell.com>", "References": "<20210426174441.2302-1-pbhagavatula@marvell.com>\n <20210430135336.2749-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "-fMwcEHn0gjenyt3-0YySirK-5rHe16U", "X-Proofpoint-ORIG-GUID": "-fMwcEHn0gjenyt3-0YySirK-5rHe16U", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761\n definitions=2021-04-30_08:2021-04-30,\n 2021-04-30 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 21/33] event/cnxk: add timer adapter\n capabilities", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Shijith Thotton <sthotton@marvell.com>\n\nAdd function to retrieve event timer adapter capabilities.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c | 2 ++\n drivers/event/cnxk/cn9k_eventdev.c | 2 ++\n drivers/event/cnxk/cnxk_tim_evdev.c | 22 +++++++++++++++++++++-\n drivers/event/cnxk/cnxk_tim_evdev.h | 6 +++++-\n 4 files changed, 30 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex 17bed4c9a..c6fde7232 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -420,6 +420,8 @@ static struct rte_eventdev_ops cn10k_sso_dev_ops = {\n \t.port_unlink = cn10k_sso_port_unlink,\n \t.timeout_ticks = cnxk_sso_timeout_ticks,\n \n+\t.timer_adapter_caps_get = cnxk_tim_caps_get,\n+\n \t.dump = cnxk_sso_dump,\n \t.dev_start = cn10k_sso_start,\n \t.dev_stop = cn10k_sso_stop,\ndiff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nindex e39d04fdd..4211610c6 100644\n--- a/drivers/event/cnxk/cn9k_eventdev.c\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -494,6 +494,8 @@ static struct rte_eventdev_ops cn9k_sso_dev_ops = {\n \t.port_unlink = cn9k_sso_port_unlink,\n \t.timeout_ticks = cnxk_sso_timeout_ticks,\n \n+\t.timer_adapter_caps_get = cnxk_tim_caps_get,\n+\n \t.dump = cnxk_sso_dump,\n \t.dev_start = cn9k_sso_start,\n \t.dev_stop = cn9k_sso_stop,\ndiff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c\nindex 46461b885..265bee533 100644\n--- a/drivers/event/cnxk/cnxk_tim_evdev.c\n+++ b/drivers/event/cnxk/cnxk_tim_evdev.c\n@@ -5,6 +5,26 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_tim_evdev.h\"\n \n+int\n+cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n+\t\t uint32_t *caps,\n+\t\t const struct rte_event_timer_adapter_ops **ops)\n+{\n+\tstruct cnxk_tim_evdev *dev = cnxk_tim_priv_get();\n+\n+\tRTE_SET_USED(flags);\n+\tRTE_SET_USED(ops);\n+\n+\tif (dev == NULL)\n+\t\treturn -ENODEV;\n+\n+\t/* Store evdev pointer for later use. */\n+\tdev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev;\n+\t*caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;\n+\n+\treturn 0;\n+}\n+\n void\n cnxk_tim_init(struct roc_sso *sso)\n {\n@@ -37,7 +57,7 @@ cnxk_tim_init(struct roc_sso *sso)\n void\n cnxk_tim_fini(void)\n {\n-\tstruct cnxk_tim_evdev *dev = tim_priv_get();\n+\tstruct cnxk_tim_evdev *dev = cnxk_tim_priv_get();\n \n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn;\ndiff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h\nindex 5ddc94ed4..ece66ab25 100644\n--- a/drivers/event/cnxk/cnxk_tim_evdev.h\n+++ b/drivers/event/cnxk/cnxk_tim_evdev.h\n@@ -27,7 +27,7 @@ struct cnxk_tim_evdev {\n };\n \n static inline struct cnxk_tim_evdev *\n-tim_priv_get(void)\n+cnxk_tim_priv_get(void)\n {\n \tconst struct rte_memzone *mz;\n \n@@ -38,6 +38,10 @@ tim_priv_get(void)\n \treturn mz->addr;\n }\n \n+int cnxk_tim_caps_get(const struct rte_eventdev *dev, uint64_t flags,\n+\t\t uint32_t *caps,\n+\t\t const struct rte_event_timer_adapter_ops **ops);\n+\n void cnxk_tim_init(struct roc_sso *sso);\n void cnxk_tim_fini(void);\n \n", "prefixes": [ "v3", "21/33" ] }