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GET /api/patches/92514/?format=api
https://patches.dpdk.org/api/patches/92514/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210430135336.2749-3-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210430135336.2749-3-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210430135336.2749-3-pbhagavatula@marvell.com", "date": "2021-04-30T13:53:05", "name": "[v3,02/33] event/cnxk: add device capabilities function", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "15d7653b0f62cafeb283d116c2c2dcd5f04d4767", "submitter": { "id": 1183, "url": "https://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210430135336.2749-3-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 16775, "url": "https://patches.dpdk.org/api/series/16775/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16775", "date": "2021-04-30T13:53:03", "name": "Marvell CNXK Event device Driver", "version": 3, "mbox": "https://patches.dpdk.org/series/16775/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/92514/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/92514/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2A3B7A0546;\n\tFri, 30 Apr 2021 15:53:56 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 71C01410FB;\n\tFri, 30 Apr 2021 15:53:53 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id B505040A4B\n for <dev@dpdk.org>; Fri, 30 Apr 2021 15:53:50 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 13UDpdZd016476 for <dev@dpdk.org>; Fri, 30 Apr 2021 06:53:49 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com with ESMTP id 387rpneasq-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 30 Apr 2021 06:53:49 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Fri, 30 Apr 2021 06:53:47 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Fri, 30 Apr 2021 06:53:47 -0700", "from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176])\n by maili.marvell.com (Postfix) with ESMTP id BD4D03F703F;\n Fri, 30 Apr 2021 06:53:45 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=2ECxKpzhMfJGae+BunAv7D5vYFYHGE53+esIFAKQnv4=;\n b=YlqGIReR5Fat6G1ALj0aeKAYku0MmKYiccjQtsdF33gzGepHRjPHYXVARd8JtI3IwSHn\n 5d6nXOzF4ps3d0cjIxNTq+KkLPY+X/fhxfHmk2zVUHrRRPT5ZN7MEJuK/wQ6dcwM+nzo\n EwxWYTHzjoWF1sOkN96y3KDtRYRWEftRZFZT7Uc7+HTngtonowSOpa+tP4HozvTzePgd\n AfiPshksA5n/2nkJ8v9Z5AXOg9vdNea/hfWHEDYzTFl8kiQdArGyMgrl50zUV+Z3auVV\n VNVpo3P4fujwxTiwEs+YYsbe47Im9Wv0nkHV4sZcxffnHp+fqewsNXnmmY5UVqZVtRey QA==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Fri, 30 Apr 2021 19:23:05 +0530", "Message-ID": "<20210430135336.2749-3-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210430135336.2749-1-pbhagavatula@marvell.com>", "References": "<20210426174441.2302-1-pbhagavatula@marvell.com>\n <20210430135336.2749-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "8BFv9j9acXVNk8OBnE5sUtE_hW4I908J", "X-Proofpoint-ORIG-GUID": "8BFv9j9acXVNk8OBnE5sUtE_hW4I908J", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761\n definitions=2021-04-30_08:2021-04-30,\n 2021-04-30 signatures=0", "Subject": "[dpdk-dev] [PATCH v3 02/33] event/cnxk: add device capabilities\n function", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Shijith Thotton <sthotton@marvell.com>\n\nAdd the info_get function to return details on the queues, flow,\nprioritization capabilities, etc. which this device has.\n\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/cnxk/cnxk_eventdev.c | 24 ++++++++++++++++++++++++\n drivers/event/cnxk/cnxk_eventdev.h | 4 ++++\n 2 files changed, 28 insertions(+)", "diff": "diff --git a/drivers/event/cnxk/cnxk_eventdev.c b/drivers/event/cnxk/cnxk_eventdev.c\nindex 7ea782eaa..3a7053af6 100644\n--- a/drivers/event/cnxk/cnxk_eventdev.c\n+++ b/drivers/event/cnxk/cnxk_eventdev.c\n@@ -4,6 +4,30 @@\n \n #include \"cnxk_eventdev.h\"\n \n+void\n+cnxk_sso_info_get(struct cnxk_sso_evdev *dev,\n+\t\t struct rte_event_dev_info *dev_info)\n+{\n+\n+\tdev_info->min_dequeue_timeout_ns = dev->min_dequeue_timeout_ns;\n+\tdev_info->max_dequeue_timeout_ns = dev->max_dequeue_timeout_ns;\n+\tdev_info->max_event_queues = dev->max_event_queues;\n+\tdev_info->max_event_queue_flows = (1ULL << 20);\n+\tdev_info->max_event_queue_priority_levels = 8;\n+\tdev_info->max_event_priority_levels = 1;\n+\tdev_info->max_event_ports = dev->max_event_ports;\n+\tdev_info->max_event_port_dequeue_depth = 1;\n+\tdev_info->max_event_port_enqueue_depth = 1;\n+\tdev_info->max_num_events = dev->max_num_events;\n+\tdev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS |\n+\t\t\t\t RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |\n+\t\t\t\t RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES |\n+\t\t\t\t RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |\n+\t\t\t\t RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |\n+\t\t\t\t RTE_EVENT_DEV_CAP_NONSEQ_MODE |\n+\t\t\t\t RTE_EVENT_DEV_CAP_CARRY_FLOW_ID;\n+}\n+\n int\n cnxk_sso_init(struct rte_eventdev *event_dev)\n {\ndiff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h\nindex 74d0990fa..9745bfd3e 100644\n--- a/drivers/event/cnxk/cnxk_eventdev.h\n+++ b/drivers/event/cnxk/cnxk_eventdev.h\n@@ -17,6 +17,8 @@\n \n struct cnxk_sso_evdev {\n \tstruct roc_sso sso;\n+\tuint8_t max_event_queues;\n+\tuint8_t max_event_ports;\n \tuint8_t is_timeout_deq;\n \tuint8_t nb_event_queues;\n \tuint8_t nb_event_ports;\n@@ -35,5 +37,7 @@ cnxk_sso_pmd_priv(const struct rte_eventdev *event_dev)\n int cnxk_sso_init(struct rte_eventdev *event_dev);\n int cnxk_sso_fini(struct rte_eventdev *event_dev);\n int cnxk_sso_remove(struct rte_pci_device *pci_dev);\n+void cnxk_sso_info_get(struct cnxk_sso_evdev *dev,\n+\t\t struct rte_event_dev_info *dev_info);\n \n #endif /* __CNXK_EVENTDEV_H__ */\n", "prefixes": [ "v3", "02/33" ] }{ "id": 92514, "url": "