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GET /api/patches/92411/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 92411,
    "url": "https://patches.dpdk.org/api/patches/92411/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20210429182343.52628-1-lingyu.liu@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210429182343.52628-1-lingyu.liu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210429182343.52628-1-lingyu.liu@intel.com",
    "date": "2021-04-29T18:23:43",
    "name": "[v1] net/ixgbe: configure EXVET_T register",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "02fe59073fc4b1aeb157a9489a5a0a6b41e078a0",
    "submitter": {
        "id": 2079,
        "url": "https://patches.dpdk.org/api/people/2079/?format=api",
        "name": "Liu, Lingyu",
        "email": "lingyu.liu@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20210429182343.52628-1-lingyu.liu@intel.com/mbox/",
    "series": [
        {
            "id": 16760,
            "url": "https://patches.dpdk.org/api/series/16760/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=16760",
            "date": "2021-04-29T18:23:43",
            "name": "[v1] net/ixgbe: configure EXVET_T register",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/16760/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/92411/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/92411/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 39A87A0547;\n\tThu, 29 Apr 2021 13:49:13 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1FE10410DD;\n\tThu, 29 Apr 2021 13:49:13 +0200 (CEST)",
            "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by mails.dpdk.org (Postfix) with ESMTP id D69CB406FF\n for <dev@dpdk.org>; Thu, 29 Apr 2021 13:49:11 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2021 04:49:10 -0700",
            "from dpdk-liulingy-1.sh.intel.com ([10.67.118.243])\n by fmsmga001.fm.intel.com with ESMTP; 29 Apr 2021 04:49:10 -0700"
        ],
        "IronPort-SDR": [
            "\n 2dXaaJmYLgitsCkM/9t5VzZslAz3VGlrwHaTbmADTLYqEpD6zECnEqQuHeHQ33g61+LOHCEIp4\n MVdIcrdIP4qA==",
            "\n GysFv4JImGYac4yKWfIdp8zqA0UmIv+BANCg+uUYLd/HrAd9yH3zPB8Eyy98Z/ye50dYo/3/DH\n RQFl4XQmLRCw=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,9968\"; a=\"177096772\"",
            "E=Sophos;i=\"5.82,259,1613462400\"; d=\"scan'208\";a=\"177096772\"",
            "E=Sophos;i=\"5.82,259,1613462400\"; d=\"scan'208\";a=\"526914717\""
        ],
        "X-ExtLoop1": "1",
        "From": "Lingyu Liu <lingyu.liu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Lingyu Liu <lingyu.liu@intel.com>",
        "Date": "Thu, 29 Apr 2021 18:23:43 +0000",
        "Message-Id": "<20210429182343.52628-1-lingyu.liu@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v1] net/ixgbe: configure EXVET_T register",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "According to X550 datasheet (section 8.2.1.2), when setting vlan tpid,\nthe register EXVET_T on X550 NICs also need to be configured.\n\nSigned-off-by: Lingyu Liu <lingyu.liu@intel.com>\n---\n drivers/net/ixgbe/base/ixgbe_type.h |  1 +\n drivers/net/ixgbe/ixgbe_ethdev.c    | 33 +++++++++++++++++++++++++++++\n 2 files changed, 34 insertions(+)",
    "diff": "diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h\nindex bc927a3..8e22be7 100644\n--- a/drivers/net/ixgbe/base/ixgbe_type.h\n+++ b/drivers/net/ixgbe/base/ixgbe_type.h\n@@ -151,6 +151,7 @@\n #define IXGBE_TCPTIMER\t\t0x0004C\n #define IXGBE_CORESPARE\t\t0x00600\n #define IXGBE_EXVET\t\t0x05078\n+#define IXGBE_EXVET_T\t\t0x08224\n \n /* NVM Registers */\n #define IXGBE_EEC\t\t0x10010\ndiff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c\nindex dcd7291..b9c89e8 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.c\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.c\n@@ -1925,6 +1925,39 @@ ixgbe_vlan_tpid_set(struct rte_eth_dev *dev,\n \t\t\t/* Only the high 16-bits is valid */\n \t\t\tIXGBE_WRITE_REG(hw, IXGBE_EXVET, (uint32_t)tpid <<\n \t\t\t\t\tIXGBE_EXVET_VET_EXT_SHIFT);\n+\t\t\t/* For X550, additional register need be set*/\n+\t\t\tswitch (hw->device_id) {\n+\t\t\tcase IXGBE_DEV_ID_X550T:\n+\t\t\tcase IXGBE_DEV_ID_X550T1:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_KR:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_KR_L:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_SFP_N:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_SGMII:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_SGMII_L:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_10G_T:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_QSFP:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_QSFP_N:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_SFP:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_1G_T:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_1G_T_L:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_X_KX4:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_X_KR:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_X_SFP:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_X_10G_T:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_X_1G_T:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_X_XFI:\n+\t\t\tcase IXGBE_DEV_ID_X550_VF_HV:\n+\t\t\tcase IXGBE_DEV_ID_X550_VF:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_VF:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_A_VF_HV:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_X_VF:\n+\t\t\tcase IXGBE_DEV_ID_X550EM_X_VF_HV:\n+\t\t\t\tIXGBE_WRITE_REG(hw, IXGBE_EXVET_T, (uint32_t)tpid <<\n+\t\t\t\t\tIXGBE_EXVET_VET_EXT_SHIFT);\n+\t\t\t\tbreak;\n+\t\t\tdefault:\n+\t\t\t\tbreak;\n+\t\t\t}\n \t\t} else {\n \t\t\treg = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);\n \t\t\treg = (reg & (~IXGBE_VLNCTRL_VET)) | (uint32_t)tpid;\n",
    "prefixes": [
        "v1"
    ]
}